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/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst68 these workarounds are enabled for the wrong CPU revision then the errata
74 for it to specify which errata workarounds should be enabled or not.
82 CPU. This needs to be enabled for all revisions of the CPU.
87 CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
90 CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
95 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
98 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
103 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35.
108 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53.
111 CPUs. This needs to be enabled onl
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/rk3399_ARM-atf/drivers/nxp/tzc/
H A Dplat_tzc380.c86 tzc380_reg_list[list_idx].enabled = TZC_ATTR_REGION_DISABLE; in populate_tzc380_reg_list()
99 tzc380_reg_list[list_idx].enabled = TZC_ATTR_REGION_ENABLE; in populate_tzc380_reg_list()
110 tzc380_reg_list[list_idx].enabled = TZC_ATTR_REGION_ENABLE; in populate_tzc380_reg_list()
121 tzc380_reg_list[list_idx].enabled = TZC_ATTR_REGION_ENABLE; in populate_tzc380_reg_list()
162 tzc380_reg_list[indx].enabled; in mem_access_setup()
/rk3399_ARM-atf/make_helpers/
H A Dconstraints.mk22 $(error SPMC_AT_EL3 and ENABLE_RME cannot both be enabled.)
40 or RME is enabled)
51 $(error FEAT_RME must be enabled when FEAT_MEC is enabled.)
54 $(error FEAT_TCR2 must be enabled when FEAT_MEC is enabled.)
57 $(error FEAT_SCTLR2 must be enabled when FEAT_MEC is enabled.)
82 $(error SPM cannot be enabled in both S-EL2 and EL3.)
91 $(error SEL0 SP cannot be enabled without SPMC at EL3)
100 $(warning DEBUGFS experimental feature is enabled.)
142 $(error USE_COHERENT_MEM cannot be enabled with HW_ASSISTED_COHERENCY)
182 $(error Pointer Authentication requires CTX_INCLUDE_PAUTH_REGS to be enabled)
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/rk3399_ARM-atf/include/dt-bindings/soc/
H A Drif.h80 #define RISAFPROT(risaf_region, cid_read_list, cid_write_list, cid_priv_list, sec, enc, enabled) \ argument
82 ((enc) << 7) | ((sec) << 6) | ((enabled) << 5) | (risaf_region))
92 cid_write_list, cid_priv_list, enabled) \ argument
94 ((delegate_en) << 2) | (enabled)) \
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-internals.rst5 :ref:`build-options <build options>` but enabled or disabled indirectly and
6 depends on certain options to be enabled or disabled.
13 Default is 0 (disabled). This option will be set to 1 (enabled) when ``SPD=spmd``
14 and ``SPMD_SPM_AT_SEL2`` is set or when ``ENABLE_RME`` is set to 1 (enabled).
18 ELs which gets trapped in EL3. This option will be set to 1 (enabled) if
H A Dbuild-options.rst72 FIP. Automatically enabled if ``SP_LAYOUT_FILE`` is provided.
115 If enabled, it is needed to use a compiler that supports the option
147 Note that Pointer Authentication is enabled for Non-secure world
172 - ``COT``: When Trusted Boot is enabled, selects the desired chain of trust.
178 this is only enabled for a debug build of the firmware.
207 switch. Automatically enabled when ``BRANCH_PROTECTION`` is enabled. This flag
211 Note that Pointer Authentication is enabled for Non-secure world irrespective
213 ``BRANCH_PROTECTION`` is enabled, this flag is superseded.
217 that this build option requires ``ENABLE_SVE_FOR_SWD`` to be enabled. In
241 Board Boot authentication at runtime. This option is meant to be enabled only
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/rk3399_ARM-atf/plat/marvell/armada/a3k/common/
H A Ddram_win.c46 uint32_t enabled; member
191 uint32_t base_reg, ctrl_reg, size_reg, enabled, target; in dram_win_map_build() local
198 enabled = ctrl_reg & CPU_DEC_CR_WIN_ENABLE; in dram_win_map_build()
200 if ((enabled == 0) || (target != DRAM_CPU_DEC_TARGET_NUM)) in dram_win_map_build()
235 if (!win_cfg->enabled) in cpu_win_set()
/rk3399_ARM-atf/plat/arm/common/
H A Darm_nor_psci_mem_protect.c38 int arm_psci_read_mem_protect(int *enabled) in arm_psci_read_mem_protect() argument
43 *enabled = (tmp == 1) ? 1 : 0; in arm_psci_read_mem_protect()
H A Darm_common.mk174 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
196 $(error RESET_TO_BL2 must be enabled when ARM_FW_CONFIG_LOAD_ENABLE \
197 is enabled)
201 is enabled)
230 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
/rk3399_ARM-atf/plat/st/stm32mp1/
H A Dstm32mp1_scmi.c33 bool enabled; member
77 .enabled = _init_enabled, \
313 return (int32_t)clock->enabled; in plat_scmi_clock_get_state()
330 if (!clock->enabled) { in plat_scmi_clock_set_state()
333 clock->enabled = true; in plat_scmi_clock_set_state()
336 if (clock->enabled) { in plat_scmi_clock_set_state()
339 clock->enabled = false; in plat_scmi_clock_set_state()
468 if (clk->enabled && in stm32mp1_init_scmi_server()
/rk3399_ARM-atf/plat/amd/versal2/
H A Dscmi.c27 bool enabled; member
34 .enabled = (_init_enabled), \
354 VERBOSE("SCMI: CLK: id: %d, get_state: %d\n", scmi_id, clock->enabled); in plat_scmi_clock_get_state()
356 if (clock->enabled) { in plat_scmi_clock_get_state()
375 if (!clock->enabled) { in plat_scmi_clock_set_state()
377 clock->enabled = true; in plat_scmi_clock_set_state()
380 if (clock->enabled) { in plat_scmi_clock_set_state()
382 clock->enabled = false; in plat_scmi_clock_set_state()
386 VERBOSE("SCMI: CLK: id: %d, set_state: %d\n", scmi_id, clock->enabled); in plat_scmi_clock_set_state()
/rk3399_ARM-atf/docs/components/
H A Dmpmm.rst11 |MPMM| is enabled on a per-core basis by the EL3 runtime firmware.
19 |AMU| counters that make up the |MPMM| gears must be enabled by the EL3
H A Drealm-management-extension.rst44 enabled, TF-A runs in the Root world at EL3. Therefore, the boot flow is
45 modified to run BL2 at EL3 when RME is enabled. In addition to this, a
49 The boot flow when RME is enabled looks like the following:
54 4. BL31 initializes SPM (if SPM is enabled)
87 and the interface between R-EL2 and EL3. When building TF-A with RME enabled,
94 The recommended procedure for building and running an RME enabled reference
H A Dsecure-partition-manager.rst79 level to being at S-EL2. It defaults to enabled (value 1) when
82 at EL3. If neither ``SPMD_SPM_AT_SEL2`` or ``SPMC_AT_EL3`` are enabled the
84 ``SPMD_SPM_AT_SEL2`` is enabled. The context save/restore routine
87 when SPMC at EL3 support is enabled.
91 is required when ``SPMD_SPM_AT_SEL2`` is enabled hence when multiple
194 enabled:
/rk3399_ARM-atf/docs/perf/
H A Dpsci-performance-instr.rst10 This page explains how they may be enabled and used to perform all varieties of
37 This feature is enabled with the Boolean flag ``ENABLE_PMF``.
77 PSCI Statistics is enabled with the Boolean build flag
79 collection backend is provided (``ENABLE_PMF`` is implicitly enabled).
88 components in TF-A as well. It is enabled with the Boolean flag
90 be enabled.
/rk3399_ARM-atf/include/drivers/nxp/tzc/
H A Dplat_tzc380.h31 unsigned int enabled; member
/rk3399_ARM-atf/services/spd/tlkd/
H A Dtlkd.mk12 $(error spd=tlkd will not work with ENABLE_FEAT_D128 enabled.)
/rk3399_ARM-atf/drivers/arm/ethosn/
H A Dethosn_npu.mk31 $(error "ETHOSN_NPU_TZMP1 is only available if TRUSTED_BOARD_BOOT is enabled)
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-12.rst5 | Title | When Hardware Page Aggregation (HPA) is enabled memory |
79 and ensure that HPA-related security mitigations are enabled where applicable.
H A Dsecurity-advisory-tfv-2.rst43 meaning that debug exceptions from Secure EL1 are enabled by the authentication
45 secure privileged invasive debug is enabled by the authentication interface, at
H A Dsecurity-advisory-tfv-7.rst42 world execution. The mitigation is enabled by setting an implementation defined
48 The mitigation code is enabled by default, but can be disabled at compile time
90 the default mitigation state for firmware-managed execution contexts is enabled.
/rk3399_ARM-atf/docs/threat_model/firmware_threat_model/
H A Dthreat_model_fw_update_and_recovery.rst8 the feature PSA firmware update or TBBR firmware update or both enabled.
20 A-class Processors (TF-A) when PSA FWU support is enabled or TBBR FWU mode
21 is enabled. This includes the boot ROM (BL1), the trusted boot firmware (BL2).
/rk3399_ARM-atf/drivers/st/pmic/
H A Dstm32mp_pmic2.c188 bool enabled; in pmic2_get_state() local
192 if (stpmic2_regulator_get_state(pmic2, regul->id, &enabled) < 0) { in pmic2_get_state()
196 return enabled; in pmic2_get_state()
/rk3399_ARM-atf/docs/plat/arm/
H A Darm-build-options.rst20 FW_CONFIG device trees from the Firmware Image Package (FIP). When enabled,
28 could not be loaded or authenticated). The watchdog is enabled in the early
37 enabled (1), the address of the Linux image must be provided via the
51 bl2_mem_params_desc.c implementation. When enabled, the common implementation
97 - ``tsram`` : Trusted SRAM (default option when TBB is not enabled)
99 - ``dram`` : Secure region in DRAM (default option when TBB is enabled,
/rk3399_ARM-atf/docs/plat/marvell/armada/misc/
H A Dmvebu-iob.rst10 the enabled windows. If there is a hit and it passes the security checks, it is

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