docs/design/cpu-specific-build-macros.rst

68 these workarounds are enabled for the wrong CPU revision then the errata
74 for it to specify which errata workarounds should be enabled or not.
82    CPU. This needs to be enabled for all revisions of the CPU.
87    CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
90    CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
95    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
98    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
103    CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35.
108    CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53.
111    CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53.
114    CPU. This needs to be enabled only for revision <= r0p2 of the CPU.
117    CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53.
120    link time to Cortex-A53 CPU. This needs to be enabled for some variants of
125    CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From
126    r0p4 and onwards, this errata is enabled by default in hardware. Identical to
130    to Cortex-A53 CPU.  This needs to be enabled for some variants of revision
147    CPU. This needs to be enabled only for revision r0p0 of the CPU.
150    CPU. This needs to be enabled only for revision r0p0 of the CPU.
153    CPU. This needs to be enabled only for revision r0p0 of the CPU.
156    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
159    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
162    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
170    CPU. This needs to be enabled only for revision r0p0 of the CPU.
173    CPU. This needs to be enabled only for revision r0p0 of the CPU.
176    CPU. This needs to be enabled only for revision r0p0 of the CPU.
179    CPU. This needs to be enabled only for revision r0p0 of the CPU.
182    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
185    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
188    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
191    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
194    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
197    CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
200    CPU. This needs to be enabled only for revision <= r1p3 of the CPU.
208    CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed
212    CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU and
221    CPU. This needs to be enabled only for revision <= r0p3 of the CPU.
229    CPU. This needs to be enabled only for revision r0p0 of the CPU.
232    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
237    CPU. This needs to be enabled only for revision r0p0 of the CPU.
240     CPU. This needs to be enabled only for revision r0p0 of the CPU.
245    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
248    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
251    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
254    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
257    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
260    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
263    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
266    CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
274    CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
277    CPU. This needs to be enabled only for revisions r3p0 - r4p1 of the CPU.
280    CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
286    CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is
290    CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is
294    CPU. This needs to be enabled for revision r0p0 and r1p0 of the CPU and it is
298    CPU. This needs to be enabled for all revisions <= r1p1 of the CPU and is
304    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
307    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
310    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
313    CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
316    CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
319     CPU. This needs to be enabled for revisions <= r1p1 of the CPU.
322     CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
327    CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU.
330    CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU.
333    CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same
337    CPU. This needs to be enabled for revisions r0p0 and r1p0.
340    CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
343    CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue
347    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
351    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
356    interconnect IP. This needs to be enabled for revisions r0p0, r1p0, r1p1
360    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and
364    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
368    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and
374    Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1.
378   Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This
382   Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
386   Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This
391   an ARM interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and
397   Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
401   Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
405   Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and
409   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
413   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
417   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
422   an ARM interconnect IP. This needs to be enabled for revisions r0p1 and r0p2
426   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2.
430   Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
434   Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2.
440    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
443    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
446    CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
451    CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU.
454    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
457    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
460    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
463    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
466    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
469    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
472    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
475    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
478    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
481    CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU.
484    CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
487    CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for
491    CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
497    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
501    CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
505    CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
509    CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
513    CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
516    CPU. This needs to be enabled only for revision r1p0 and r1p1 of the
520    CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the
525    CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the
529    CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the
534    CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of
538    CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU.
542    CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU.
547    interconnect IP. This needs to be enabled for revisions r0p0, r1p0 and r1p1.
551    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the
555    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the
559    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the
565    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
569    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
574    IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed
578    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
582    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
586    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
590    CPU, this affects all configurations. This needs to be enabled for revisions
594    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 and is
598    CPU. This needs to be enabled only for revisions r0p0 and r0p1 of
604   CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1.
607   CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 of the CPU and
613    Cortex-A710 CPU. This needs to be enabled only for revision r1p0. It has
617    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
621    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
625    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0 and r1p0.
629    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
633    Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
637    Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU
641    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
645    Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and
649    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
653    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
657    Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU
661    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
665    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
669    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
673    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
677    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
682    interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and
686    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
690    Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
694    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
698   CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0, r2p1 of the
704    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
707    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
710    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
713    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
716    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
719    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
722    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
725    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
728    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
731    CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
734    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
738    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
742    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU,
746    CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open.
749    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
753    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
757    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
762    interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
766    CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
770    CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is
776    CPU. This needs to be enabled for revisions r0p0 and is still open.
781    CPU. This needs to be enabled only for r1p0, it is fixed in r2p0.
784    CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
788    CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
792    CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
796    CPU. This needs to be enabled only for revision r1p0 of the CPU, it is fixed
800    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
804    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
808    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
812    CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
816    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
820    CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
824    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
828    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
832    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
836    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
840    CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
845    This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is
849    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
853    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
857    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
861    CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
867   CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
871   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is
875   Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
879   Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
883   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
887   CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU.
896   Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
900   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is
904   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
908   CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2
912   CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2
916   CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2
920   CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of
927   This needs to be enabled for revisions r0p0 and is fixed in r0p1.
929   be enabled/disabled at the platform level. The flag is used when the errata ABI
930   feature is enabled and can assist the Kernel in the process of
934   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
938    CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed
942   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
945   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
948   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
951   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
954   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
957   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
960   CPU. This needs to be enabled for revision r0p2. It is fixed in r0p3.
963   CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2 and r0p3.
967   CPU. This needs to be enabled for revision r0p0, r0p1, r0p2 and r0p3.
973   CPU. This needs to be enabled for revision r0p0. It is fixed in r0p1.
976   CPU. This needs to be enabled for revisions r0p0 and r0p1. It is still open.
981    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
985    Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1,
989    Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and
993    Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed
998    Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is
1003    Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1,
1007    Cortex-A510 CPU. This needs to be enabled only for revision r1p0 and is fixed
1011    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1016    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1020    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1024    Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
1062    Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1066    Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1072    Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0.
1076    Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is
1080    Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is
1084    Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
1090    Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and
1095    Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
1099    Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no
1103    Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
1107    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0
1111    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0,
1115    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0,
1119    Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0,
1125    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1129    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1133    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1137    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1141    Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1145    Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1
1149    Cortex-A720 CPU. This needs to be enabled for revisions r0p0, r0p1
1155    to Cortex-A720_AE CPU. This needs to be enabled for revisions r0p0.
1161    Cortex-A725 CPU. This needs to be enabled for revisions r0p0 when
1162    FEAT_SPE is enabled. It is fixed in r0p1.
1165    Cortex-A725 CPU. This needs to be enabled for revisions r0p0.
1169    Cortex-A725 CPU. This needs to be enabled for revisions r0p0, r0p1
1173    Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1177    Cortex-A725 CPU. This needs to be enabled for revisions r0p0 and r0p1.
1223 architecture that can be enabled by the platform as desired.
1239    flag enforces this behaviour. This needs to be enabled only for revisions
1240    <= r0p3 of the CPU and is enabled by default.
1244    enabled only for revisions <= r1p2 of the CPU and is enabled by default,
1273    then this flag is enabled; otherwise, it is 0 (Disabled).