| /rk3399_ARM-atf/plat/brcm/board/stingray/src/ |
| H A D | fsx.c | 187 VERBOSE("fsx %s init start\n", fsx_type_names[fsx_type]); in fsx_init() 191 VERBOSE(" - enable fsx clock\n"); in fsx_init() 197 VERBOSE(" - reset fsx\n"); in fsx_init() 216 VERBOSE(" - wait for HW-init done\n"); in fsx_init() 230 VERBOSE(" - make all rings non-secured\n"); in fsx_init() 235 VERBOSE(" - set start stream-id for rings to 0x%x\n", in fsx_init() 242 VERBOSE(" - set timer configuration\n"); in fsx_init() 253 VERBOSE(" - set burst length, fifo and bd threshold\n"); in fsx_init() 268 VERBOSE(" - set memory configuration\n"); in fsx_init() 287 VERBOSE(" - set AXI control = 0x%x\n", in fsx_init() [all …]
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| H A D | bl31_setup.c | 81 VERBOSE("dma pl330 init start\n"); in brcm_stingray_dma_pl330_init() 84 VERBOSE(" - configure boot security state\n"); in brcm_stingray_dma_pl330_init() 92 VERBOSE(" - configure stream_id = 0x6000\n"); in brcm_stingray_dma_pl330_init() 98 VERBOSE(" - reset dma pl330\n"); in brcm_stingray_dma_pl330_init() 111 VERBOSE("spi pl022 init start\n"); in brcm_stingray_spi_pl022_init() 114 VERBOSE(" - reset apb spi bridge\n"); in brcm_stingray_spi_pl022_init() 316 VERBOSE("amac init start\n"); in brcm_stingray_amac_init() 352 VERBOSE("pka meminit start\n"); in brcm_stingray_pka_meminit() 354 VERBOSE(" - arrpoweron\n"); in brcm_stingray_pka_meminit() 361 VERBOSE(" - arrpowerok\n"); in brcm_stingray_pka_meminit() [all …]
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| /rk3399_ARM-atf/plat/intel/soc/common/soc/ |
| H A D | socfpga_reset_manager.c | 419 VERBOSE("Set S2F hdskreq ...\n"); in socfpga_bridges_enable() 448 VERBOSE("Assert S2F ...\n"); in socfpga_bridges_enable() 458 VERBOSE("Clear S2F hdskreq ...\n"); in socfpga_bridges_enable() 471 VERBOSE("Clear S2F hdskack ...\n"); in socfpga_bridges_enable() 483 VERBOSE("Deassert S2F ...\n"); in socfpga_bridges_enable() 490 VERBOSE("Set SOC soc2fpga_ready_latency_enable ...\n"); in socfpga_bridges_enable() 505 VERBOSE("Set LWS2F hdskreq ...\n"); in socfpga_bridges_enable() 534 VERBOSE("Assert LWS2F ...\n"); in socfpga_bridges_enable() 546 VERBOSE("Clear LWS2F hdskreq ...\n"); in socfpga_bridges_enable() 559 VERBOSE("Clear LWS2F hdskack ...\n"); in socfpga_bridges_enable() [all …]
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| /rk3399_ARM-atf/drivers/arm/rse/ |
| H A D | rse_comms.c | 102 VERBOSE("[RSE-COMMS] Sending message\n"); in psa_call() 103 VERBOSE("protocol_ver=%u\n", io_buf.msg.header.protocol_ver); in psa_call() 104 VERBOSE("seq_num=%u\n", io_buf.msg.header.seq_num); in psa_call() 105 VERBOSE("client_id=%u\n", io_buf.msg.header.client_id); in psa_call() 107 VERBOSE("in_vec[%lu].len=%lu\n", idx, in_vec[idx].len); in psa_call() 108 VERBOSE("in_vec[%lu].buf=%p\n", idx, (void *)in_vec[idx].base); in psa_call() 129 VERBOSE("[RSE-COMMS] Received reply\n"); in psa_call() 130 VERBOSE("protocol_ver=%u\n", io_buf.reply.header.protocol_ver); in psa_call() 131 VERBOSE("seq_num=%u\n", io_buf.reply.header.seq_num); in psa_call() 132 VERBOSE("client_id=%u\n", io_buf.reply.header.client_id); in psa_call() [all …]
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| /rk3399_ARM-atf/drivers/st/ddr/ |
| H A D | stm32mp_ddr.c | 38 VERBOSE("init %s\n", ddr_registers[type].name); in stm32mp_ddr_set_reg() 68 VERBOSE("[0x%lx] swctl = 0x%x\n", in stm32mp_ddr_start_sw_done() 79 VERBOSE("[0x%lx] swctl = 0x%x\n", in stm32mp_ddr_wait_sw_done_ack() 85 VERBOSE("[0x%lx] swstat = 0x%x ", in stm32mp_ddr_wait_sw_done_ack() 92 VERBOSE("[0x%lx] swstat = 0x%x\n", in stm32mp_ddr_wait_sw_done_ack() 100 VERBOSE("[0x%lx] pctrl_0 = 0x%x\n", (uintptr_t)&ctl->pctrl_0, in stm32mp_ddr_enable_axi_port() 106 VERBOSE("[0x%lx] pctrl_1 = 0x%x\n", (uintptr_t)&ctl->pctrl_1, in stm32mp_ddr_enable_axi_port() 118 VERBOSE("[0x%lx] pctrl_0 = 0x%x\n", (uintptr_t)&ctl->pctrl_0, in stm32mp_ddr_disable_axi_port() 124 VERBOSE("[0x%lx] pctrl_1 = 0x%x\n", (uintptr_t)&ctl->pctrl_1, in stm32mp_ddr_disable_axi_port() 136 VERBOSE("[0x%lx] pstat = 0x%x ", in stm32mp_ddr_disable_axi_port() [all …]
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| H A D | stm32mp1_ddr.c | 221 VERBOSE(" > [0x%lx] pgsr = 0x%x &\n", in stm32mp1_ddrphy_idone_wait() 229 VERBOSE("DQS Gate Trainig Error\n"); in stm32mp1_ddrphy_idone_wait() 234 VERBOSE("DQS Gate Trainig Intermittent Error\n"); in stm32mp1_ddrphy_idone_wait() 239 VERBOSE("DQS Drift Error\n"); in stm32mp1_ddrphy_idone_wait() 244 VERBOSE("Read Valid Training Error\n"); in stm32mp1_ddrphy_idone_wait() 249 VERBOSE("Read Valid Training Intermittent Error\n"); in stm32mp1_ddrphy_idone_wait() 253 VERBOSE("\n[0x%lx] pgsr = 0x%x\n", in stm32mp1_ddrphy_idone_wait() 262 VERBOSE("[0x%lx] pir = 0x%x -> 0x%x\n", in stm32mp1_ddrphy_init() 288 VERBOSE("[0x%lx] stat = 0x%x\n", in stm32mp1_wait_operating_mode() 318 VERBOSE("[0x%lx] stat = 0x%x\n", in stm32mp1_wait_operating_mode() [all …]
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| H A D | stm32mp_ram.c | 23 VERBOSE("%s: no st,mem-speed\n", __func__); in stm32mp_ddr_dt_get_info() 28 VERBOSE("%s: no st,mem-size\n", __func__); in stm32mp_ddr_dt_get_info() 33 VERBOSE("%s: no st,mem-name\n", __func__); in stm32mp_ddr_dt_get_info() 52 VERBOSE("%s: %s[0x%x] = %d\n", __func__, param[idx].name, param[idx].size, ret); in stm32mp_ddr_dt_get_param()
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| /rk3399_ARM-atf/drivers/partition/ |
| H A D | partition.c | 30 VERBOSE("Partition table with %d entries:\n", num); in dump_entries() 37 VERBOSE("%d: %s %" PRIx64 "-%" PRIx64 "\n", i + 1, name, list.list[i].start, in dump_entries() 59 VERBOSE("Failed to seek (%i)\n", result); in load_mbr_header() 65 VERBOSE("Failed to read data (%i)\n", result); in load_mbr_header() 72 VERBOSE("MBR boot signature failure\n"); in load_mbr_header() 79 VERBOSE("MBR header entry has an invalid number of sectors\n"); in load_mbr_header() 100 VERBOSE("Failed to seek into the GPT image at offset (%zu)\n", in load_gpt_header() 107 VERBOSE("GPT header read error(%i) or read mismatch occurred," in load_gpt_header() 114 VERBOSE("GPT header signature failure\n"); in load_gpt_header() 158 VERBOSE("Failed to seek (%i)\n", result); in load_mbr_entry() [all …]
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| /rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/ |
| H A D | ddrphy_phyinit_isdbytedisabled.c | 35 VERBOSE("%s invalid PHY configuration:\n", __func__); in ddrphy_phyinit_isdbytedisabled() 36 VERBOSE("numactivedbytedfi0(%u)+numactivedbytedfi1(%u)>numdbytes(%u).\n", in ddrphy_phyinit_isdbytedisabled() 63 VERBOSE("%s enableddqs(%u)\n", __func__, mb_ddr_1d->enableddqs); in ddrphy_phyinit_isdbytedisabled() 64 VERBOSE("Value must be 0 < enableddqs < config->uib.numactivedbytedfi0 * 8.\n"); in ddrphy_phyinit_isdbytedisabled() 74 VERBOSE("%s enableddqscha(%u)\n", __func__, mb_ddr_1d->enableddqscha); in ddrphy_phyinit_isdbytedisabled() 75 VERBOSE("Value must be 0 < enableddqscha < config->uib.numactivedbytedfi0*8\n"); in ddrphy_phyinit_isdbytedisabled() 82 VERBOSE("%s enableddqschb(%u)\n", __func__, mb_ddr_1d->enableddqschb); in ddrphy_phyinit_isdbytedisabled() 83 VERBOSE("Value must be 0 < enableddqschb < config->uib.numactivedbytedfi1*8\n"); in ddrphy_phyinit_isdbytedisabled()
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| /rk3399_ARM-atf/drivers/auth/ |
| H A D | auth_mod.c | 103 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_hash() 112 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_hash() 121 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_hash() 169 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_signature() 178 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_signature() 187 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_signature() 211 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_signature() 223 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_signature() 235 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_signature() 258 VERBOSE("[TBB] %s():%d failed with error code %d.\n", in auth_signature() [all …]
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| /rk3399_ARM-atf/bl32/tsp/ |
| H A D | tsp_interrupt.c | 38 VERBOSE("TSP: cpu 0x%lx sync s-el1 interrupt request from 0x%" PRIx64 "\n", in tsp_update_sync_sel1_intr_stats() 40 VERBOSE("TSP: cpu 0x%lx: %u sync s-el1 interrupt requests," in tsp_update_sync_sel1_intr_stats() 57 VERBOSE("TSP: cpu 0x%lx: %u preempt interrupt requests\n", in tsp_handle_preemption() 110 VERBOSE("TSP: cpu 0x%lx handled S-EL1 interrupt %u\n", in tsp_common_int_handler() 112 VERBOSE("TSP: cpu 0x%lx: %u S-EL1 requests\n", in tsp_common_int_handler()
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| /rk3399_ARM-atf/drivers/nxp/flexspi/nor/ |
| H A D | fspi.c | 64 VERBOSE("%s 0x%x\n", __func__, fspi_readl(FSPI_LCKCR)); in fspi_lock_LUT() 66 VERBOSE("%s 0x%x\n", __func__, fspi_readl(FSPI_LCKCR)); in fspi_lock_LUT() 72 VERBOSE("%s 0x%x\n", __func__, fspi_readl(FSPI_LCKCR)); in fspi_unlock_LUT() 74 VERBOSE("%s 0x%x\n", __func__, fspi_readl(FSPI_LCKCR)); in fspi_unlock_LUT() 82 VERBOSE("In func %s\n", __func__); in fspi_op_setup() 135 VERBOSE("CMD_ID = %x offset = 0x%x\n", cmd_id1, x_addr); in fspi_op_setup() 139 VERBOSE("CMD_ID = %x offset = 0x%x\n", cmd_id2, x_addr); in fspi_op_setup() 163 VERBOSE("In func %s\n", __func__); in fspi_setup_LUT() 197 VERBOSE("In func %s %d\n", __func__, __LINE__); in fspi_ahb_invalidate() 203 VERBOSE("In func %s %d\n", __func__, __LINE__); in fspi_ahb_invalidate() [all …]
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| /rk3399_ARM-atf/plat/imx/imx7/common/ |
| H A D | imx7_bl2_el3_common.c | 183 VERBOSE("\tOPTEE 0x%08x-0x%08x\n", IMX7_OPTEE_BASE, IMX7_OPTEE_LIMIT); in bl2_el3_early_platform_setup() 184 VERBOSE("\tATF/BL2 0x%08x-0x%08x\n", BL2_RAM_BASE, BL2_RAM_LIMIT); in bl2_el3_early_platform_setup() 185 VERBOSE("\tSHRAM 0x%08x-0x%08x\n", SHARED_RAM_BASE, SHARED_RAM_LIMIT); in bl2_el3_early_platform_setup() 186 VERBOSE("\tFIP 0x%08x-0x%08x\n", IMX_FIP_BASE, IMX_FIP_LIMIT); in bl2_el3_early_platform_setup() 187 VERBOSE("\tDTB-OVERLAY 0x%08x-0x%08x\n", IMX7_DTB_OVERLAY_BASE, IMX7_DTB_OVERLAY_LIMIT); in bl2_el3_early_platform_setup() 188 VERBOSE("\tDTB 0x%08x-0x%08x\n", IMX7_DTB_BASE, IMX7_DTB_LIMIT); in bl2_el3_early_platform_setup() 189 VERBOSE("\tUBOOT/BL33 0x%08x-0x%08x\n", IMX7_UBOOT_BASE, IMX7_UBOOT_LIMIT); in bl2_el3_early_platform_setup()
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| /rk3399_ARM-atf/plat/common/ |
| H A D | plat_spmd_manifest.c | 81 VERBOSE("SPM Core manifest attribute section:\n"); in manifest_parse_attribute() 82 VERBOSE(" version: %u.%u\n", attr->major_version, attr->minor_version); in manifest_parse_attribute() 83 VERBOSE(" spmc_id: 0x%x\n", attr->spmc_id); in manifest_parse_attribute() 84 VERBOSE(" binary_size: 0x%x\n", attr->binary_size); in manifest_parse_attribute() 85 VERBOSE(" load_address: 0x%" PRIx64 "\n", attr->load_address); in manifest_parse_attribute() 86 VERBOSE(" entrypoint: 0x%" PRIx64 "\n", attr->entrypoint); in manifest_parse_attribute() 138 VERBOSE("Reading SPM Core manifest at address %p\n", pm_addr); in plat_spm_core_manifest_load() 204 VERBOSE("Reading SPM Core manifest at address %p\n", pm_addr); in plat_spm_core_manifest_load()
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_xlat_setup.c | 18 VERBOSE("Trusted RAM seen by this BL image: %p - %p\n", in sq_mmap_setup() 25 VERBOSE("Code region: %p - %p\n", in sq_mmap_setup() 32 VERBOSE("Read-only data region: %p - %p\n", in sq_mmap_setup() 40 VERBOSE("Coherent region: %p - %p\n", in sq_mmap_setup()
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| /rk3399_ARM-atf/plat/nxp/common/setup/ |
| H A D | ls_common.c | 66 VERBOSE("DRAM Region %d: %p - %p\n", i, in mmap_add_ddr_regions_statically() 79 VERBOSE("Secure DRAM Region %d: %p - %p\n", i, in mmap_add_ddr_regions_statically() 99 VERBOSE("DRAM Region %d: %p - %p\n", i, in mmap_add_ddr_regions_statically() 120 VERBOSE("DRAM Region %d: %p - %p\n", i, in mmap_add_ddr_region_dynamically() 137 VERBOSE("Secure DRAM Region %d: %p - %p\n", i, in mmap_add_ddr_region_dynamically() 162 VERBOSE("DRAM Region %d: %p - %p\n", i, in mmap_add_ddr_region_dynamically() 206 VERBOSE("Memory seen by this BL image: %p - %p\n", in ls_setup_page_tables() 213 VERBOSE("Code region: %p - %p\n", in ls_setup_page_tables() 220 VERBOSE("Read-only data region: %p - %p\n", in ls_setup_page_tables() 228 VERBOSE("Coherent region: %p - %p\n", in ls_setup_page_tables() [all …]
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| /rk3399_ARM-atf/plat/marvell/armada/common/mss/ |
| H A D | mss_scp_bootloader.c | 134 VERBOSE("Chunk %d -> SRAM 0x%lx from 0x%lx SZ 0x%lx\n", in mss_image_load() 192 VERBOSE("MSS Control Block = 0x%x\n", MSS_SRAM_PM_CONTROL_BASE); in mss_ap_load_image() 193 VERBOSE("mss_pm_crtl->ipc_version = 0x%x\n", in mss_ap_load_image() 195 VERBOSE("mss_pm_crtl->num_of_cores = 0x%x\n", in mss_ap_load_image() 197 VERBOSE("mss_pm_crtl->num_of_clusters = 0x%x\n", in mss_ap_load_image() 199 VERBOSE("mss_pm_crtl->num_of_cores_per_cluster = 0x%x\n", in mss_ap_load_image() 201 VERBOSE("mss_pm_crtl->pm_trace_ctrl_base_address = 0x%x\n", in mss_ap_load_image() 203 VERBOSE("mss_pm_crtl->pm_trace_info_base_address = 0x%x\n", in mss_ap_load_image() 205 VERBOSE("mss_pm_crtl->pm_trace_info_core_size = 0x%x\n", in mss_ap_load_image() 209 VERBOSE("Send info about the SCP_BL2 image to be transferred to SCP\n"); in mss_ap_load_image() [all …]
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| /rk3399_ARM-atf/plat/arm/board/tc/ |
| H A D | tc_bl1_dpe.c | 88 VERBOSE("Waiting for DPE service initialization in RSE Secure Runtime\n"); in plat_dpe_get_context_handle() 103 VERBOSE("DPE init succeeded in %dms.\n", in plat_dpe_get_context_handle() 119 VERBOSE("Received DPE context handle: 0x%x\n", *ctx_handle); in plat_dpe_get_context_handle() 134 VERBOSE("Share DPE context handle with BL2: 0x%x\n", new_ctx_handle); in bl1_plat_mboot_finish() 146 VERBOSE("Save parent context handle: 0x%x\n", new_parent_ctx_handle); in bl1_plat_mboot_finish()
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| /rk3399_ARM-atf/plat/imx/imx8ulp/upower/ |
| H A D | upower_hal.c | 32 VERBOSE("finished successfully!\n"); in upower_status() 36 VERBOSE("memory allocation or resource failed!\n"); in upower_status() 39 VERBOSE("invalid argument!\n"); in upower_status() 42 VERBOSE("called in an invalid API state!\n"); in upower_status() 45 VERBOSE("invalid return status\n"); in upower_status() 168 VERBOSE("PMIC write reg[0x%x], val[0x%x]\n", reg_addr, reg_val); in upower_pmic_i2c_write() 198 VERBOSE("PMIC read reg[0x%x], val[0x%x]\n", reg_addr, *reg_val); in upower_pmic_i2c_read()
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| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_psci.c | 46 VERBOSE("%s: cpu_state: 0x%x\n", __func__, cpu_state); in socfpga_cpu_standby() 64 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr); in socfpga_pwr_domain_on() 105 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", in socfpga_pwr_domain_off() 128 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", in socfpga_pwr_domain_suspend() 145 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", in socfpga_pwr_domain_on_finish() 176 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", in socfpga_pwr_domain_suspend_finish() 278 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); in socfpga_validate_power_state() 285 VERBOSE("%s: ns_entrypoint: 0x%lx\n", __func__, ns_entrypoint); in socfpga_validate_ns_entrypoint()
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| /rk3399_ARM-atf/drivers/mtd/spi-mem/ |
| H A D | spi_mem.c | 95 VERBOSE("Cannot set speed (err=%d)\n", ret); in spi_mem_set_speed_mode() 101 VERBOSE("Cannot set mode (err=%d)\n", ret); in spi_mem_set_speed_mode() 113 VERBOSE("Ops claim bus is not defined\n"); in spi_mem_check_bus_ops() 118 VERBOSE("Ops release bus is not defined\n"); in spi_mem_check_bus_ops() 123 VERBOSE("Ops exec op is not defined\n"); in spi_mem_check_bus_ops() 128 VERBOSE("Ops set speed is not defined\n"); in spi_mem_check_bus_ops() 133 VERBOSE("Ops set mode is not defined\n"); in spi_mem_check_bus_ops() 154 VERBOSE("%s: cmd:%x mode:%d.%d.%d.%d addqr:%" PRIx64 " len:%x\n", in spi_mem_exec_op()
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_dyn_cfg.c | 150 VERBOSE("%sconfig_id = %d in bl_mem_params_node\n", in arm_bl2_dyn_cfg_init() 157 VERBOSE("%sconfig_id %d load info in FW_CONFIG\n", in arm_bl2_dyn_cfg_init() 173 VERBOSE("%s=%d as its %s is overflowing uptr\n", in arm_bl2_dyn_cfg_init() 184 VERBOSE("%s=%d as its %s is overlapping BL31\n", in arm_bl2_dyn_cfg_init() 194 VERBOSE("%s=%d as its %s is invalid\n", in arm_bl2_dyn_cfg_init() 208 VERBOSE("%s=%d as its %s is overlapping BL32\n", in arm_bl2_dyn_cfg_init()
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| H A D | plat_arm_sip_svc.c | 41 VERBOSE("Base address must be aligned to 4k.\n"); in plat_protect_memory() 47 VERBOSE("Base + Size results in overflow.\n"); in plat_protect_memory() 105 VERBOSE("SiP Call- Set interrupt pending %d\n", (uint32_t)x1); in plat_arm_sip_handler() 114 VERBOSE("Sip Call - Protect memory\n"); in plat_arm_sip_handler() 118 VERBOSE("Sip Call - Unprotect memory\n"); in plat_arm_sip_handler()
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| /rk3399_ARM-atf/drivers/marvell/mc_trustzone/ |
| H A D | mc_trustzone.c | 45 VERBOSE("%s: window size = 0x%" PRIx64 " maps to tz_size %d\n", in tz_enable_win() 61 VERBOSE("%s: base 0x%x, tz_size moved 0x%x, attr 0x%x, val 0x%x\n", in tz_enable_win() 66 VERBOSE("%s: Win%d[0x%x] configured to 0x%x\n", __func__, win_id, in tz_enable_win() 73 VERBOSE("%s: Win%d[0x%x] configured to 0x%x\n", __func__, win_id, in tz_enable_win()
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| /rk3399_ARM-atf/plat/marvell/armada/common/aarch64/ |
| H A D | marvell_common.c | 50 VERBOSE("Trusted SRAM seen by this BL image: %p - %p\n", in marvell_setup_page_tables() 57 VERBOSE("Code region: %p - %p\n", in marvell_setup_page_tables() 64 VERBOSE("Read-only data region: %p - %p\n", in marvell_setup_page_tables() 72 VERBOSE("Coherent region: %p - %p\n", in marvell_setup_page_tables()
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