| #
34b139e9 |
| 14-Apr-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(tsp): use %u to display unsigned values" into integration
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| #
3b06438d |
| 05-Jun-2024 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(tsp): use %u to display unsigned values
When enabling -Wformat-signedness option, several warnings occur when compiling TSP. For example: bl32/tsp/tsp_main.c: In function 'tsp_main': include/com
fix(tsp): use %u to display unsigned values
When enabling -Wformat-signedness option, several warnings occur when compiling TSP. For example: bl32/tsp/tsp_main.c: In function 'tsp_main': include/common/debug.h:47:41: error: format '%d' expects argument of type 'int', but argument 3 has type 'uint32_t' {aka 'unsigned int'} [-Werror=format=] 47 | #define LOG_MARKER_INFO "\x28" /* 40 */ | ^~~~~~ include/common/debug.h:83:32: note: in expansion of macro 'LOG_MARKER_INFO' 83 | # define INFO(...) tf_log(LOG_MARKER_INFO __VA_ARGS__) | ^~~~~~~~~~~~~~~ bl32/tsp/tsp_main.c:48:9: note: in expansion of macro 'INFO' 48 | INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on requests\n", | ^~~~
Use %u instead of %d to correct that (or PRIu64 instead of PRId64).
Change-Id: I50b4626d2090350c647bc9fd11a4d1bc174a4ee0 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
0c0bab0c |
| 25-Aug-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(tsp): enable test cases for EL3 SPMC feat(tsp): increase stack size for tsp feat(tsp): add ffa_helpers to enable more F
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(tsp): enable test cases for EL3 SPMC feat(tsp): increase stack size for tsp feat(tsp): add ffa_helpers to enable more FF-A functionality
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| #
15ca1ee3 |
| 23-Dec-2021 |
Marc Bonnici <marc.bonnici@arm.com> |
feat(tsp): enable test cases for EL3 SPMC
Introduce initial test cases to the TSP which are designed to be exercised by the FF-A Test Driver in the Normal World. These have been designed to test bas
feat(tsp): enable test cases for EL3 SPMC
Introduce initial test cases to the TSP which are designed to be exercised by the FF-A Test Driver in the Normal World. These have been designed to test basic functionality of the EL3 SPMC.
These tests currently ensure the following functionality: - Partition discovery. - Direct messaging. - Communication with a Logical SP. - Memory Sharing and Lending ABIs - Sharing of contiguous and non-contiguous memory regions. - Memory region descriptors spread of over multiple invocations.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Signed-off-by: Shruti Gupta <shruti.gupta@arm.com> Change-Id: Iaee4180aa18d6b7ac7b53685c6589f0ab306e876
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| #
19037a71 |
| 24-Aug-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(tsp): add FF-A support to the TSP feat(fvp/tsp_manifest): add example manifest for TSP fix(spmc): fix relinquish valida
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(tsp): add FF-A support to the TSP feat(fvp/tsp_manifest): add example manifest for TSP fix(spmc): fix relinquish validation check
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| #
4a8bfdb9 |
| 04-Oct-2021 |
Achin Gupta <achin.gupta@arm.com> |
feat(tsp): add FF-A support to the TSP
This patch adds the FF-A programming model in the test secure payload to ensure that it can be used to test the following spec features.
1. SP initialisation
feat(tsp): add FF-A support to the TSP
This patch adds the FF-A programming model in the test secure payload to ensure that it can be used to test the following spec features.
1. SP initialisation on the primary and secondary cpus. 2. An event loop to receive direct requests and respond with direct responses. 3. Ability to receive messages that indicate power on and off of a cpu. 4. Ability to handle a secure interrupt.
Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Signed-off-by: Shruti <shruti.gupta@arm.com> Change-Id: I81cf744904d5cdc0b27862b5e4bc6f2cfe58a13a
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| #
2242773d |
| 12-Nov-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix: use correct printf format for uint64_t" into integration
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| #
4ef449c1 |
| 12-Nov-2021 |
Manish Pandey <manish.pandey2@arm.com> |
fix: use correct printf format for uint64_t
sha 4ce3e99a3 introduced printf format specifiers for fixed width types, which uses PRI*64 instead of "ll" for 64 bit values.
Signed-off-by: Manish Pande
fix: use correct printf format for uint64_t
sha 4ce3e99a3 introduced printf format specifiers for fixed width types, which uses PRI*64 instead of "ll" for 64 bit values.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ic6811cc1788c698adde0807e5f8ab5290a900a26
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| #
9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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| #
09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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ccd130ea |
| 01-May-2018 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1255 from masahir0y/int-ll64
Use consistent int-ll64 typedefs for aarch32 and aarch64
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| #
0a2d5b43 |
| 02-Feb-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
types: use int-ll64 for both aarch32 and aarch64
Since commit 031dbb122472 ("AArch32: Add essential Arch helpers"), it is difficult to use consistent format strings for printf() family between aarch
types: use int-ll64 for both aarch32 and aarch64
Since commit 031dbb122472 ("AArch32: Add essential Arch helpers"), it is difficult to use consistent format strings for printf() family between aarch32 and aarch64.
For example, uint64_t is defined as 'unsigned long long' for aarch32 and as 'unsigned long' for aarch64. Likewise, uintptr_t is defined as 'unsigned int' for aarch32, and as 'unsigned long' for aarch64.
A problem typically arises when you use printf() in common code.
One solution could be, to cast the arguments to a type long enough for both architectures. For example, if 'val' is uint64_t type, like this:
printf("val = %llx\n", (unsigned long long)val);
Or, somebody may suggest to use a macro provided by <inttypes.h>, like this:
printf("val = %" PRIx64 "\n", val);
But, both would make the code ugly.
The solution adopted in Linux kernel is to use the same typedefs for all architectures. The fixed integer types in the kernel-space have been unified into int-ll64, like follows:
typedef signed char int8_t; typedef unsigned char uint8_t;
typedef signed short int16_t; typedef unsigned short uint16_t;
typedef signed int int32_t; typedef unsigned int uint32_t;
typedef signed long long int64_t; typedef unsigned long long uint64_t;
[ Linux commit: 0c79a8e29b5fcbcbfd611daf9d500cfad8370fcf ]
This gets along with the codebase shared between 32 bit and 64 bit, with the data model called ILP32, LP64, respectively.
The width for primitive types is defined as follows:
ILP32 LP64 int 32 32 long 32 64 long long 64 64 pointer 32 64
'long long' is 64 bit for both, so it is used for defining uint64_t. 'long' has the same width as pointer, so for uintptr_t.
We still need an ifdef conditional for (s)size_t.
All 64 bit architectures use "unsigned long" size_t, and most 32 bit architectures use "unsigned int" size_t. H8/300, S/390 are known as exceptions; they use "unsigned long" size_t despite their architecture is 32 bit.
One idea for simplification might be to define size_t as 'unsigned long' across architectures, then forbid the use of "%z" string format. However, this would cause a distortion between size_t and sizeof() operator. We have unknowledge about the native type of sizeof(), so we need a guess of it anyway. I want the following formula to always return 1:
__builtin_types_compatible_p(size_t, typeof(sizeof(int)))
Fortunately, ARM is probably a majority case. As far as I know, all 32 bit ARM compilers use "unsigned int" size_t.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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| #
82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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| #
4ca473db |
| 09-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #456 from soby-mathew/sm/gicv3-tsp-plat-changes-v2
Modify TSP and ARM standard platforms for new GIC drivers v2
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| #
02446137 |
| 03-Sep-2015 |
Soby Mathew <soby.mathew@arm.com> |
Enable use of FIQs and IRQs as TSP interrupts
On a GICv2 system, interrupts that should be handled in the secure world are typically signalled as FIQs. On a GICv3 system, these interrupts are signal
Enable use of FIQs and IRQs as TSP interrupts
On a GICv2 system, interrupts that should be handled in the secure world are typically signalled as FIQs. On a GICv3 system, these interrupts are signalled as IRQs instead. The mechanism for handling both types of interrupts is the same in both cases. This patch enables the TSP to run on a GICv3 system by:
1. adding support for handling IRQs in the exception handling code. 2. removing use of "fiq" in the names of data structures, macros and functions.
The build option TSPD_ROUTE_IRQ_TO_EL3 is deprecated and is replaced with a new build flag TSP_NS_INTR_ASYNC_PREEMPT. For compatibility reasons, if the former build flag is defined, it will be used to define the value for the new build flag. The documentation is also updated accordingly.
Change-Id: I1807d371f41c3656322dd259340a57649833065e
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| #
404dba53 |
| 22-Sep-2015 |
Soby Mathew <soby.mathew@arm.com> |
Unify interrupt return paths from TSP into the TSPD
The TSP is expected to pass control back to EL3 if it gets preempted due to an interrupt while handling a Standard SMC in the following scenarios:
Unify interrupt return paths from TSP into the TSPD
The TSP is expected to pass control back to EL3 if it gets preempted due to an interrupt while handling a Standard SMC in the following scenarios:
1. An FIQ preempts Standard SMC execution and that FIQ is not a TSP Secure timer interrupt or is preempted by a higher priority interrupt by the time the TSP acknowledges it. In this case, the TSP issues an SMC with the ID as `TSP_EL3_FIQ`. Currently this case is never expected to happen as only the TSP Secure Timer is expected to generate FIQ.
2. An IRQ preempts Standard SMC execution and in this case the TSP issues an SMC with the ID as `TSP_PREEMPTED`.
In both the cases, the TSPD hands control back to the normal world and returns returns an error code to the normal world to indicate that the standard SMC it had issued has been preempted but not completed.
This patch unifies the handling of these two cases in the TSPD and ensures that the TSP only uses TSP_PREEMPTED instead of separate SMC IDs. Also instead of 2 separate error codes, SMC_PREEMPTED and TSP_EL3_FIQ, only SMC_PREEMPTED is returned as error code back to the normal world.
Background information: On a GICv3 system, when the secure world has affinity routing enabled, in 2. an FIQ will preempt TSP execution instead of an IRQ. The FIQ could be a result of a Group 0 or a Group 1 NS interrupt. In both case, the TSPD passes control back to the normal world upon receipt of the TSP_PREEMPTED SMC. A Group 0 interrupt will immediately preempt execution to EL3 where it will be handled. This allows for unified interrupt handling in TSP for both GICv3 and GICv2 systems.
Change-Id: I9895344db74b188021e3f6a694701ad272fb40d4
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| #
432b9905 |
| 17-Aug-2015 |
Achin Gupta <achin.gupta@arm.com> |
Merge pull request #361 from achingupta/for_sm/psci_proto_v5
For sm/psci proto v5
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| #
fd650ff6 |
| 08-Jul-2015 |
Soby Mathew <soby.mathew@arm.com> |
PSCI: Migrate SPDs and TSP to the new platform and framework API
The new PSCI frameworks mandates that the platform APIs and the various frameworks in Trusted Firmware migrate away from MPIDR based
PSCI: Migrate SPDs and TSP to the new platform and framework API
The new PSCI frameworks mandates that the platform APIs and the various frameworks in Trusted Firmware migrate away from MPIDR based core identification to one based on core index. Deprecated versions of the old APIs are still present to provide compatibility but their implementations are not optimal. This patch migrates the various SPDs exisiting within Trusted Firmware tree and TSP to the new APIs.
Change-Id: Ifc37e7071c5769b5ded21d0b6a071c8c4cab7836
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| #
4731e8f0 |
| 29-Apr-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #295 from danh-arm/dh/plat-port-reorg
ARM platform port reorganization
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| #
1b70db06 |
| 23-Mar-2015 |
Dan Handley <dan.handley@arm.com> |
Fix type mismatches in verbose logging
Commit dad2504 adds support for type checking in printf-like functions. Some of the VERBOSE logging statements were not updated at that time.
Fix the type mis
Fix type mismatches in verbose logging
Commit dad2504 adds support for type checking in printf-like functions. Some of the VERBOSE logging statements were not updated at that time.
Fix the type mismatches in the verbose logging statements.
Change-Id: Idd9a49e41cc0dc31f7698e220819d934e3d2d10e
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| #
57a18ff4 |
| 19-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Merge pull request #181 from danh-arm/dh/tsp_fvp_dependency
Move TSP private declarations into separate header Clarify platform porting interface to TSP
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| #
5a06bb7e |
| 04-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Clarify platform porting interface to TSP
* Move TSP platform porting functions to new file: include/bl32/tsp/platform_tsp.h.
* Create new TSP_IRQ_SEC_PHY_TIMER definition for use by the generic
Clarify platform porting interface to TSP
* Move TSP platform porting functions to new file: include/bl32/tsp/platform_tsp.h.
* Create new TSP_IRQ_SEC_PHY_TIMER definition for use by the generic TSP interrupt handling code, instead of depending on the FVP specific definition IRQ_SEC_PHY_TIMER.
* Rename TSP platform porting functions from bl32_* to tsp_*, and definitions from BL32_* to TSP_*.
* Update generic TSP code to use new platform porting function names and definitions.
* Update FVP port accordingly and move all TSP source files to: plat/fvp/tsp/.
* Update porting guide with above changes.
Note: THIS CHANGE REQUIRES ALL PLATFORM PORTS OF THE TSP TO BE UPDATED
Fixes ARM-software/tf-issues#167
Change-Id: Ic0ff8caf72aebb378d378193d2f017599fc6b78f
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| #
da0af78a |
| 01-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Move TSP private declarations into separate header
Move the TSP private declarations out of tsp.h and into a new header, tsp_private.h. This clarifies the TSP interface to the TSPD.
Change-Id: I39a
Move TSP private declarations into separate header
Move the TSP private declarations out of tsp.h and into a new header, tsp_private.h. This clarifies the TSP interface to the TSPD.
Change-Id: I39af346eeba3350cadcac56c02d97a5cb978c28b
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| #
6f08fd5f |
| 12-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #183 from danh-arm/dh/print_output2
Add concept of console output log levels
Rationalize console log output
|