| /rk3399_ARM-atf/plat/brcm/board/stingray/include/ |
| H A D | platform_def.h | 102 #define BL1_RW_LIMIT (BL1_RW_BASE + 0x12000) macro
104 #define BL11_RW_BASE BL1_RW_LIMIT
114 #define BL2_RW_BASE BL1_RW_LIMIT
120 #define BL2_RW_BASE BL1_RW_LIMIT
124 #define BL2_BASE (BL1_RW_LIMIT + PAGE_SIZE)
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| H A D | sr_def.h | 462 #define BCM_ELOG_BL2_BASE BL1_RW_LIMIT
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| /rk3399_ARM-atf/plat/rpi/rpi3/include/ |
| H A D | platform_def.h | 171 #define BL1_RW_BASE (BL1_RW_LIMIT - PLAT_MAX_BL1_RW_SIZE)
172 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
179 BL1_RW_LIMIT - BL1_RW_BASE, \
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| /rk3399_ARM-atf/bl1/ |
| H A D | bl1.ld.S | 23 RAM (rwx): ORIGIN = BL1_RW_BASE, LENGTH = BL1_RW_LIMIT - BL1_RW_BASE
177 ASSERT(. <= BL1_RW_LIMIT, "BL1's RW section has exceeded its limit.")
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| /rk3399_ARM-atf/plat/hisilicon/poplar/include/ |
| H A D | poplar_layout.h | 122 #define BL1_RW_LIMIT (BL1_RW_BASE + BL1_RW_SIZE) macro
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| /rk3399_ARM-atf/plat/hisilicon/hikey/include/ |
| H A D | hikey_layout.h | 42 #define BL1_RW_LIMIT (0xF9898000) macro
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/include/ |
| H A D | platform_def.h | 56 #define BL1_RW_LIMIT (0x1B000000) macro
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| /rk3399_ARM-atf/include/plat/marvell/armada/a3k/common/ |
| H A D | marvell_def.h | 151 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/aarch64/ |
| H A D | hikey960_common.c | 30 BL1_RW_LIMIT - BL1_RW_BASE, \
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| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd3/ |
| H A D | nrd_css_fw_def3.h | 87 BL1_RW_LIMIT - BL1_RW_BASE, \
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| H A D | nrd_plat_arm_def3.h | 565 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
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| /rk3399_ARM-atf/plat/qemu/qemu/include/ |
| H A D | platform_def.h | 135 #define BL1_RW_BASE (BL1_RW_LIMIT - 0x12000)
136 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
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| /rk3399_ARM-atf/include/plat/marvell/armada/a8k/common/ |
| H A D | marvell_def.h | 182 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
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| /rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/ |
| H A D | platform_def.h | 131 #define BL1_RW_BASE (BL1_RW_LIMIT - BL1_SIZE)
132 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE - \ macro
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| /rk3399_ARM-atf/plat/intel/soc/common/include/ |
| H A D | platform_def.h | 122 #define BL1_RW_LIMIT (0xffe1ffff) macro
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| /rk3399_ARM-atf/include/plat/nuvoton/common/ |
| H A D | npcm845x_arm_def.h | 305 BL1_RW_BASE, BL1_RW_LIMIT - BL1_RW_BASE, \
427 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
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| /rk3399_ARM-atf/plat/arm/board/fvp_ve/include/ |
| H A D | platform_def.h | 210 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
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| /rk3399_ARM-atf/plat/arm/board/a5ds/include/ |
| H A D | platform_def.h | 227 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
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| /rk3399_ARM-atf/include/plat/arm/common/ |
| H A D | arm_def.h | 379 BL1_RW_LIMIT - BL1_RW_BASE, \
578 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
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| /rk3399_ARM-atf/docs/ |
| H A D | porting-guide.rst | 210 - **#define : BL1_RW_LIMIT**
|