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Searched refs:regmap_write (Results 1 – 25 of 1003) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-samsung-dcphy.c1286 regmap_write(samsung->regmap, BIAS_CON0, 0x0010); in samsung_mipi_dcphy_bias_block_enable()
1287 regmap_write(samsung->regmap, BIAS_CON1, 0x0110); in samsung_mipi_dcphy_bias_block_enable()
1288 regmap_write(samsung->regmap, BIAS_CON2, bias_con2); in samsung_mipi_dcphy_bias_block_enable()
1305 regmap_write(samsung->regmap, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000)); in samsung_mipi_dphy_lane_enable()
1311 regmap_write(samsung->regmap, DPHY_MD3_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1317 regmap_write(samsung->regmap, COMBO_MD2_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1323 regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1330 regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1340 regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000)); in samsung_mipi_cphy_lane_enable()
1341 regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000)); in samsung_mipi_cphy_lane_enable()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/adv7511/
H A Dadv7533.c42 regmap_write(adv->regmap_cec, 0x16, in adv7511_dsi_config_timing_gen()
46 regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4); in adv7511_dsi_config_timing_gen()
47 regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff); in adv7511_dsi_config_timing_gen()
48 regmap_write(adv->regmap_cec, 0x2a, hsw >> 4); in adv7511_dsi_config_timing_gen()
49 regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff); in adv7511_dsi_config_timing_gen()
50 regmap_write(adv->regmap_cec, 0x2c, hfp >> 4); in adv7511_dsi_config_timing_gen()
51 regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff); in adv7511_dsi_config_timing_gen()
52 regmap_write(adv->regmap_cec, 0x2e, hbp >> 4); in adv7511_dsi_config_timing_gen()
53 regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff); in adv7511_dsi_config_timing_gen()
56 regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4); in adv7511_dsi_config_timing_gen()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/tuners/
H A Dm88rs6000t.c108 ret = regmap_write(dev->regmap, 0x05, 0x40); in m88rs6000t_set_demod_mclk()
111 ret = regmap_write(dev->regmap, 0x11, 0x08); in m88rs6000t_set_demod_mclk()
114 ret = regmap_write(dev->regmap, 0x15, reg15); in m88rs6000t_set_demod_mclk()
117 ret = regmap_write(dev->regmap, 0x16, reg16); in m88rs6000t_set_demod_mclk()
120 ret = regmap_write(dev->regmap, 0x1D, reg1D); in m88rs6000t_set_demod_mclk()
123 ret = regmap_write(dev->regmap, 0x1E, reg1E); in m88rs6000t_set_demod_mclk()
126 ret = regmap_write(dev->regmap, 0x1F, reg1F); in m88rs6000t_set_demod_mclk()
129 ret = regmap_write(dev->regmap, 0x17, 0xc1); in m88rs6000t_set_demod_mclk()
132 ret = regmap_write(dev->regmap, 0x17, 0x81); in m88rs6000t_set_demod_mclk()
136 ret = regmap_write(dev->regmap, 0x05, 0x00); in m88rs6000t_set_demod_mclk()
[all …]
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dmt6358.c333 regmap_write(priv->regmap, MT6358_ZCD_CON0, 0x0000); in hp_zcd_disable()
895 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_sgen_event()
897 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_sgen_event()
899 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_sgen_event()
901 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_sgen_event()
912 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_sgen_event()
913 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_sgen_event()
937 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_aif_in_event()
939 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_aif_in_event()
941 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_aif_in_event()
[all …]
H A Drt1305.c395 regmap_write(regmap, RT1305_RESET, 0); in rt1305_reset()
1002 regmap_write(rt1305->regmap, RT1305_ADC_SET_3, 0x0219); in rt1305_calibrate()
1003 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcf, 0x5548); in rt1305_calibrate()
1004 regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320); in rt1305_calibrate()
1005 regmap_write(rt1305->regmap, RT1305_CLOCK_DETECT, 0x1000); in rt1305_calibrate()
1006 regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0600); in rt1305_calibrate()
1007 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xffd0); in rt1305_calibrate()
1008 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0080); in rt1305_calibrate()
1009 regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880); in rt1305_calibrate()
1010 regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe); in rt1305_calibrate()
[all …]
H A Drt715.c45 ret = regmap_write(regmap, addr, value); in rt715_index_write()
116 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
138 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
140 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
145 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
149 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
165 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
346 regmap_write(rt715->regmap, reg, val); in rt715_mux_put()
497 regmap_write(rt715->regmap, in rt715_set_bias_level()
505 regmap_write(rt715->regmap, in rt715_set_bias_level()
[all …]
H A Drt700.c37 ret = regmap_write(regmap, addr, value); in rt700_index_write()
279 regmap_write(rt700->regmap, in rt700_jack_init()
284 regmap_write(rt700->regmap, in rt700_jack_init()
286 regmap_write(rt700->regmap, in rt700_jack_init()
288 regmap_write(rt700->regmap, in rt700_jack_init()
298 regmap_write(rt700->regmap, in rt700_jack_init()
300 regmap_write(rt700->regmap, in rt700_jack_init()
302 regmap_write(rt700->regmap, in rt700_jack_init()
310 regmap_write(rt700->regmap, in rt700_jack_init()
388 regmap_write(rt700->regmap, in rt700_set_amp_gain_put()
[all …]
H A Drt711.c37 ret = regmap_write(regmap, addr, value); in rt711_index_write()
78 regmap_write(regmap, RT711_FUNC_RESET, 0); in rt711_reset()
92 regmap_write(rt711->regmap, in rt711_calibration()
128 regmap_write(rt711->regmap, in rt711_calibration()
361 regmap_write(rt711->regmap, in rt711_jack_init()
366 regmap_write(rt711->regmap, in rt711_jack_init()
368 regmap_write(rt711->regmap, in rt711_jack_init()
370 regmap_write(rt711->regmap, in rt711_jack_init()
402 regmap_write(rt711->regmap, in rt711_jack_init()
404 regmap_write(rt711->regmap, in rt711_jack_init()
[all …]
H A Drt1308-sdw.c110 regmap_write(rt1308->regmap, 0xe0, value); in rt1308_clock_config()
111 regmap_write(rt1308->regmap, 0xf0, value); in rt1308_clock_config()
197 regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0); in rt1308_io_init()
200 regmap_write(rt1308->regmap, 0xc360, 0x01); in rt1308_io_init()
201 regmap_write(rt1308->regmap, 0xc361, 0x80); in rt1308_io_init()
202 regmap_write(rt1308->regmap, 0xc7f0, 0x04); in rt1308_io_init()
203 regmap_write(rt1308->regmap, 0xc7f1, 0xfe); in rt1308_io_init()
205 regmap_write(rt1308->regmap, 0xc7f0, 0x44); in rt1308_io_init()
207 regmap_write(rt1308->regmap, 0xc240, 0x10); in rt1308_io_init()
231 regmap_write(rt1308->regmap, 0xc103, 0xc0); in rt1308_io_init()
[all …]
H A Dmt6359.c24 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
25 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
28 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
29 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ff8); in mt6359_reset_playback_gpio()
46 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x0e00); in mt6359_set_capture_gpio()
47 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x0200); in mt6359_set_capture_gpio()
49 regmap_write(priv->regmap, MT6359_GPIO_MODE4_CLR, 0x003f); in mt6359_set_capture_gpio()
50 regmap_write(priv->regmap, MT6359_GPIO_MODE4_SET, 0x0009); in mt6359_set_capture_gpio()
61 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x0e00); in mt6359_reset_capture_gpio()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A Dlontium-lt9611.c167 regmap_write(lt9611->regmap, 0x830d, (u8)(v_total / 256)); in lt9611_mipi_video_setup()
168 regmap_write(lt9611->regmap, 0x830e, (u8)(v_total % 256)); in lt9611_mipi_video_setup()
170 regmap_write(lt9611->regmap, 0x830f, (u8)(vactive / 256)); in lt9611_mipi_video_setup()
171 regmap_write(lt9611->regmap, 0x8310, (u8)(vactive % 256)); in lt9611_mipi_video_setup()
173 regmap_write(lt9611->regmap, 0x8311, (u8)(h_total / 256)); in lt9611_mipi_video_setup()
174 regmap_write(lt9611->regmap, 0x8312, (u8)(h_total % 256)); in lt9611_mipi_video_setup()
176 regmap_write(lt9611->regmap, 0x8313, (u8)(hactive / 256)); in lt9611_mipi_video_setup()
177 regmap_write(lt9611->regmap, 0x8314, (u8)(hactive % 256)); in lt9611_mipi_video_setup()
179 regmap_write(lt9611->regmap, 0x8315, (u8)(vsync_len % 256)); in lt9611_mipi_video_setup()
180 regmap_write(lt9611->regmap, 0x8316, (u8)(hsync_len % 256)); in lt9611_mipi_video_setup()
[all …]
H A Dchrontel-ch7033.c336 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_disable()
344 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_enable()
361 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_mode_set()
364 regmap_write(priv->regmap, 0x52, 0x00); in ch7033_bridge_mode_set()
366 regmap_write(priv->regmap, 0x52, RESETIB); in ch7033_bridge_mode_set()
371 regmap_write(priv->regmap, 0x03, 0x00); in ch7033_bridge_mode_set()
381 regmap_write(priv->regmap, 0x0b, (mode->htotal >> 8) << 3 | in ch7033_bridge_mode_set()
383 regmap_write(priv->regmap, 0x0c, mode->hdisplay); in ch7033_bridge_mode_set()
384 regmap_write(priv->regmap, 0x0d, mode->htotal); in ch7033_bridge_mode_set()
385 regmap_write(priv->regmap, 0x0e, (hsynclen >> 8) << 3 | in ch7033_bridge_mode_set()
[all …]
/OK3568_Linux_fs/kernel/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_aux.c29 ret = regmap_write(st->map, st->reg->sample_rate_div, d); in inv_mpu_i2c_master_xfer()
35 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); in inv_mpu_i2c_master_xfer()
44 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); in inv_mpu_i2c_master_xfer()
50 ret = regmap_write(st->map, st->reg->sample_rate_div, d); in inv_mpu_i2c_master_xfer()
57 regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl); in inv_mpu_i2c_master_xfer()
59 regmap_write(st->map, st->reg->sample_rate_div, st->chip_config.divider); in inv_mpu_i2c_master_xfer()
77 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_MST_CTRL, val); in inv_mpu_aux_init()
82 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, 0); in inv_mpu_aux_init()
91 return regmap_write(st->map, INV_MPU6050_REG_I2C_MST_DELAY_CTRL, val); in inv_mpu_aux_init()
114 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), in inv_mpu_aux_read()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Drtl2832_sdr.c546 ret = regmap_write(dev->regmap, 0x1b1, u8tmp1); in rtl2832_sdr_set_adc()
550 ret = regmap_write(dev->regmap, 0x008, u8tmp2); in rtl2832_sdr_set_adc()
554 ret = regmap_write(dev->regmap, 0x006, 0x80); in rtl2832_sdr_set_adc()
581 ret = regmap_write(dev->regmap, 0x019, 0x05); in rtl2832_sdr_set_adc()
596 ret = regmap_write(dev->regmap, 0x061, 0x60); in rtl2832_sdr_set_adc()
603 ret = regmap_write(dev->regmap, 0x112, 0x5a); in rtl2832_sdr_set_adc()
604 ret = regmap_write(dev->regmap, 0x102, 0x40); in rtl2832_sdr_set_adc()
605 ret = regmap_write(dev->regmap, 0x103, 0x5a); in rtl2832_sdr_set_adc()
606 ret = regmap_write(dev->regmap, 0x1c7, 0x30); in rtl2832_sdr_set_adc()
607 ret = regmap_write(dev->regmap, 0x104, 0xd0); in rtl2832_sdr_set_adc()
[all …]
H A Dts2020.c68 ret = regmap_write(priv->regmap, u8tmp, 0x00); in ts2020_sleep()
86 regmap_write(priv->regmap, 0x42, 0x73); in ts2020_init()
87 regmap_write(priv->regmap, 0x05, priv->clk_out_div); in ts2020_init()
88 regmap_write(priv->regmap, 0x20, 0x27); in ts2020_init()
89 regmap_write(priv->regmap, 0x07, 0x02); in ts2020_init()
90 regmap_write(priv->regmap, 0x11, 0xff); in ts2020_init()
91 regmap_write(priv->regmap, 0x60, 0xf9); in ts2020_init()
92 regmap_write(priv->regmap, 0x08, 0x01); in ts2020_init()
93 regmap_write(priv->regmap, 0x00, 0x41); in ts2020_init()
109 regmap_write(priv->regmap, 0x00, 0x01); in ts2020_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun8i_vi_scaler.c890 regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, i), in sun8i_vi_scaler_set_coeff()
892 regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, i), in sun8i_vi_scaler_set_coeff()
894 regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, i), in sun8i_vi_scaler_set_coeff()
896 regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, i), in sun8i_vi_scaler_set_coeff()
903 regmap_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, i), in sun8i_vi_scaler_set_coeff()
905 regmap_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, i), in sun8i_vi_scaler_set_coeff()
922 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_enable()
967 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_setup()
971 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_setup()
973 regmap_write(mixer->engine.regs, in sun8i_vi_scaler_setup()
[all …]
H A Dsun4i_frontend.c89 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i), in sun4i_frontend_scaler_init()
91 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i), in sun4i_frontend_scaler_init()
93 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i), in sun4i_frontend_scaler_init()
95 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i), in sun4i_frontend_scaler_init()
97 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTCOEF_REG(i), in sun4i_frontend_scaler_init()
99 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTCOEF_REG(i), in sun4i_frontend_scaler_init()
179 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF0_REG, in sun4i_frontend_update_buffer()
186 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF1_REG, in sun4i_frontend_update_buffer()
194 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF2_REG, in sun4i_frontend_update_buffer()
209 regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, in sun4i_frontend_update_buffer()
[all …]
/OK3568_Linux_fs/kernel/drivers/power/reset/
H A Darm-versatile-reboot.c79 regmap_write(syscon_regmap, INTEGRATOR_HDR_LOCK_OFFSET, in versatile_reboot()
87 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
93 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
97 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
99 regmap_write(syscon_regmap, in versatile_reboot()
103 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
105 regmap_write(syscon_regmap, in versatile_reboot()
110 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
112 regmap_write(syscon_regmap, VERSATILE_SYS_RESETCTL_OFFSET, in versatile_reboot()
114 regmap_write(syscon_regmap, VERSATILE_SYS_RESETCTL_OFFSET, in versatile_reboot()
[all …]
H A Doxnas-restart.c136 regmap_write(ctx->sys_ctrl, OX820_RST_SET_REGOFFSET, value); in ox820_restart_handle()
139 regmap_write(ctx->sys_ctrl, OX820_RST_CLR_REGOFFSET, in ox820_restart_handle()
161 regmap_write(ctx->sys_ctrl, OX820_CLK_CLR_REGOFFSET, value); in ox820_restart_handle()
166 regmap_write(ctx->sys_ctrl, OX820_SECONDARY_SEL_REGOFFSET, 0); in ox820_restart_handle()
167 regmap_write(ctx->sys_ctrl, OX820_TERTIARY_SEL_REGOFFSET, 0); in ox820_restart_handle()
168 regmap_write(ctx->sys_ctrl, OX820_QUATERNARY_SEL_REGOFFSET, 0); in ox820_restart_handle()
169 regmap_write(ctx->sys_ctrl, OX820_DEBUG_SEL_REGOFFSET, 0); in ox820_restart_handle()
170 regmap_write(ctx->sys_ctrl, OX820_ALTERNATIVE_SEL_REGOFFSET, 0); in ox820_restart_handle()
171 regmap_write(ctx->sys_ctrl, OX820_PULLUP_SEL_REGOFFSET, 0); in ox820_restart_handle()
173 regmap_write(ctx->sys_ctrl, OX820_SEC_SECONDARY_SEL_REGOFFSET, 0); in ox820_restart_handle()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/meson/
H A Dmeson_vclk.c246 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800023d); in meson_venci_cvbs_clock_config()
247 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00404e00); in meson_venci_cvbs_clock_config()
248 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); in meson_venci_cvbs_clock_config()
249 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); in meson_venci_cvbs_clock_config()
250 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_venci_cvbs_clock_config()
251 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); in meson_venci_cvbs_clock_config()
252 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4800023d); in meson_venci_cvbs_clock_config()
259 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4000027b); in meson_venci_cvbs_clock_config()
260 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb300); in meson_venci_cvbs_clock_config()
261 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0xa6212844); in meson_venci_cvbs_clock_config()
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/
H A Dlt8619c.c296 regmap_write(lt8619c->reg_map, BANK_REG, BANK_60); in lt8619c_get_detected_timings()
336 regmap_write(lt8619c->reg_map, BANK_REG, BANK_80); in lt8619c_get_detected_timings()
459 regmap_write(lt8619c->reg_map, BANK_REG, BANK_80); in lt8619c_load_hdcpkey()
460 regmap_write(lt8619c->reg_map, 0xb2, 0x50); in lt8619c_load_hdcpkey()
461 regmap_write(lt8619c->reg_map, 0xa3, 0x77); in lt8619c_load_hdcpkey()
470 regmap_write(lt8619c->reg_map, 0xb2, 0xd0); in lt8619c_load_hdcpkey()
471 regmap_write(lt8619c->reg_map, 0xa3, 0x57); in lt8619c_load_hdcpkey()
492 regmap_write(lt8619c->reg_map, BANK_REG, BANK_80); in lt8619c_mode_config()
495 regmap_write(lt8619c->reg_map, BANK_REG, BANK_60); in lt8619c_mode_config()
496 regmap_write(lt8619c->reg_map, 0x80, CLK_SRC); in lt8619c_mode_config()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/rk628/
H A Drk628_combrxphy.c164 regmap_write(combrxphy->regmap, REG(0x661c), val); in rk628_combrxphy_set_dc_gain()
182 regmap_write(combrxphy->regmap, REG(0x6618), val); in rk628_combrxphy_set_sample_edge_round()
191 regmap_write(combrxphy->regmap, REG(0x66f0), val); in rk628_combrxphy_start_sample_edge()
194 regmap_write(combrxphy->regmap, REG(0x66f0), val); in rk628_combrxphy_start_sample_edge()
205 regmap_write(combrxphy->regmap, REG(0x6634), val); in rk628_combrxphy_set_sample_edge_mode()
215 regmap_write(combrxphy->regmap, REG(0x6700), val); in rk628_combrxphy_select_channel()
224 regmap_write(combrxphy->regmap, REG(0x6730), val); in rk628_combrxphy_cfg_6730()
290 regmap_write(combrxphy->regmap, REG(0x6708), edge); in rk628_combrxphy_sample_edge_procedure_for_cable()
398 regmap_write(combrxphy->regmap, REG(0x6708), edge); in rk628_combrxphy_sample_edge_procedure()
464 regmap_write(combrxphy->regmap, REG(0x6630), val); in rk628_combrxphy_try_clk_detect()
[all …]
/OK3568_Linux_fs/kernel/sound/soc/uniphier/
H A Daio-core.c91 regmap_write(r, SG_AOUTEN, (enable) ? ~0 : 0); in aio_iecout_set_enable()
205 regmap_write(r, A2RBNMAPCTR0(sub->swm->rb.hw), in aio_init()
207 regmap_write(r, A2CHNMAPCTR0(sub->swm->ch.hw), in aio_init()
215 regmap_write(r, A2IIFNMAPCTR0(sub->swm->iif.hw), in aio_init()
217 regmap_write(r, A2IPORTNMAPCTR0(sub->swm->iport.hw), in aio_init()
220 regmap_write(r, A2OIFNMAPCTR0(sub->swm->oif.hw), in aio_init()
222 regmap_write(r, A2OPORTNMAPCTR0(sub->swm->oport.hw), in aio_init()
227 regmap_write(r, A2OIFNMAPCTR0(sub->swm->oif.hw), in aio_init()
229 regmap_write(r, A2OPORTNMAPCTR0(sub->swm->oport.hw), in aio_init()
231 regmap_write(r, A2CHNMAPCTR0(sub->swm->och.hw), in aio_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/lantiq/
H A Dphy-lantiq-vrx200-pcie.c103 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL1, 0x120e); in ltq_vrx200_pcie_phy_common_setup()
106 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL2, 0x39d7); in ltq_vrx200_pcie_phy_common_setup()
107 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL3, 0x0900); in ltq_vrx200_pcie_phy_common_setup()
110 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_EI, 0x0004); in ltq_vrx200_pcie_phy_common_setup()
111 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_A_CTRL, 0x6803); in ltq_vrx200_pcie_phy_common_setup()
118 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL2, 0x0706); in ltq_vrx200_pcie_phy_common_setup()
121 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL3, 0x1fff); in ltq_vrx200_pcie_phy_common_setup()
124 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL1, 0x0810); in ltq_vrx200_pcie_phy_common_setup()
131 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL2, 0x2e00); in ltq_vrx200_pcie_phy_common_setup()
134 regmap_write(priv->phy_regmap, PCIE_PHY_TX2_CTRL2, 0x3096); in ltq_vrx200_pcie_phy_common_setup()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-rk.c130 return regmap_write(bsp_priv->xpcs, in xpcs_write()
247 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M); in rk_gmac_integrated_ephy_powerup()
248 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE); in rk_gmac_integrated_ephy_powerup()
250 regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID); in rk_gmac_integrated_ephy_powerup()
251 regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID); in rk_gmac_integrated_ephy_powerup()
255 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); in rk_gmac_integrated_ephy_powerup()
262 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE); in rk_gmac_integrated_ephy_powerup()
269 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); in rk_gmac_integrated_ephy_powerdown()
303 regmap_write(priv->grf, ctrl_offset, in rk_gmac_integrated_fephy_power()
318 regmap_write(priv->grf, bgs_offset, bgs); in rk_gmac_integrated_fephy_power()
[all …]

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