xref: /OK3568_Linux_fs/kernel/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) Rockchip Electronics Co.Ltd
4*4882a593Smuzhiyun  * Author:
5*4882a593Smuzhiyun  *      Guochun Huang <hero.huang@rock-chips.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/of_device.h>
14*4882a593Smuzhiyun #include <linux/phy/phy.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/reset.h>
19*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
20*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
21*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
22*4882a593Smuzhiyun #include <media/v4l2-device.h>
23*4882a593Smuzhiyun #include "phy-rockchip-csi2-dphy-common.h"
24*4882a593Smuzhiyun #include "phy-rockchip-samsung-dcphy.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))
27*4882a593Smuzhiyun #define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK((h), (l)) << 16))
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define BIAS_CON0		0x0000
30*4882a593Smuzhiyun #define BIAS_CON1		0x0004
31*4882a593Smuzhiyun #define BIAS_CON2		0x0008
32*4882a593Smuzhiyun #define BIAS_CON4		0x0010
33*4882a593Smuzhiyun #define I_MUX_SEL_MASK		GENMASK(6, 5)
34*4882a593Smuzhiyun #define I_MUX_SEL(x)		UPDATE(x, 6, 5)
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define PLL_CON0		0x0100
37*4882a593Smuzhiyun #define PLL_EN			BIT(12)
38*4882a593Smuzhiyun #define S_MASK			GENMASK(10, 8)
39*4882a593Smuzhiyun #define S(x)			UPDATE(x, 10, 8)
40*4882a593Smuzhiyun #define P_MASK			GENMASK(5, 0)
41*4882a593Smuzhiyun #define P(x)			UPDATE(x, 5, 0)
42*4882a593Smuzhiyun #define PLL_CON1		0x0104
43*4882a593Smuzhiyun #define PLL_CON2		0x0108
44*4882a593Smuzhiyun #define M_MASK			GENMASK(9, 0)
45*4882a593Smuzhiyun #define M(x)			UPDATE(x, 9, 0)
46*4882a593Smuzhiyun #define PLL_CON3		0x010c
47*4882a593Smuzhiyun #define MRR_MASK		GENMASK(13, 8)
48*4882a593Smuzhiyun #define MRR(x)			UPDATE(x, 13, 8)
49*4882a593Smuzhiyun #define MFR_MASK                GENMASK(7, 0)
50*4882a593Smuzhiyun #define MFR(x)			UPDATE(x, 7, 0)
51*4882a593Smuzhiyun #define PLL_CON4		0x0110
52*4882a593Smuzhiyun #define SSCG_EN			BIT(11)
53*4882a593Smuzhiyun #define PLL_CON5		0x0114
54*4882a593Smuzhiyun #define RESET_N_SEL		BIT(10)
55*4882a593Smuzhiyun #define PLL_ENABLE_SEL		BIT(8)
56*4882a593Smuzhiyun #define PLL_CON6		0x0118
57*4882a593Smuzhiyun #define PLL_CON7		0x011c
58*4882a593Smuzhiyun #define PLL_LOCK_CNT(x)		UPDATE(x, 15, 0)
59*4882a593Smuzhiyun #define PLL_CON8		0x0120
60*4882a593Smuzhiyun #define PLL_STB_CNT(x)		UPDATE(x, 15, 0)
61*4882a593Smuzhiyun #define PLL_STAT0		0x0140
62*4882a593Smuzhiyun #define PLL_LOCK		BIT(0)
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #define DPHY_MC_GNR_CON0	0x0300
65*4882a593Smuzhiyun #define PHY_READY		BIT(1)
66*4882a593Smuzhiyun #define PHY_ENABLE		BIT(0)
67*4882a593Smuzhiyun #define DPHY_MC_GNR_CON1	0x0304
68*4882a593Smuzhiyun #define T_PHY_READY(x)		UPDATE(x, 15, 0)
69*4882a593Smuzhiyun #define DPHY_MC_ANA_CON0	0x0308
70*4882a593Smuzhiyun #define DPHY_MC_ANA_CON1	0x030c
71*4882a593Smuzhiyun #define DPHY_MC_ANA_CON2	0x0310
72*4882a593Smuzhiyun #define HS_VREG_AMP_ICON(x)	UPDATE(x, 1, 0)
73*4882a593Smuzhiyun #define DPHY_MC_TIME_CON0	0x0330
74*4882a593Smuzhiyun #define HSTX_CLK_SEL		BIT(12)
75*4882a593Smuzhiyun #define T_LPX(x)		UPDATE(x, 11, 4)
76*4882a593Smuzhiyun #define DPHY_MC_TIME_CON1	0x0334
77*4882a593Smuzhiyun #define T_CLK_ZERO(x)		UPDATE(x, 15, 8)
78*4882a593Smuzhiyun #define T_CLK_PREPARE(x)	UPDATE(x, 7, 0)
79*4882a593Smuzhiyun #define DPHY_MC_TIME_CON2	0x0338
80*4882a593Smuzhiyun #define T_HS_EXIT(x)		UPDATE(x, 15, 8)
81*4882a593Smuzhiyun #define T_CLK_TRAIL(x)		UPDATE(x, 7, 0)
82*4882a593Smuzhiyun #define DPHY_MC_TIME_CON3	0x033c
83*4882a593Smuzhiyun #define T_CLK_POST(x)		UPDATE(x, 7, 0)
84*4882a593Smuzhiyun #define DPHY_MC_TIME_CON4	0x0340
85*4882a593Smuzhiyun #define T_ULPS_EXIT(x)		UPDATE(x, 9, 0)
86*4882a593Smuzhiyun #define DPHY_MC_DESKEW_CON0	0x0350
87*4882a593Smuzhiyun #define SKEW_CAL_RUN_TIME(x)	UPDATE(x, 15, 12)
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define SKEW_CAL_INIT_RUN_TIME(x)	UPDATE(x, 11, 8)
90*4882a593Smuzhiyun #define SKEW_CAL_INIT_WAIT_TIME(x)	UPDATE(x, 7, 4)
91*4882a593Smuzhiyun #define SKEW_CAL_EN			BIT(0)
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define COMBO_MD0_GNR_CON0	0x0400
94*4882a593Smuzhiyun #define COMBO_MD0_GNR_CON1	0x0404
95*4882a593Smuzhiyun #define COMBO_MD0_ANA_CON0	0x0408
96*4882a593Smuzhiyun #define COMBO_MD0_ANA_CON1      0x040C
97*4882a593Smuzhiyun #define COMBO_MD0_ANA_CON2	0x0410
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun #define COMBO_MD0_TIME_CON0	0x0430
100*4882a593Smuzhiyun #define COMBO_MD0_TIME_CON1	0x0434
101*4882a593Smuzhiyun #define COMBO_MD0_TIME_CON2	0x0438
102*4882a593Smuzhiyun #define COMBO_MD0_TIME_CON3	0x043C
103*4882a593Smuzhiyun #define COMBO_MD0_TIME_CON4	0x0440
104*4882a593Smuzhiyun #define COMBO_MD0_DATA_CON0	0x0444
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #define COMBO_MD1_GNR_CON0	0x0500
107*4882a593Smuzhiyun #define COMBO_MD1_GNR_CON1	0x0504
108*4882a593Smuzhiyun #define COMBO_MD1_ANA_CON0	0x0508
109*4882a593Smuzhiyun #define COMBO_MD1_ANA_CON1	0x050c
110*4882a593Smuzhiyun #define COMBO_MD1_ANA_CON2	0x0510
111*4882a593Smuzhiyun #define COMBO_MD1_TIME_CON0	0x0530
112*4882a593Smuzhiyun #define COMBO_MD1_TIME_CON1	0x0534
113*4882a593Smuzhiyun #define COMBO_MD1_TIME_CON2	0x0538
114*4882a593Smuzhiyun #define COMBO_MD1_TIME_CON3	0x053C
115*4882a593Smuzhiyun #define COMBO_MD1_TIME_CON4	0x0540
116*4882a593Smuzhiyun #define COMBO_MD1_DATA_CON0	0x0544
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #define COMBO_MD2_GNR_CON0	0x0600
119*4882a593Smuzhiyun #define COMBO_MD2_GNR_CON1	0x0604
120*4882a593Smuzhiyun #define COMBO_MD2_ANA_CON0	0X0608
121*4882a593Smuzhiyun #define COMBO_MD2_ANA_CON1	0X060C
122*4882a593Smuzhiyun #define COMBO_MD2_ANA_CON2	0X0610
123*4882a593Smuzhiyun #define COMBO_MD2_TIME_CON0	0x0630
124*4882a593Smuzhiyun #define COMBO_MD2_TIME_CON1	0x0634
125*4882a593Smuzhiyun #define COMBO_MD2_TIME_CON2	0x0638
126*4882a593Smuzhiyun #define COMBO_MD2_TIME_CON3	0x063C
127*4882a593Smuzhiyun #define COMBO_MD2_TIME_CON4	0x0640
128*4882a593Smuzhiyun #define COMBO_MD2_DATA_CON0	0x0644
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define DPHY_MD3_GNR_CON0	0x0700
131*4882a593Smuzhiyun #define DPHY_MD3_GNR_CON1	0x0704
132*4882a593Smuzhiyun #define DPHY_MD3_ANA_CON0	0X0708
133*4882a593Smuzhiyun #define DPHY_MD3_ANA_CON1	0X070C
134*4882a593Smuzhiyun #define DPHY_MD3_ANA_CON2	0X0710
135*4882a593Smuzhiyun #define DPHY_MD3_TIME_CON0	0x0730
136*4882a593Smuzhiyun #define DPHY_MD3_TIME_CON1	0x0734
137*4882a593Smuzhiyun #define DPHY_MD3_TIME_CON2	0x0738
138*4882a593Smuzhiyun #define DPHY_MD3_TIME_CON3	0x073C
139*4882a593Smuzhiyun #define DPHY_MD3_TIME_CON4	0x0740
140*4882a593Smuzhiyun #define DPHY_MD3_DATA_CON0	0x0744
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #define T_LP_EXIT_SKEW(x)	UPDATE(x, 3, 2)
143*4882a593Smuzhiyun #define T_LP_ENTRY_SKEW(x)	UPDATE(x, 1, 0)
144*4882a593Smuzhiyun #define T_HS_ZERO(x)		UPDATE(x, 15, 8)
145*4882a593Smuzhiyun #define T_HS_PREPARE(x)		UPDATE(x, 7, 0)
146*4882a593Smuzhiyun #define T_HS_EXIT(x)		UPDATE(x, 15, 8)
147*4882a593Smuzhiyun #define T_HS_TRAIL(x)		UPDATE(x, 7, 0)
148*4882a593Smuzhiyun #define T_TA_GET(x)		UPDATE(x, 7, 4)
149*4882a593Smuzhiyun #define T_TA_GO(x)		UPDATE(x, 3, 0)
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun /* MIPI_CDPHY_GRF registers */
152*4882a593Smuzhiyun #define MIPI_DCPHY_GRF_CON0	0x0000
153*4882a593Smuzhiyun #define S_CPHY_MODE		HIWORD_UPDATE(1, 3, 3)
154*4882a593Smuzhiyun #define M_CPHY_MODE		HIWORD_UPDATE(1, 0, 0)
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #define MAX_DPHY_BW		4500000L
157*4882a593Smuzhiyun #define MAX_CPHY_BW		2000000L
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #define RX_CLK_THS_SETTLE		(0xb30)
160*4882a593Smuzhiyun #define RX_LANE0_THS_SETTLE		(0xC30)
161*4882a593Smuzhiyun #define RX_LANE0_ERR_SOT_SYNC		(0xC34)
162*4882a593Smuzhiyun #define RX_LANE1_THS_SETTLE		(0xD30)
163*4882a593Smuzhiyun #define RX_LANE1_ERR_SOT_SYNC		(0xD34)
164*4882a593Smuzhiyun #define RX_LANE2_THS_SETTLE		(0xE30)
165*4882a593Smuzhiyun #define RX_LANE2_ERR_SOT_SYNC		(0xE34)
166*4882a593Smuzhiyun #define RX_LANE3_THS_SETTLE		(0xF30)
167*4882a593Smuzhiyun #define RX_LANE3_ERR_SOT_SYNC		(0xF34)
168*4882a593Smuzhiyun #define RX_CLK_LANE_ENABLE		(0xB00)
169*4882a593Smuzhiyun #define RX_DATA_LANE0_ENABLE		(0xC00)
170*4882a593Smuzhiyun #define RX_DATA_LANE1_ENABLE		(0xD00)
171*4882a593Smuzhiyun #define RX_DATA_LANE2_ENABLE		(0xE00)
172*4882a593Smuzhiyun #define RX_DATA_LANE3_ENABLE		(0xF00)
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun #define RX_S0C_GNR_CON1			(0xB04)
175*4882a593Smuzhiyun #define RX_S0C_ANA_CON1			(0xB0c)
176*4882a593Smuzhiyun #define RX_S0C_ANA_CON2			(0xB10)
177*4882a593Smuzhiyun #define RX_S0C_ANA_CON3			(0xB14)
178*4882a593Smuzhiyun #define RX_COMBO_S0D0_GNR_CON1		(0xC04)
179*4882a593Smuzhiyun #define RX_COMBO_S0D0_ANA_CON1		(0xC0c)
180*4882a593Smuzhiyun #define RX_COMBO_S0D0_ANA_CON2		(0xC10)
181*4882a593Smuzhiyun #define RX_COMBO_S0D0_ANA_CON3		(0xC14)
182*4882a593Smuzhiyun #define RX_COMBO_S0D0_ANA_CON6		(0xC20)
183*4882a593Smuzhiyun #define RX_COMBO_S0D0_ANA_CON7		(0xC24)
184*4882a593Smuzhiyun #define RX_COMBO_S0D0_DESKEW_CON0	(0xC40)
185*4882a593Smuzhiyun #define RX_COMBO_S0D0_DESKEW_CON2	(0xC48)
186*4882a593Smuzhiyun #define RX_COMBO_S0D0_DESKEW_CON4	(0xC50)
187*4882a593Smuzhiyun #define RX_COMBO_S0D0_CRC_CON1		(0xC64)
188*4882a593Smuzhiyun #define RX_COMBO_S0D0_CRC_CON2		(0xC68)
189*4882a593Smuzhiyun #define RX_COMBO_S0D1_GNR_CON1		(0xD04)
190*4882a593Smuzhiyun #define RX_COMBO_S0D1_ANA_CON1		(0xD0c)
191*4882a593Smuzhiyun #define RX_COMBO_S0D1_ANA_CON2		(0xD10)
192*4882a593Smuzhiyun #define RX_COMBO_S0D1_ANA_CON3		(0xD14)
193*4882a593Smuzhiyun #define RX_COMBO_S0D1_ANA_CON6		(0xD20)
194*4882a593Smuzhiyun #define RX_COMBO_S0D1_ANA_CON7		(0xD24)
195*4882a593Smuzhiyun #define RX_COMBO_S0D1_DESKEW_CON0	(0xD40)
196*4882a593Smuzhiyun #define RX_COMBO_S0D1_DESKEW_CON2	(0xD48)
197*4882a593Smuzhiyun #define RX_COMBO_S0D1_DESKEW_CON4	(0xD50)
198*4882a593Smuzhiyun #define RX_COMBO_S0D1_CRC_CON1		(0xD64)
199*4882a593Smuzhiyun #define RX_COMBO_S0D1_CRC_CON2		(0xD68)
200*4882a593Smuzhiyun #define RX_COMBO_S0D2_GNR_CON1		(0xE04)
201*4882a593Smuzhiyun #define RX_COMBO_S0D2_ANA_CON1		(0xE0c)
202*4882a593Smuzhiyun #define RX_COMBO_S0D2_ANA_CON2		(0xE10)
203*4882a593Smuzhiyun #define RX_COMBO_S0D2_ANA_CON3		(0xE14)
204*4882a593Smuzhiyun #define RX_COMBO_S0D2_ANA_CON6		(0xE20)
205*4882a593Smuzhiyun #define RX_COMBO_S0D2_ANA_CON7		(0xE24)
206*4882a593Smuzhiyun #define RX_COMBO_S0D2_DESKEW_CON0	(0xE40)
207*4882a593Smuzhiyun #define RX_COMBO_S0D2_DESKEW_CON2	(0xE48)
208*4882a593Smuzhiyun #define RX_COMBO_S0D2_DESKEW_CON4	(0xE50)
209*4882a593Smuzhiyun #define RX_COMBO_S0D2_CRC_CON1		(0xE64)
210*4882a593Smuzhiyun #define RX_COMBO_S0D2_CRC_CON2		(0xE68)
211*4882a593Smuzhiyun #define RX_S0D3_GNR_CON1		(0xF04)
212*4882a593Smuzhiyun #define RX_S0D3_ANA_CON1		(0xF0c)
213*4882a593Smuzhiyun #define RX_S0D3_ANA_CON2		(0xF10)
214*4882a593Smuzhiyun #define RX_S0D3_ANA_CON3		(0xF14)
215*4882a593Smuzhiyun #define RX_S0D3_DESKEW_CON0		(0xF40)
216*4882a593Smuzhiyun #define RX_S0D3_DESKEW_CON2		(0xF48)
217*4882a593Smuzhiyun #define RX_S0D3_DESKEW_CON4		(0xF50)
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun struct samsung_mipi_dphy_timing {
220*4882a593Smuzhiyun 	unsigned int max_lane_mbps;
221*4882a593Smuzhiyun 	u8 clk_prepare;
222*4882a593Smuzhiyun 	u8 clk_zero;
223*4882a593Smuzhiyun 	u8 clk_post;
224*4882a593Smuzhiyun 	u8 clk_trail_eot;
225*4882a593Smuzhiyun 	u8 hs_prepare;
226*4882a593Smuzhiyun 	u8 hs_zero;
227*4882a593Smuzhiyun 	u8 hs_trail_eot;
228*4882a593Smuzhiyun 	u8 lpx;
229*4882a593Smuzhiyun 	u8 hs_exit;
230*4882a593Smuzhiyun 	u8 hs_settle;
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun struct samsung_mipi_cphy_timing {
234*4882a593Smuzhiyun 	unsigned int max_lane_msps;
235*4882a593Smuzhiyun 	u8 prepare_3;
236*4882a593Smuzhiyun 	u8 prebegin_3;
237*4882a593Smuzhiyun 	u8 post_3;
238*4882a593Smuzhiyun 	u8 lpx;
239*4882a593Smuzhiyun 	u8 hs_exit;
240*4882a593Smuzhiyun 	u8 settle_3;
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun static const
244*4882a593Smuzhiyun struct samsung_mipi_dphy_timing samsung_mipi_dphy_timing_table[] = {
245*4882a593Smuzhiyun 	{6500, 32, 117, 31, 28, 30, 56, 27, 24, 44, 37},
246*4882a593Smuzhiyun 	{6490, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
247*4882a593Smuzhiyun 	{6480, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
248*4882a593Smuzhiyun 	{6470, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
249*4882a593Smuzhiyun 	{6460, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
250*4882a593Smuzhiyun 	{6450, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37},
251*4882a593Smuzhiyun 	{6440, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37},
252*4882a593Smuzhiyun 	{6430, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37},
253*4882a593Smuzhiyun 	{6420, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37},
254*4882a593Smuzhiyun 	{6410, 31, 116, 31, 27, 30, 55, 27, 24, 44, 37},
255*4882a593Smuzhiyun 	{6400, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
256*4882a593Smuzhiyun 	{6390, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
257*4882a593Smuzhiyun 	{6380, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
258*4882a593Smuzhiyun 	{6370, 31, 115, 30, 27, 30, 55, 26, 23, 43, 36},
259*4882a593Smuzhiyun 	{6360, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
260*4882a593Smuzhiyun 	{6350, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
261*4882a593Smuzhiyun 	{6340, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
262*4882a593Smuzhiyun 	{6330, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
263*4882a593Smuzhiyun 	{6320, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
264*4882a593Smuzhiyun 	{6310, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
265*4882a593Smuzhiyun 	{6300, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
266*4882a593Smuzhiyun 	{6290, 31, 113, 30, 27, 29, 54, 26, 23, 43, 36},
267*4882a593Smuzhiyun 	{6280, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
268*4882a593Smuzhiyun 	{6270, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
269*4882a593Smuzhiyun 	{6260, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
270*4882a593Smuzhiyun 	{6250, 31, 112, 30, 27, 29, 54, 26, 23, 42, 36},
271*4882a593Smuzhiyun 	{6240, 30, 113, 30, 27, 29, 54, 26, 23, 42, 36},
272*4882a593Smuzhiyun 	{6230, 30, 112, 30, 27, 29, 54, 26, 23, 42, 35},
273*4882a593Smuzhiyun 	{6220, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35},
274*4882a593Smuzhiyun 	{6210, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35},
275*4882a593Smuzhiyun 	{6200, 30, 112, 29, 27, 29, 53, 26, 23, 42, 35},
276*4882a593Smuzhiyun 	{6190, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35},
277*4882a593Smuzhiyun 	{6180, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35},
278*4882a593Smuzhiyun 	{6170, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35},
279*4882a593Smuzhiyun 	{6160, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35},
280*4882a593Smuzhiyun 	{6150, 30, 110, 29, 26, 29, 53, 26, 23, 42, 35},
281*4882a593Smuzhiyun 	{6140, 30, 110, 29, 26, 29, 52, 26, 23, 42, 35},
282*4882a593Smuzhiyun 	{6130, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
283*4882a593Smuzhiyun 	{6120, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
284*4882a593Smuzhiyun 	{6110, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
285*4882a593Smuzhiyun 	{6100, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35},
286*4882a593Smuzhiyun 	{6090, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35},
287*4882a593Smuzhiyun 	{6080, 30, 109, 29, 26, 28, 53, 25, 22, 41, 35},
288*4882a593Smuzhiyun 	{6070, 30, 109, 29, 26, 28, 52, 25, 22, 41, 34},
289*4882a593Smuzhiyun 	{6060, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34},
290*4882a593Smuzhiyun 	{6050, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34},
291*4882a593Smuzhiyun 	{6040, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34},
292*4882a593Smuzhiyun 	{6030, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34},
293*4882a593Smuzhiyun 	{6020, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34},
294*4882a593Smuzhiyun 	{6010, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34},
295*4882a593Smuzhiyun 	{6000, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34},
296*4882a593Smuzhiyun 	{5990, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34},
297*4882a593Smuzhiyun 	{5980, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34},
298*4882a593Smuzhiyun 	{5970, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34},
299*4882a593Smuzhiyun 	{5960, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34},
300*4882a593Smuzhiyun 	{5950, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34},
301*4882a593Smuzhiyun 	{5940, 29, 107, 28, 25, 28, 51, 25, 22, 40, 34},
302*4882a593Smuzhiyun 	{5930, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
303*4882a593Smuzhiyun 	{5920, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
304*4882a593Smuzhiyun 	{5910, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
305*4882a593Smuzhiyun 	{5900, 29, 106, 28, 25, 28, 50, 24, 22, 40, 33},
306*4882a593Smuzhiyun 	{5890, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33},
307*4882a593Smuzhiyun 	{5880, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33},
308*4882a593Smuzhiyun 	{5870, 29, 105, 28, 25, 27, 51, 24, 22, 40, 33},
309*4882a593Smuzhiyun 	{5860, 29, 105, 28, 25, 27, 51, 24, 21, 40, 33},
310*4882a593Smuzhiyun 	{5850, 29, 104, 28, 25, 27, 50, 24, 21, 40, 33},
311*4882a593Smuzhiyun 	{5840, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
312*4882a593Smuzhiyun 	{5830, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
313*4882a593Smuzhiyun 	{5820, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
314*4882a593Smuzhiyun 	{5810, 28, 104, 28, 25, 27, 50, 24, 21, 39, 33},
315*4882a593Smuzhiyun 	{5800, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33},
316*4882a593Smuzhiyun 	{5790, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33},
317*4882a593Smuzhiyun 	{5780, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33},
318*4882a593Smuzhiyun 	{5770, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33},
319*4882a593Smuzhiyun 	{5760, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
320*4882a593Smuzhiyun 	{5750, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
321*4882a593Smuzhiyun 	{5740, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
322*4882a593Smuzhiyun 	{5730, 28, 103, 27, 25, 27, 49, 24, 21, 39, 32},
323*4882a593Smuzhiyun 	{5720, 28, 102, 27, 25, 27, 49, 24, 21, 39, 32},
324*4882a593Smuzhiyun 	{5710, 28, 102, 27, 25, 27, 48, 24, 21, 39, 32},
325*4882a593Smuzhiyun 	{5700, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32},
326*4882a593Smuzhiyun 	{5690, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32},
327*4882a593Smuzhiyun 	{5680, 28, 101, 27, 24, 27, 48, 24, 21, 39, 32},
328*4882a593Smuzhiyun 	{5670, 28, 101, 27, 24, 27, 48, 23, 21, 38, 32},
329*4882a593Smuzhiyun 	{5660, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32},
330*4882a593Smuzhiyun 	{5650, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32},
331*4882a593Smuzhiyun 	{5640, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
332*4882a593Smuzhiyun 	{5630, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
333*4882a593Smuzhiyun 	{5620, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
334*4882a593Smuzhiyun 	{5610, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
335*4882a593Smuzhiyun 	{5600, 27, 101, 26, 24, 26, 48, 23, 20, 38, 32},
336*4882a593Smuzhiyun 	{5590, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32},
337*4882a593Smuzhiyun 	{5580, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32},
338*4882a593Smuzhiyun 	{5570, 27, 100, 26, 24, 26, 48, 23, 20, 38, 31},
339*4882a593Smuzhiyun 	{5560, 27, 100, 26, 24, 26, 47, 23, 20, 38, 31},
340*4882a593Smuzhiyun 	{5550, 27,  99, 26, 24, 26, 47, 23, 20, 38, 31},
341*4882a593Smuzhiyun 	{5540, 27,  99, 26, 24, 26, 47, 23, 20, 38, 31},
342*4882a593Smuzhiyun 	{5530, 27,  99, 26, 24, 26, 47, 23, 20, 38, 31},
343*4882a593Smuzhiyun 	{5520, 27,  99, 26, 24, 26, 47, 23, 20, 37, 31},
344*4882a593Smuzhiyun 	{5510, 27,  98, 26, 24, 26, 47, 23, 20, 37, 31},
345*4882a593Smuzhiyun 	{5500, 27,  98, 26, 24, 26, 47, 23, 20, 37, 31},
346*4882a593Smuzhiyun 	{5490, 27,  98, 26, 24, 26, 46, 23, 20, 37, 31},
347*4882a593Smuzhiyun 	{5480, 27,  98, 26, 24, 26, 46, 23, 20, 37, 31},
348*4882a593Smuzhiyun 	{5470, 27,  97, 26, 23, 26, 46, 23, 20, 37, 31},
349*4882a593Smuzhiyun 	{5460, 27,  97, 26, 23, 26, 46, 23, 20, 37, 31},
350*4882a593Smuzhiyun 	{5450, 27,  97, 26, 23, 25, 47, 23, 20, 37, 31},
351*4882a593Smuzhiyun 	{5440, 26,  98, 26, 23, 25, 47, 23, 20, 37, 31},
352*4882a593Smuzhiyun 	{5430, 26,  98, 26, 23, 25, 47, 22, 20, 37, 31},
353*4882a593Smuzhiyun 	{5420, 26,  97, 26, 23, 25, 46, 22, 20, 37, 31},
354*4882a593Smuzhiyun 	{5410, 26,  97, 26, 23, 25, 46, 22, 20, 37, 31},
355*4882a593Smuzhiyun 	{5400, 26,  97, 25, 23, 25, 46, 22, 20, 37, 30},
356*4882a593Smuzhiyun 	{5390, 26,  97, 25, 23, 25, 46, 22, 20, 37, 30},
357*4882a593Smuzhiyun 	{5380, 26,  96, 25, 23, 25, 46, 22, 20, 36, 30},
358*4882a593Smuzhiyun 	{5370, 26,  96, 25, 23, 25, 46, 22, 20, 36, 30},
359*4882a593Smuzhiyun 	{5360, 26,  96, 25, 23, 25, 46, 22, 20, 36, 30},
360*4882a593Smuzhiyun 	{5350, 26,  96, 25, 23, 25, 46, 22, 20, 36, 30},
361*4882a593Smuzhiyun 	{5340, 26,  95, 25, 23, 25, 45, 22, 20, 36, 30},
362*4882a593Smuzhiyun 	{5330, 26,  95, 25, 23, 25, 45, 22, 19, 36, 30},
363*4882a593Smuzhiyun 	{5320, 26,  95, 25, 23, 25, 45, 22, 19, 36, 30},
364*4882a593Smuzhiyun 	{5310, 26,  95, 25, 23, 25, 45, 22, 19, 36, 30},
365*4882a593Smuzhiyun 	{5300, 26,  95, 25, 23, 25, 45, 22, 19, 36, 30},
366*4882a593Smuzhiyun 	{5290, 26,  94, 25, 23, 25, 45, 22, 19, 36, 30},
367*4882a593Smuzhiyun 	{5280, 26,  94, 25, 23, 25, 45, 22, 19, 36, 30},
368*4882a593Smuzhiyun 	{5270, 26,  94, 25, 23, 25, 44, 22, 19, 36, 30},
369*4882a593Smuzhiyun 	{5260, 26,  94, 25, 23, 25, 44, 22, 19, 36, 30},
370*4882a593Smuzhiyun 	{5250, 25,  94, 25, 23, 24, 45, 22, 19, 36, 30},
371*4882a593Smuzhiyun 	{5240, 25,  94, 25, 23, 24, 45, 22, 19, 36, 29},
372*4882a593Smuzhiyun 	{5230, 25,  94, 25, 22, 24, 45, 22, 19, 35, 29},
373*4882a593Smuzhiyun 	{5220, 25,  94, 25, 22, 24, 45, 22, 19, 35, 29},
374*4882a593Smuzhiyun 	{5210, 25,  93, 25, 22, 24, 45, 22, 19, 35, 29},
375*4882a593Smuzhiyun 	{5200, 25,  93, 24, 22, 24, 44, 21, 19, 35, 29},
376*4882a593Smuzhiyun 	{5190, 25,  93, 24, 22, 24, 44, 21, 19, 35, 29},
377*4882a593Smuzhiyun 	{5180, 25,  93, 24, 22, 24, 44, 21, 19, 35, 29},
378*4882a593Smuzhiyun 	{5170, 25,  92, 24, 22, 24, 44, 21, 19, 35, 29},
379*4882a593Smuzhiyun 	{5160, 25,  92, 24, 22, 24, 44, 21, 19, 35, 29},
380*4882a593Smuzhiyun 	{5150, 25,  92, 24, 22, 24, 44, 21, 19, 35, 29},
381*4882a593Smuzhiyun 	{5140, 25,  92, 24, 22, 24, 44, 21, 19, 35, 29},
382*4882a593Smuzhiyun 	{5130, 25,  92, 24, 22, 24, 43, 21, 19, 35, 29},
383*4882a593Smuzhiyun 	{5120, 25,  91, 24, 22, 24, 43, 21, 19, 35, 29},
384*4882a593Smuzhiyun 	{5110, 25,  91, 24, 22, 24, 43, 21, 19, 35, 29},
385*4882a593Smuzhiyun 	{5100, 25,  91, 24, 22, 24, 43, 21, 19, 35, 29},
386*4882a593Smuzhiyun 	{5090, 25,  91, 24, 22, 24, 43, 21, 19, 34, 29},
387*4882a593Smuzhiyun 	{5080, 25,  90, 24, 22, 24, 43, 21, 19, 34, 29},
388*4882a593Smuzhiyun 	{5070, 25,  90, 24, 22, 24, 43, 21, 19, 34, 28},
389*4882a593Smuzhiyun 	{5060, 25,  90, 24, 22, 24, 43, 21, 18, 34, 28},
390*4882a593Smuzhiyun 	{5050, 24,  91, 24, 22, 24, 42, 21, 18, 34, 28},
391*4882a593Smuzhiyun 	{5040, 24,  90, 24, 22, 23, 43, 21, 18, 34, 28},
392*4882a593Smuzhiyun 	{5030, 24,  90, 24, 22, 23, 43, 21, 18, 34, 28},
393*4882a593Smuzhiyun 	{5020, 24,  90, 24, 22, 23, 43, 21, 18, 34, 28},
394*4882a593Smuzhiyun 	{5010, 24,  90, 24, 22, 23, 43, 21, 18, 34, 28},
395*4882a593Smuzhiyun 	{5000, 24,  89, 23, 21, 23, 43, 21, 18, 34, 28},
396*4882a593Smuzhiyun 	{4990, 24,  89, 23, 21, 23, 43, 21, 18, 34, 28},
397*4882a593Smuzhiyun 	{4980, 24,  89, 23, 21, 23, 42, 21, 18, 34, 28},
398*4882a593Smuzhiyun 	{4970, 24,  89, 23, 21, 23, 42, 21, 18, 34, 28},
399*4882a593Smuzhiyun 	{4960, 24,  89, 23, 21, 23, 42, 20, 18, 34, 28},
400*4882a593Smuzhiyun 	{4950, 24,  88, 23, 21, 23, 42, 20, 18, 34, 28},
401*4882a593Smuzhiyun 	{4940, 24,  88, 23, 21, 23, 42, 20, 18, 33, 28},
402*4882a593Smuzhiyun 	{4930, 24,  88, 23, 21, 23, 42, 20, 18, 33, 28},
403*4882a593Smuzhiyun 	{4920, 24,  88, 23, 21, 23, 42, 20, 18, 33, 28},
404*4882a593Smuzhiyun 	{4910, 24,  87, 23, 21, 23, 41, 20, 18, 33, 28},
405*4882a593Smuzhiyun 	{4900, 24,  87, 23, 21, 23, 41, 20, 18, 33, 27},
406*4882a593Smuzhiyun 	{4890, 24,  87, 23, 21, 23, 41, 20, 18, 33, 27},
407*4882a593Smuzhiyun 	{4880, 24,  87, 23, 21, 23, 41, 20, 18, 33, 27},
408*4882a593Smuzhiyun 	{4870, 24,  86, 23, 21, 23, 41, 20, 18, 33, 27},
409*4882a593Smuzhiyun 	{4860, 24,  86, 23, 21, 23, 41, 20, 18, 33, 27},
410*4882a593Smuzhiyun 	{4850, 23,  87, 23, 21, 23, 41, 20, 18, 33, 27},
411*4882a593Smuzhiyun 	{4840, 23,  87, 23, 21, 23, 40, 20, 18, 33, 27},
412*4882a593Smuzhiyun 	{4830, 23,  86, 23, 21, 22, 41, 20, 18, 33, 27},
413*4882a593Smuzhiyun 	{4820, 23,  86, 23, 21, 22, 41, 20, 18, 33, 27},
414*4882a593Smuzhiyun 	{4810, 23,  86, 23, 21, 22, 41, 20, 18, 33, 27},
415*4882a593Smuzhiyun 	{4800, 23,  86, 22, 21, 22, 41, 20, 17, 32, 27},
416*4882a593Smuzhiyun 	{4790, 23,  86, 22, 21, 22, 41, 20, 17, 32, 27},
417*4882a593Smuzhiyun 	{4780, 23,  85, 22, 21, 22, 41, 20, 17, 32, 27},
418*4882a593Smuzhiyun 	{4770, 23,  85, 22, 21, 22, 41, 20, 17, 32, 27},
419*4882a593Smuzhiyun 	{4760, 23,  85, 22, 20, 22, 40, 20, 17, 32, 27},
420*4882a593Smuzhiyun 	{4750, 23,  85, 22, 20, 22, 40, 20, 17, 32, 27},
421*4882a593Smuzhiyun 	{4740, 23,  84, 22, 20, 22, 40, 20, 17, 32, 26},
422*4882a593Smuzhiyun 	{4730, 23,  84, 22, 20, 22, 40, 19, 17, 32, 26},
423*4882a593Smuzhiyun 	{4720, 23,  84, 22, 20, 22, 40, 19, 17, 32, 26},
424*4882a593Smuzhiyun 	{4710, 23,  84, 22, 20, 22, 40, 19, 17, 32, 26},
425*4882a593Smuzhiyun 	{4700, 23,  83, 22, 20, 22, 40, 19, 17, 32, 26},
426*4882a593Smuzhiyun 	{4690, 23,  83, 22, 20, 22, 39, 19, 17, 32, 26},
427*4882a593Smuzhiyun 	{4680, 23,  83, 22, 20, 22, 39, 19, 17, 32, 26},
428*4882a593Smuzhiyun 	{4670, 23,  83, 22, 20, 22, 39, 19, 17, 32, 26},
429*4882a593Smuzhiyun 	{4660, 23,  82, 22, 20, 22, 39, 19, 17, 32, 26},
430*4882a593Smuzhiyun 	{4650, 22,  83, 22, 20, 22, 39, 19, 17, 31, 26},
431*4882a593Smuzhiyun 	{4640, 22,  83, 22, 20, 22, 39, 19, 17, 31, 26},
432*4882a593Smuzhiyun 	{4630, 22,  83, 22, 20, 22, 39, 19, 17, 31, 26},
433*4882a593Smuzhiyun 	{4620, 22,  83, 22, 20, 21, 39, 19, 17, 31, 26},
434*4882a593Smuzhiyun 	{4610, 22,  82, 22, 20, 21, 39, 19, 17, 31, 26},
435*4882a593Smuzhiyun 	{4600, 22,  82, 21, 20, 21, 39, 19, 17, 31, 26},
436*4882a593Smuzhiyun 	{4590, 22,  82, 21, 20, 21, 39, 19, 17, 31, 26},
437*4882a593Smuzhiyun 	{4580, 22,  82, 21, 20, 21, 39, 19, 17, 31, 26},
438*4882a593Smuzhiyun 	{4570, 22,  81, 21, 20, 21, 39, 19, 17, 31, 25},
439*4882a593Smuzhiyun 	{4560, 22,  81, 21, 20, 21, 39, 19, 17, 31, 25},
440*4882a593Smuzhiyun 	{4550, 22,  81, 21, 20, 21, 38, 19, 17, 31, 25},
441*4882a593Smuzhiyun 	{4540, 22,  81, 21, 20, 21, 38, 19, 17, 31, 25},
442*4882a593Smuzhiyun 	{4530, 22,  80, 21, 19, 21, 38, 19, 16, 31, 25},
443*4882a593Smuzhiyun 	{4520, 22,  80, 21, 19, 21, 38, 19, 16, 31, 25},
444*4882a593Smuzhiyun 	{4510, 22,  80, 21, 19, 21, 38, 19, 16, 31, 25},
445*4882a593Smuzhiyun 	{4500, 22,  80, 21, 19, 21, 38, 19, 16, 30, 25},
446*4882a593Smuzhiyun 	{4490, 22,  80, 21, 19, 21, 38, 18, 16, 30, 25},
447*4882a593Smuzhiyun 	{4480, 22,  79, 21, 19, 21, 38, 18, 16, 30, 25},
448*4882a593Smuzhiyun 	{4470, 22,  79, 21, 19, 21, 37, 18, 16, 30, 25},
449*4882a593Smuzhiyun 	{4460, 22,  79, 21, 19, 21, 37, 18, 16, 30, 25},
450*4882a593Smuzhiyun 	{4450, 21,  80, 21, 19, 21, 37, 18, 16, 30, 25},
451*4882a593Smuzhiyun 	{4440, 21,  79, 21, 19, 21, 37, 18, 16, 30, 25},
452*4882a593Smuzhiyun 	{4430, 21,  79, 21, 19, 21, 37, 18, 16, 30, 25},
453*4882a593Smuzhiyun 	{4420, 21,  79, 21, 19, 21, 37, 18, 16, 30, 25},
454*4882a593Smuzhiyun 	{4410, 21,  79, 21, 19, 20, 38, 18, 16, 30, 25},
455*4882a593Smuzhiyun 	{4400, 21,  78, 20, 19, 20, 37, 18, 16, 30, 24},
456*4882a593Smuzhiyun 	{4390, 21,  78, 20, 19, 20, 37, 18, 16, 30, 24},
457*4882a593Smuzhiyun 	{4380, 21,  78, 20, 19, 20, 37, 18, 16, 30, 24},
458*4882a593Smuzhiyun 	{4370, 21,  78, 20, 19, 20, 37, 18, 16, 30, 24},
459*4882a593Smuzhiyun 	{4360, 21,  77, 20, 19, 20, 37, 18, 16, 29, 24},
460*4882a593Smuzhiyun 	{4350, 21,  77, 20, 19, 20, 37, 18, 16, 29, 24},
461*4882a593Smuzhiyun 	{4340, 21,  77, 20, 19, 20, 37, 18, 16, 29, 24},
462*4882a593Smuzhiyun 	{4330, 21,  77, 20, 19, 20, 36, 18, 16, 29, 24},
463*4882a593Smuzhiyun 	{4320, 21,  77, 20, 19, 20, 36, 18, 16, 29, 24},
464*4882a593Smuzhiyun 	{4310, 21,  76, 20, 19, 20, 36, 18, 16, 29, 24},
465*4882a593Smuzhiyun 	{4300, 21,  76, 20, 18, 20, 36, 18, 16, 29, 24},
466*4882a593Smuzhiyun 	{4290, 21,  76, 20, 18, 20, 36, 18, 16, 29, 24},
467*4882a593Smuzhiyun 	{4280, 21,  76, 20, 18, 20, 36, 18, 16, 29, 24},
468*4882a593Smuzhiyun 	{4270, 21,  75, 20, 18, 20, 36, 18, 16, 29, 24},
469*4882a593Smuzhiyun 	{4260, 21,  75, 20, 18, 20, 35, 17, 15, 29, 24},
470*4882a593Smuzhiyun 	{4250, 20,  76, 20, 18, 20, 35, 17, 15, 29, 24},
471*4882a593Smuzhiyun 	{4240, 20,  76, 20, 18, 20, 35, 17, 15, 29, 23},
472*4882a593Smuzhiyun 	{4230, 20,  75, 20, 18, 20, 35, 17, 15, 29, 23},
473*4882a593Smuzhiyun 	{4220, 20,  75, 20, 18, 20, 35, 17, 15, 29, 23},
474*4882a593Smuzhiyun 	{4210, 20,  75, 20, 18, 20, 35, 17, 15, 28, 23},
475*4882a593Smuzhiyun 	{4200, 20,  75, 19, 18, 19, 36, 17, 15, 28, 23},
476*4882a593Smuzhiyun 	{4190, 20,  74, 19, 18, 19, 36, 17, 15, 28, 23},
477*4882a593Smuzhiyun 	{4180, 20,  74, 19, 18, 19, 35, 17, 15, 28, 23},
478*4882a593Smuzhiyun 	{4170, 20,  74, 19, 18, 19, 35, 17, 15, 28, 23},
479*4882a593Smuzhiyun 	{4160, 20,  74, 19, 18, 19, 35, 17, 15, 28, 23},
480*4882a593Smuzhiyun 	{4150, 20,  74, 19, 18, 19, 35, 17, 15, 28, 23},
481*4882a593Smuzhiyun 	{4140, 20,  73, 19, 18, 19, 35, 17, 15, 28, 23},
482*4882a593Smuzhiyun 	{4130, 20,  73, 19, 18, 19, 35, 17, 15, 28, 23},
483*4882a593Smuzhiyun 	{4120, 20,  73, 19, 18, 19, 35, 17, 15, 28, 23},
484*4882a593Smuzhiyun 	{4110, 20,  73, 19, 18, 19, 34, 17, 15, 28, 23},
485*4882a593Smuzhiyun 	{4100, 20,  72, 19, 18, 19, 34, 17, 15, 28, 23},
486*4882a593Smuzhiyun 	{4090, 20,  72, 19, 18, 19, 34, 17, 15, 28, 23},
487*4882a593Smuzhiyun 	{4080, 20,  72, 19, 18, 19, 34, 17, 15, 28, 23},
488*4882a593Smuzhiyun 	{4070, 20,  72, 19, 18, 19, 34, 17, 15, 27, 22},
489*4882a593Smuzhiyun 	{4060, 19,  72, 19, 17, 19, 34, 17, 15, 27, 22},
490*4882a593Smuzhiyun 	{4050, 19,  72, 19, 17, 19, 34, 17, 15, 27, 22},
491*4882a593Smuzhiyun 	{4040, 19,  72, 19, 17, 19, 33, 17, 15, 27, 22},
492*4882a593Smuzhiyun 	{4030, 19,  72, 19, 17, 19, 33, 17, 15, 27, 22},
493*4882a593Smuzhiyun 	{4020, 19,  71, 19, 17, 19, 33, 16, 15, 27, 22},
494*4882a593Smuzhiyun 	{4010, 19,  71, 19, 17, 19, 33, 16, 15, 27, 22},
495*4882a593Smuzhiyun 	{4000, 19,  71, 18, 17, 19, 33, 16, 14, 27, 22},
496*4882a593Smuzhiyun 	{3990, 19,  71, 18, 17, 18, 34, 16, 14, 27, 22},
497*4882a593Smuzhiyun 	{3980, 19,  71, 18, 17, 18, 34, 16, 14, 27, 22},
498*4882a593Smuzhiyun 	{3970, 19,  70, 18, 17, 18, 33, 16, 14, 27, 22},
499*4882a593Smuzhiyun 	{3960, 19,  70, 18, 17, 18, 33, 16, 14, 27, 22},
500*4882a593Smuzhiyun 	{3950, 19,  70, 18, 17, 18, 33, 16, 14, 27, 22},
501*4882a593Smuzhiyun 	{3940, 19,  70, 18, 17, 18, 33, 16, 14, 27, 22},
502*4882a593Smuzhiyun 	{3930, 19,  69, 18, 17, 18, 33, 16, 14, 27, 22},
503*4882a593Smuzhiyun 	{3920, 19,  69, 18, 17, 18, 33, 16, 14, 26, 22},
504*4882a593Smuzhiyun 	{3910, 19,  69, 18, 17, 18, 33, 16, 14, 26, 22},
505*4882a593Smuzhiyun 	{3900, 19,  69, 18, 17, 18, 33, 16, 14, 26, 21},
506*4882a593Smuzhiyun 	{3890, 19,  68, 18, 17, 18, 32, 16, 14, 26, 21},
507*4882a593Smuzhiyun 	{3880, 19,  68, 18, 17, 18, 32, 16, 14, 26, 21},
508*4882a593Smuzhiyun 	{3870, 19,  68, 18, 17, 18, 32, 16, 14, 26, 21},
509*4882a593Smuzhiyun 	{3860, 18,  69, 18, 17, 18, 32, 16, 14, 26, 21},
510*4882a593Smuzhiyun 	{3850, 18,  68, 18, 17, 18, 32, 16, 14, 26, 21},
511*4882a593Smuzhiyun 	{3840, 18,  68, 18, 17, 18, 32, 16, 14, 26, 21},
512*4882a593Smuzhiyun 	{3830, 18,  68, 18, 16, 18, 32, 16, 14, 26, 21},
513*4882a593Smuzhiyun 	{3820, 18,  68, 18, 16, 18, 31, 16, 14, 26, 21},
514*4882a593Smuzhiyun 	{3810, 18,  68, 18, 16, 18, 31, 16, 14, 26, 21},
515*4882a593Smuzhiyun 	{3800, 18,  67, 17, 16, 18, 31, 16, 14, 26, 21},
516*4882a593Smuzhiyun 	{3790, 18,  67, 17, 16, 17, 32, 15, 14, 26, 21},
517*4882a593Smuzhiyun 	{3780, 18,  67, 17, 16, 17, 32, 15, 14, 25, 21},
518*4882a593Smuzhiyun 	{3770, 18,  67, 17, 16, 17, 32, 15, 14, 25, 21},
519*4882a593Smuzhiyun 	{3760, 18,  66, 17, 16, 17, 32, 15, 14, 25, 21},
520*4882a593Smuzhiyun 	{3750, 18,  66, 17, 16, 17, 31, 15, 14, 25, 21},
521*4882a593Smuzhiyun 	{3740, 18,  66, 17, 16, 17, 31, 15, 14, 25, 20},
522*4882a593Smuzhiyun 	{3730, 18,  66, 17, 16, 17, 31, 15, 13, 25, 20},
523*4882a593Smuzhiyun 	{3720, 18,  65, 17, 16, 17, 31, 15, 13, 25, 20},
524*4882a593Smuzhiyun 	{3710, 18,  65, 17, 16, 17, 31, 15, 13, 25, 20},
525*4882a593Smuzhiyun 	{3700, 18,  65, 17, 16, 17, 31, 15, 13, 25, 20},
526*4882a593Smuzhiyun 	{3690, 18,  65, 17, 16, 17, 31, 15, 13, 25, 20},
527*4882a593Smuzhiyun 	{3680, 18,  64, 17, 16, 17, 31, 15, 13, 25, 20},
528*4882a593Smuzhiyun 	{3670, 18,  64, 17, 16, 17, 30, 15, 13, 25, 20},
529*4882a593Smuzhiyun 	{3660, 17,  65, 17, 16, 17, 30, 15, 13, 25, 20},
530*4882a593Smuzhiyun 	{3650, 17,  65, 17, 16, 17, 30, 15, 13, 25, 20},
531*4882a593Smuzhiyun 	{3640, 17,  65, 17, 16, 17, 30, 15, 13, 25, 20},
532*4882a593Smuzhiyun 	{3630, 17,  64, 17, 16, 17, 30, 15, 13, 24, 20},
533*4882a593Smuzhiyun 	{3620, 17,  64, 17, 16, 17, 30, 15, 13, 24, 20},
534*4882a593Smuzhiyun 	{3610, 17,  64, 17, 16, 17, 30, 15, 13, 24, 20},
535*4882a593Smuzhiyun 	{3600, 17,  64, 16, 16, 17, 29, 15, 13, 24, 20},
536*4882a593Smuzhiyun 	{3590, 17,  63, 16, 15, 17, 29, 15, 13, 24, 20},
537*4882a593Smuzhiyun 	{3580, 17,  63, 16, 15, 16, 30, 15, 13, 24, 20},
538*4882a593Smuzhiyun 	{3570, 17,  63, 16, 15, 16, 30, 15, 13, 24, 19},
539*4882a593Smuzhiyun 	{3560, 17,  63, 16, 15, 16, 30, 14, 13, 24, 19},
540*4882a593Smuzhiyun 	{3550, 17,  62, 16, 15, 16, 30, 14, 13, 24, 19},
541*4882a593Smuzhiyun 	{3540, 17,  62, 16, 15, 16, 30, 14, 13, 24, 19},
542*4882a593Smuzhiyun 	{3530, 17,  62, 16, 15, 16, 29, 14, 13, 24, 19},
543*4882a593Smuzhiyun 	{3520, 17,  62, 16, 15, 16, 29, 14, 13, 24, 19},
544*4882a593Smuzhiyun 	{3510, 17,  62, 16, 15, 16, 29, 14, 13, 24, 19},
545*4882a593Smuzhiyun 	{3500, 17,  61, 16, 15, 16, 29, 14, 13, 24, 19},
546*4882a593Smuzhiyun 	{3490, 17,  61, 16, 15, 16, 29, 14, 13, 23, 19},
547*4882a593Smuzhiyun 	{3480, 17,  61, 16, 15, 16, 29, 14, 13, 23, 19},
548*4882a593Smuzhiyun 	{3470, 17,  61, 16, 15, 16, 29, 14, 13, 23, 19},
549*4882a593Smuzhiyun 	{3460, 16,  61, 16, 15, 16, 28, 14, 12, 23, 19},
550*4882a593Smuzhiyun 	{3450, 16,  61, 16, 15, 16, 28, 14, 12, 23, 19},
551*4882a593Smuzhiyun 	{3440, 16,  61, 16, 15, 16, 28, 14, 12, 23, 19},
552*4882a593Smuzhiyun 	{3430, 16,  61, 16, 15, 16, 28, 14, 12, 23, 19},
553*4882a593Smuzhiyun 	{3420, 16,  60, 16, 15, 16, 28, 14, 12, 23, 19},
554*4882a593Smuzhiyun 	{3410, 16,  60, 16, 15, 16, 28, 14, 12, 23, 18},
555*4882a593Smuzhiyun 	{3400, 16,  60, 15, 15, 16, 28, 14, 12, 23, 18},
556*4882a593Smuzhiyun 	{3390, 16,  60, 15, 15, 16, 28, 14, 12, 23, 18},
557*4882a593Smuzhiyun 	{3380, 16,  59, 15, 15, 16, 27, 14, 12, 23, 18},
558*4882a593Smuzhiyun 	{3370, 16,  59, 15, 15, 15, 28, 14, 12, 23, 18},
559*4882a593Smuzhiyun 	{3360, 16,  59, 15, 14, 15, 28, 14, 12, 23, 18},
560*4882a593Smuzhiyun 	{3350, 16,  59, 15, 14, 15, 28, 14, 12, 23, 18},
561*4882a593Smuzhiyun 	{3340, 16,  59, 15, 14, 15, 28, 14, 12, 22, 18},
562*4882a593Smuzhiyun 	{3330, 16,  58, 15, 14, 15, 28, 14, 12, 22, 18},
563*4882a593Smuzhiyun 	{3320, 16,  58, 15, 14, 15, 28, 13, 12, 22, 18},
564*4882a593Smuzhiyun 	{3310, 16,  58, 15, 14, 15, 27, 13, 12, 22, 18},
565*4882a593Smuzhiyun 	{3300, 16,  58, 15, 14, 15, 27, 13, 12, 22, 18},
566*4882a593Smuzhiyun 	{3290, 16,  57, 15, 14, 15, 27, 13, 12, 22, 18},
567*4882a593Smuzhiyun 	{3280, 16,  57, 15, 14, 15, 27, 13, 12, 22, 18},
568*4882a593Smuzhiyun 	{3270, 16,  57, 15, 14, 15, 27, 13, 12, 22, 18},
569*4882a593Smuzhiyun 	{3260, 15,  58, 15, 14, 15, 27, 13, 12, 22, 18},
570*4882a593Smuzhiyun 	{3250, 15,  57, 15, 14, 15, 27, 13, 12, 22, 18},
571*4882a593Smuzhiyun 	{3240, 15,  57, 15, 14, 15, 26, 13, 12, 22, 17},
572*4882a593Smuzhiyun 	{3230, 15,  57, 15, 14, 15, 26, 13, 12, 22, 17},
573*4882a593Smuzhiyun 	{3220, 15,  57, 15, 14, 15, 26, 13, 12, 22, 17},
574*4882a593Smuzhiyun 	{3210, 15,  56, 15, 14, 15, 26, 13, 12, 22, 17},
575*4882a593Smuzhiyun 	{3200, 15,  56, 14, 14, 15, 26, 13, 11, 21, 17},
576*4882a593Smuzhiyun 	{3190, 15,  56, 14, 14, 15, 26, 13, 11, 21, 17},
577*4882a593Smuzhiyun 	{3180, 15,  56, 14, 14, 15, 26, 13, 11, 21, 17},
578*4882a593Smuzhiyun 	{3170, 15,  56, 14, 14, 15, 25, 13, 11, 21, 17},
579*4882a593Smuzhiyun 	{3160, 15,  55, 14, 14, 14, 26, 13, 11, 21, 17},
580*4882a593Smuzhiyun 	{3150, 15,  55, 14, 14, 14, 26, 13, 11, 21, 17},
581*4882a593Smuzhiyun 	{3140, 15,  55, 14, 14, 14, 26, 13, 11, 21, 17},
582*4882a593Smuzhiyun 	{3130, 15,  55, 14, 14, 14, 26, 13, 11, 21, 17},
583*4882a593Smuzhiyun 	{3120, 15,  54, 14, 13, 14, 26, 13, 11, 21, 17},
584*4882a593Smuzhiyun 	{3110, 15,  54, 14, 13, 14, 26, 13, 11, 21, 17},
585*4882a593Smuzhiyun 	{3100, 15,  54, 14, 13, 14, 26, 13, 11, 21, 17},
586*4882a593Smuzhiyun 	{3090, 15,  54, 14, 13, 14, 25, 12, 11, 21, 17},
587*4882a593Smuzhiyun 	{3080, 15,  53, 14, 13, 14, 25, 12, 11, 21, 17},
588*4882a593Smuzhiyun 	{3070, 14,  54, 14, 13, 14, 25, 12, 11, 21, 16},
589*4882a593Smuzhiyun 	{3060, 14,  54, 14, 13, 14, 25, 12, 11, 21, 16},
590*4882a593Smuzhiyun 	{3050, 14,  54, 14, 13, 14, 25, 12, 11, 20, 16},
591*4882a593Smuzhiyun 	{3040, 14,  53, 14, 13, 14, 25, 12, 11, 20, 16},
592*4882a593Smuzhiyun 	{3030, 14,  53, 14, 13, 14, 25, 12, 11, 20, 16},
593*4882a593Smuzhiyun 	{3020, 14,  53, 14, 13, 14, 24, 12, 11, 20, 16},
594*4882a593Smuzhiyun 	{3010, 14,  53, 14, 13, 14, 24, 12, 11, 20, 16},
595*4882a593Smuzhiyun 	{3000, 14,  53, 13, 13, 14, 24, 12, 11, 20, 16},
596*4882a593Smuzhiyun 	{2990, 14,  52, 13, 13, 14, 24, 12, 11, 20, 16},
597*4882a593Smuzhiyun 	{2980, 14,  52, 13, 13, 14, 24, 12, 11, 20, 16},
598*4882a593Smuzhiyun 	{2970, 14,  52, 13, 13, 14, 24, 12, 11, 20, 16},
599*4882a593Smuzhiyun 	{2960, 14,  52, 13, 13, 14, 24, 12, 11, 20, 16},
600*4882a593Smuzhiyun 	{2950, 14,  51, 13, 13, 13, 24, 12, 11, 20, 16},
601*4882a593Smuzhiyun 	{2940, 14,  51, 13, 13, 13, 24, 12, 11, 20, 16},
602*4882a593Smuzhiyun 	{2930, 14,  51, 13, 13, 13, 24, 12, 10, 20, 16},
603*4882a593Smuzhiyun 	{2920, 14,  51, 13, 13, 13, 24, 12, 10, 20, 16},
604*4882a593Smuzhiyun 	{2910, 14,  50, 13, 13, 13, 24, 12, 10, 20, 15},
605*4882a593Smuzhiyun 	{2900, 14,  50, 13, 13, 13, 24, 12, 10, 19, 15},
606*4882a593Smuzhiyun 	{2890, 14,  50, 13, 12, 13, 24, 12, 10, 19, 15},
607*4882a593Smuzhiyun 	{2880, 14,  50, 13, 12, 13, 23, 12, 10, 19, 15},
608*4882a593Smuzhiyun 	{2870, 13,  50, 13, 12, 13, 23, 12, 10, 19, 15},
609*4882a593Smuzhiyun 	{2860, 13,  50, 13, 12, 13, 23, 12, 10, 19, 15},
610*4882a593Smuzhiyun 	{2850, 13,  50, 13, 12, 13, 23, 11, 10, 19, 15},
611*4882a593Smuzhiyun 	{2840, 13,  50, 13, 12, 13, 23, 11, 10, 19, 15},
612*4882a593Smuzhiyun 	{2830, 13,  50, 13, 12, 13, 23, 11, 10, 19, 15},
613*4882a593Smuzhiyun 	{2820, 13,  49, 13, 12, 13, 23, 11, 10, 19, 15},
614*4882a593Smuzhiyun 	{2810, 13,  49, 13, 12, 13, 23, 11, 10, 19, 15},
615*4882a593Smuzhiyun 	{2800, 13,  49, 12, 12, 13, 22, 11, 10, 19, 15},
616*4882a593Smuzhiyun 	{2790, 13,  49, 12, 12, 13, 22, 11, 10, 19, 15},
617*4882a593Smuzhiyun 	{2780, 13,  48, 12, 12, 13, 22, 11, 10, 19, 15},
618*4882a593Smuzhiyun 	{2770, 13,  48, 12, 12, 13, 22, 11, 10, 19, 15},
619*4882a593Smuzhiyun 	{2760, 13,  48, 12, 12, 13, 22, 11, 10, 18, 15},
620*4882a593Smuzhiyun 	{2750, 13,  48, 12, 12, 13, 22, 11, 10, 18, 15},
621*4882a593Smuzhiyun 	{2740, 13,  47, 12, 12, 12, 23, 11, 10, 18, 14},
622*4882a593Smuzhiyun 	{2730, 13,  47, 12, 12, 12, 22, 11, 10, 18, 14},
623*4882a593Smuzhiyun 	{2720, 13,  47, 12, 12, 12, 22, 11, 10, 18, 14},
624*4882a593Smuzhiyun 	{2710, 13,  47, 12, 12, 12, 22, 11, 10, 18, 14},
625*4882a593Smuzhiyun 	{2700, 13,  47, 12, 12, 12, 22, 11, 10, 18, 14},
626*4882a593Smuzhiyun 	{2690, 13,  46, 12, 12, 12, 22, 11, 10, 18, 14},
627*4882a593Smuzhiyun 	{2680, 13,  46, 12, 12, 12, 22, 11, 10, 18, 14},
628*4882a593Smuzhiyun 	{2670, 12,  47, 12, 12, 12, 22, 11, 10, 18, 14},
629*4882a593Smuzhiyun 	{2660, 12,  47, 12, 12, 12, 21, 11,  9, 18, 14},
630*4882a593Smuzhiyun 	{2650, 12,  46, 12, 11, 12, 21, 11,  9, 18, 14},
631*4882a593Smuzhiyun 	{2640, 12,  46, 12, 11, 12, 21, 11,  9, 18, 14},
632*4882a593Smuzhiyun 	{2630, 12,  46, 12, 11, 12, 21, 11,  9, 18, 14},
633*4882a593Smuzhiyun 	{2620, 12,  46, 12, 11, 12, 21, 10,  9, 18, 14},
634*4882a593Smuzhiyun 	{2610, 12,  45, 12, 11, 12, 21, 10,  9, 17, 14},
635*4882a593Smuzhiyun 	{2600, 12,  45, 11, 11, 12, 21, 10,  9, 17, 14},
636*4882a593Smuzhiyun 	{2590, 12,  45, 11, 11, 12, 20, 10,  9, 17, 14},
637*4882a593Smuzhiyun 	{2580, 12,  45, 11, 11, 12, 20, 10,  9, 17, 14},
638*4882a593Smuzhiyun 	{2570, 12,  44, 11, 11, 12, 20, 10,  9, 17, 13},
639*4882a593Smuzhiyun 	{2560, 12,  44, 11, 11, 12, 20, 10,  9, 17, 13},
640*4882a593Smuzhiyun 	{2550, 12,  44, 11, 11, 12, 20, 10,  9, 17, 13},
641*4882a593Smuzhiyun 	{2540, 12,  44, 11, 11, 11, 21, 10,  9, 17, 13},
642*4882a593Smuzhiyun 	{2530, 12,  44, 11, 11, 11, 21, 10,  9, 17, 13},
643*4882a593Smuzhiyun 	{2520, 12,  43, 11, 11, 11, 21, 10,  9, 17, 13},
644*4882a593Smuzhiyun 	{2510, 12,  43, 11, 11, 11, 20, 10,  9, 17, 13},
645*4882a593Smuzhiyun 	{2500, 12,  43, 11, 11, 11, 20, 10,  9, 17, 13},
646*4882a593Smuzhiyun 	{2490, 12,  43, 11, 11, 11, 20, 10,  9, 17, 13},
647*4882a593Smuzhiyun 	{2480, 12,  42, 11, 11, 11, 20, 10,  9, 17, 13},
648*4882a593Smuzhiyun 	{2470, 11,  43, 11, 11, 11, 20, 10,  9, 16, 13},
649*4882a593Smuzhiyun 	{2460, 11,  43, 11, 11, 11, 20, 10,  9, 16, 13},
650*4882a593Smuzhiyun 	{2450, 11,  43, 11, 11, 11, 20, 10,  9, 16, 13},
651*4882a593Smuzhiyun 	{2440, 11,  42, 11, 11, 11, 19, 10,  9, 16, 13},
652*4882a593Smuzhiyun 	{2430, 11,  42, 11, 11, 11, 19, 10,  9, 16, 13},
653*4882a593Smuzhiyun 	{2420, 11,  42, 11, 10, 11, 19, 10,  9, 16, 13},
654*4882a593Smuzhiyun 	{2410, 11,  42, 11, 10, 11, 19, 10,  9, 16, 12},
655*4882a593Smuzhiyun 	{2400, 11,  41, 10, 10, 11, 19, 10,  8, 16, 12},
656*4882a593Smuzhiyun 	{2390, 11,  41, 10, 10, 11, 19, 10,  8, 16, 12},
657*4882a593Smuzhiyun 	{2380, 11,  41, 10, 10, 11, 19,  9,  8, 16, 12},
658*4882a593Smuzhiyun 	{2370, 11,  41, 10, 10, 11, 18,  9,  8, 16, 12},
659*4882a593Smuzhiyun 	{2360, 11,  41, 10, 10, 11, 18,  9,  8, 16, 12},
660*4882a593Smuzhiyun 	{2350, 11,  40, 10, 10, 11, 18,  9,  8, 16, 12},
661*4882a593Smuzhiyun 	{2340, 11,  40, 10, 10, 11, 18,  9,  8, 16, 12},
662*4882a593Smuzhiyun 	{2330, 11,  40, 10, 10, 10, 19,  9,  8, 16, 12},
663*4882a593Smuzhiyun 	{2320, 11,  40, 10, 10, 10, 19,  9,  8, 15, 12},
664*4882a593Smuzhiyun 	{2310, 11,  39, 10, 10, 10, 19,  9,  8, 15, 12},
665*4882a593Smuzhiyun 	{2300, 11,  39, 10, 10, 10, 18,  9,  8, 15, 12},
666*4882a593Smuzhiyun 	{2290, 11,  39, 10, 10, 10, 18,  9,  8, 15, 12},
667*4882a593Smuzhiyun 	{2280, 11,  39, 10, 10, 10, 18,  9,  8, 15, 12},
668*4882a593Smuzhiyun 	{2270, 10,  39, 10, 10, 10, 18,  9,  8, 15, 12},
669*4882a593Smuzhiyun 	{2260, 10,  39, 10, 10, 10, 18,  9,  8, 15, 12},
670*4882a593Smuzhiyun 	{2250, 10,  39, 10, 10, 10, 18,  9,  8, 15, 12},
671*4882a593Smuzhiyun 	{2240, 10,  39, 10, 10, 10, 18,  9,  8, 15, 11},
672*4882a593Smuzhiyun 	{2230, 10,  38, 10, 10, 10, 18,  9,  8, 15, 11},
673*4882a593Smuzhiyun 	{2220, 10,  38, 10, 10, 10, 17,  9,  8, 15, 11},
674*4882a593Smuzhiyun 	{2210, 10,  38, 10, 10, 10, 17,  9,  8, 15, 11},
675*4882a593Smuzhiyun 	{2200, 10,  38,  9, 10, 10, 17,  9,  8, 15, 11},
676*4882a593Smuzhiyun 	{2190, 10,  38,  9,  9, 10, 17,  9,  8, 15, 11},
677*4882a593Smuzhiyun 	{2180, 10,  37,  9,  9, 10, 17,  9,  8, 14, 11},
678*4882a593Smuzhiyun 	{2170, 10,  37,  9,  9, 10, 17,  9,  8, 14, 11},
679*4882a593Smuzhiyun 	{2160, 10,  37,  9,  9, 10, 17,  9,  8, 14, 11},
680*4882a593Smuzhiyun 	{2150, 10,  37,  9,  9, 10, 16,  8,  8, 14, 11},
681*4882a593Smuzhiyun 	{2140, 10,  36,  9,  9, 10, 16,  8,  8, 14, 11},
682*4882a593Smuzhiyun 	{2130, 10,  36,  9,  9, 10, 16,  8,  7, 14, 11},
683*4882a593Smuzhiyun 	{2120, 10,  36,  9,  9,  9, 17,  8,  7, 14, 11},
684*4882a593Smuzhiyun 	{2110, 10,  36,  9,  9,  9, 17,  8,  7, 14, 11},
685*4882a593Smuzhiyun 	{2100, 10,  35,  9,  9,  9, 17,  8,  7, 14, 11},
686*4882a593Smuzhiyun 	{2090, 10,  35,  9,  9,  9, 17,  8,  7, 14, 11},
687*4882a593Smuzhiyun 	{2080,  9,  36,  9,  9,  9, 16,  8,  7, 14, 11},
688*4882a593Smuzhiyun 	{2070,  9,  36,  9,  9,  9, 16,  8,  7, 14, 10},
689*4882a593Smuzhiyun 	{2060,  9,  35,  9,  9,  9, 16,  8,  7, 14, 10},
690*4882a593Smuzhiyun 	{2050,  9,  35,  9,  9,  9, 16,  8,  7, 14, 10},
691*4882a593Smuzhiyun 	{2040,  9,  35,  9,  9,  9, 16,  8,  7, 14, 10},
692*4882a593Smuzhiyun 	{2030,  9,  35,  9,  9,  9, 16,  8,  7, 13, 10},
693*4882a593Smuzhiyun 	{2020,  9,  35,  9,  9,  9, 16,  8,  7, 13, 10},
694*4882a593Smuzhiyun 	{2010,  9,  34,  9,  9,  9, 15,  8,  7, 13, 10},
695*4882a593Smuzhiyun 	{2000,  9,  34,  8,  9,  9, 15,  8,  7, 13, 10},
696*4882a593Smuzhiyun 	{1990,  9,  34,  8,  9,  9, 15,  8,  7, 13, 10},
697*4882a593Smuzhiyun 	{1980,  9,  34,  8,  9,  9, 15,  8,  7, 13, 10},
698*4882a593Smuzhiyun 	{1970,  9,  33,  8,  9,  9, 15,  8,  7, 13, 10},
699*4882a593Smuzhiyun 	{1960,  9,  33,  8,  9,  9, 15,  8,  7, 13, 10},
700*4882a593Smuzhiyun 	{1950,  9,  33,  8,  8,  9, 15,  8,  7, 13, 10},
701*4882a593Smuzhiyun 	{1940,  9,  33,  8,  8,  9, 15,  8,  7, 13, 10},
702*4882a593Smuzhiyun 	{1930,  9,  32,  8,  8,  9, 14,  8,  7, 13, 10},
703*4882a593Smuzhiyun 	{1920,  9,  32,  8,  8,  9, 14,  8,  7, 13, 10},
704*4882a593Smuzhiyun 	{1910,  9,  32,  8,  8,  8, 15,  7,  7, 13,  9},
705*4882a593Smuzhiyun 	{1900,  9,  32,  8,  8,  8, 15,  7,  7, 13,  9},
706*4882a593Smuzhiyun 	{1890,  9,  31,  8,  8,  8, 15,  7,  7, 12,  9},
707*4882a593Smuzhiyun 	{1880,  8,  32,  8,  8,  8, 15,  7,  7, 12,  9},
708*4882a593Smuzhiyun 	{1870,  8,  32,  8,  8,  8, 15,  7,  7, 12,  9},
709*4882a593Smuzhiyun 	{1860,  8,  32,  8,  8,  8, 14,  7,  6, 12,  9},
710*4882a593Smuzhiyun 	{1850,  8,  32,  8,  8,  8, 14,  7,  6, 12,  9},
711*4882a593Smuzhiyun 	{1840,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
712*4882a593Smuzhiyun 	{1830,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
713*4882a593Smuzhiyun 	{1820,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
714*4882a593Smuzhiyun 	{1810,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
715*4882a593Smuzhiyun 	{1800,  8,  30,  7,  8,  8, 14,  7,  6, 12,  9},
716*4882a593Smuzhiyun 	{1790,  8,  30,  7,  8,  8, 13,  7,  6, 12,  9},
717*4882a593Smuzhiyun 	{1780,  8,  30,  7,  8,  8, 13,  7,  6, 12,  9},
718*4882a593Smuzhiyun 	{1770,  8,  30,  7,  8,  8, 13,  7,  6, 12,  9},
719*4882a593Smuzhiyun 	{1760,  8,  29,  7,  8,  8, 13,  7,  6, 12,  9},
720*4882a593Smuzhiyun 	{1750,  8,  29,  7,  8,  8, 13,  7,  6, 12,  9},
721*4882a593Smuzhiyun 	{1740,  8,  29,  7,  8,  8, 13,  7,  6, 11,  8},
722*4882a593Smuzhiyun 	{1730,  8,  29,  7,  8,  8, 13,  7,  6, 11,  8},
723*4882a593Smuzhiyun 	{1720,  8,  29,  7,  7,  8, 13,  7,  6, 11,  8},
724*4882a593Smuzhiyun 	{1710,  8,  28,  7,  7,  8, 12,  7,  6, 11,  8},
725*4882a593Smuzhiyun 	{1700,  8,  28,  7,  7,  7, 13,  7,  6, 11,  8},
726*4882a593Smuzhiyun 	{1690,  8,  28,  7,  7,  7, 13,  7,  6, 11,  8},
727*4882a593Smuzhiyun 	{1680,  7,  29,  7,  7,  7, 13,  6,  6, 11,  8},
728*4882a593Smuzhiyun 	{1670,  7,  28,  7,  7,  7, 13,  6,  6, 11,  8},
729*4882a593Smuzhiyun 	{1660,  7,  28,  7,  7,  7, 13,  6,  6, 11,  8},
730*4882a593Smuzhiyun 	{1650,  7,  28,  7,  7,  7, 13,  6,  6, 11,  8},
731*4882a593Smuzhiyun 	{1640,  7,  28,  7,  7,  7, 12,  6,  6, 11,  8},
732*4882a593Smuzhiyun 	{1630,  7,  27,  7,  7,  7, 12,  6,  6, 11,  8},
733*4882a593Smuzhiyun 	{1620,  7,  27,  7,  7,  7, 12,  6,  6, 11,  8},
734*4882a593Smuzhiyun 	{1610,  7,  27,  7,  7,  7, 12,  6,  6, 11,  8},
735*4882a593Smuzhiyun 	{1600,  7,  27,  6,  7,  7, 12,  6,  5, 10,  8},
736*4882a593Smuzhiyun 	{1590,  7,  26,  6,  7,  7, 12,  6,  5, 10,  8},
737*4882a593Smuzhiyun 	{1580,  7,  26,  6,  7,  7, 12,  6,  5, 10,  7},
738*4882a593Smuzhiyun 	{1570,  7,  26,  6,  7,  7, 11,  6,  5, 10,  7},
739*4882a593Smuzhiyun 	{1560,  7,  26,  6,  7,  7, 11,  6,  5, 10,  7},
740*4882a593Smuzhiyun 	{1550,  7,  26,  6,  7,  7, 11,  6,  5, 10,  7},
741*4882a593Smuzhiyun 	{1540,  7,  25,  6,  7,  7, 11,  6,  5, 10,  7},
742*4882a593Smuzhiyun 	{1530,  7,  25,  6,  7,  7, 11,  6,  5, 10,  7},
743*4882a593Smuzhiyun 	{1520,  7,  25,  6,  7,  7, 11,  6,  5, 10,  7},
744*4882a593Smuzhiyun 	{1510,  7,  25,  6,  7,  7, 11,  6,  5, 10,  7},
745*4882a593Smuzhiyun 	{1500,  7,  24,  6,  7,  7, 10,  6,  5, 10,  7},
746*4882a593Smuzhiyun 	{1490, 59,  25,  6, 77, 59, 10, 70, 44,  9, 73},
747*4882a593Smuzhiyun 	{1480, 59,  24,  6, 76, 58, 10, 70, 44,  9, 73},
748*4882a593Smuzhiyun 	{1470, 58,  24,  6, 76, 58, 10, 69, 44,  9, 72},
749*4882a593Smuzhiyun 	{1460, 58,  24,  6, 76, 58, 10, 69, 43,  9, 72},
750*4882a593Smuzhiyun 	{1450, 58,  24,  6, 75, 57, 10, 68, 43,  9, 71},
751*4882a593Smuzhiyun 	{1440, 57,  24,  6, 75, 57, 10, 68, 43,  9, 71},
752*4882a593Smuzhiyun 	{1430, 57,  23,  6, 75, 57, 10, 68, 43,  8, 70},
753*4882a593Smuzhiyun 	{1420, 56,  23,  6, 74, 57,  9, 67, 43,  8, 70},
754*4882a593Smuzhiyun 	{1410, 56,  23,  6, 74, 57,  9, 67, 43,  8, 69},
755*4882a593Smuzhiyun 	{1400, 56,  23,  5, 74, 55,  9, 67, 41,  8, 69},
756*4882a593Smuzhiyun 	{1390, 55,  23,  5, 73, 55,  9, 66, 41,  8, 68},
757*4882a593Smuzhiyun 	{1380, 55,  23,  5, 73, 54,  9, 66, 41,  8, 68},
758*4882a593Smuzhiyun 	{1370, 54,  22,  5, 72, 54,  9, 66, 41,  8, 67},
759*4882a593Smuzhiyun 	{1360, 54,  22,  5, 72, 54,  9, 65, 40,  8, 67},
760*4882a593Smuzhiyun 	{1350, 54,  22,  5, 72, 53,  9, 65, 40,  8, 66},
761*4882a593Smuzhiyun 	{1340, 53,  22,  5, 71, 53,  9, 65, 40,  8, 66},
762*4882a593Smuzhiyun 	{1330, 53,  22,  5, 71, 53,  9, 64, 39,  8, 65},
763*4882a593Smuzhiyun 	{1320, 52,  22,  5, 71, 53,  8, 64, 40,  8, 65},
764*4882a593Smuzhiyun 	{1310, 52,  21,  5, 70, 53,  8, 64, 40,  8, 64},
765*4882a593Smuzhiyun 	{1300, 51,  21,  5, 70, 51,  8, 63, 38,  8, 64},
766*4882a593Smuzhiyun 	{1290, 51,  21,  5, 70, 51,  8, 63, 38,  7, 64},
767*4882a593Smuzhiyun 	{1280, 51,  21,  5, 69, 51,  8, 63, 38,  7, 63},
768*4882a593Smuzhiyun 	{1270, 50,  21,  5, 69, 50,  8, 62, 38,  7, 63},
769*4882a593Smuzhiyun 	{1260, 50,  20,  5, 69, 50,  8, 62, 37,  7, 62},
770*4882a593Smuzhiyun 	{1250, 49,  20,  5, 68, 49,  8, 62, 37,  7, 62},
771*4882a593Smuzhiyun 	{1240, 49,  20,  5, 68, 49,  8, 61, 37,  7, 61},
772*4882a593Smuzhiyun 	{1230, 49,  20,  5, 68, 49,  8, 61, 36,  7, 61},
773*4882a593Smuzhiyun 	{1220, 48,  20,  5, 67, 48,  8, 61, 36,  7, 60},
774*4882a593Smuzhiyun 	{1210, 48,  19,  5, 67, 48,  7, 60, 36,  7, 60},
775*4882a593Smuzhiyun 	{1200, 49,  19,  4, 67, 49,  7, 60, 36,  7, 59},
776*4882a593Smuzhiyun 	{1190, 48,  19,  4, 66, 48,  7, 60, 36,  7, 59},
777*4882a593Smuzhiyun 	{1180, 48,  19,  4, 66, 48,  7, 59, 36,  7, 58},
778*4882a593Smuzhiyun 	{1170, 46,  19,  4, 66, 46,  7, 59, 35,  7, 58},
779*4882a593Smuzhiyun 	{1160, 46,  18,  4, 65, 46,  7, 59, 34,  7, 57},
780*4882a593Smuzhiyun 	{1150, 45,  18,  4, 65, 46,  7, 58, 34,  7, 57},
781*4882a593Smuzhiyun 	{1140, 45,  18,  4, 65, 45,  7, 58, 34,  6, 56},
782*4882a593Smuzhiyun 	{1130, 45,  18,  4, 64, 45,  7, 58, 33,  6, 56},
783*4882a593Smuzhiyun 	{1120, 44,  18,  4, 64, 44,  7, 57, 33,  6, 55},
784*4882a593Smuzhiyun 	{1110, 44,  18,  4, 64, 44,  7, 57, 33,  6, 55},
785*4882a593Smuzhiyun 	{1100, 43,  17,  4, 63, 44,  6, 57, 32,  6, 54},
786*4882a593Smuzhiyun 	{1090, 43,  17,  4, 63, 44,  6, 56, 33,  6, 54},
787*4882a593Smuzhiyun 	{1080, 43,  17,  4, 63, 44,  6, 56, 33,  6, 53},
788*4882a593Smuzhiyun 	{1070, 42,  17,  4, 62, 44,  6, 56, 33,  6, 53},
789*4882a593Smuzhiyun 	{1060, 42,  17,  4, 62, 42,  6, 55, 31,  6, 52},
790*4882a593Smuzhiyun 	{1050, 41,  17,  4, 62, 42,  6, 55, 31,  6, 52},
791*4882a593Smuzhiyun 	{1040, 41,  16,  4, 61, 41,  6, 54, 31,  6, 52},
792*4882a593Smuzhiyun 	{1030, 41,  16,  4, 61, 41,  6, 54, 30,  6, 51},
793*4882a593Smuzhiyun 	{1020, 40,  16,  4, 61, 41,  6, 54, 30,  6, 51},
794*4882a593Smuzhiyun 	{1010, 40,  16,  4, 60, 40,  6, 53, 30,  6, 50},
795*4882a593Smuzhiyun 	{1000, 39,  16,  3, 60, 40,  6, 53, 29,  5, 50},
796*4882a593Smuzhiyun 	{ 990, 39,  15,  3, 60, 39,  6, 53, 29,  5, 49},
797*4882a593Smuzhiyun 	{ 980, 39,  15,  3, 59, 39,  5, 52, 29,  5, 49},
798*4882a593Smuzhiyun 	{ 970, 38,  15,  3, 59, 39,  5, 52, 29,  5, 48},
799*4882a593Smuzhiyun 	{ 960, 38,  15,  3, 59, 39,  5, 52, 29,  5, 48},
800*4882a593Smuzhiyun 	{ 950, 37,  15,  3, 58, 39,  5, 51, 29,  5, 47},
801*4882a593Smuzhiyun 	{ 940, 37,  14,  3, 58, 39,  5, 51, 29,  5, 47},
802*4882a593Smuzhiyun 	{ 930, 37,  14,  3, 57, 37,  5, 51, 27,  5, 46},
803*4882a593Smuzhiyun 	{ 920, 36,  14,  3, 57, 37,  5, 50, 27,  5, 46},
804*4882a593Smuzhiyun 	{ 910, 36,  14,  3, 57, 36,  5, 50, 27,  5, 45},
805*4882a593Smuzhiyun 	{ 900, 35,  14,  3, 56, 36,  5, 50, 26,  5, 45},
806*4882a593Smuzhiyun 	{ 890, 35,  14,  3, 56, 36,  5, 49, 26,  5, 44},
807*4882a593Smuzhiyun 	{ 880, 35,  13,  3, 56, 35,  5, 49, 26,  5, 44},
808*4882a593Smuzhiyun 	{ 870, 34,  13,  3, 55, 35,  4, 49, 26,  5, 43},
809*4882a593Smuzhiyun 	{ 860, 34,  13,  3, 55, 35,  4, 48, 25,  5, 43},
810*4882a593Smuzhiyun 	{ 850, 33,  13,  3, 55, 35,  4, 48, 26,  4, 42},
811*4882a593Smuzhiyun 	{ 840, 33,  13,  3, 54, 35,  4, 48, 26,  4, 42},
812*4882a593Smuzhiyun 	{ 830, 33,  12,  3, 54, 33,  4, 47, 24,  4, 41},
813*4882a593Smuzhiyun 	{ 820, 32,  12,  3, 54, 33,  4, 47, 24,  4, 41},
814*4882a593Smuzhiyun 	{ 810, 32,  12,  3, 53, 33,  4, 47, 24,  4, 40},
815*4882a593Smuzhiyun 	{ 800, 31,  12,  2, 53, 32,  4, 46, 23,  4, 40},
816*4882a593Smuzhiyun 	{ 790, 31,  12,  2, 53, 32,  4, 46, 23,  4, 39},
817*4882a593Smuzhiyun 	{ 780, 30,  12,  2, 52, 31,  4, 46, 23,  4, 39},
818*4882a593Smuzhiyun 	{ 770, 30,  11,  2, 52, 31,  4, 45, 23,  4, 39},
819*4882a593Smuzhiyun 	{ 760, 30,  11,  2, 52, 31,  3, 45, 22,  4, 38},
820*4882a593Smuzhiyun 	{ 750, 29,  11,  2, 51, 30,  3, 45, 22,  4, 38},
821*4882a593Smuzhiyun 	{ 740, 29,  11,  2, 51, 30,  3, 44, 22,  4, 37},
822*4882a593Smuzhiyun 	{ 730, 28,  11,  2, 51, 31,  3, 44, 22,  4, 37},
823*4882a593Smuzhiyun 	{ 720, 28,  10,  2, 50, 30,  3, 44, 22,  4, 36},
824*4882a593Smuzhiyun 	{ 710, 28,  10,  2, 50, 30,  3, 43, 22,  4, 36},
825*4882a593Smuzhiyun 	{ 700, 27,  10,  2, 50, 28,  3, 43, 20,  3, 35},
826*4882a593Smuzhiyun 	{ 690, 27,  10,  2, 49, 28,  3, 43, 20,  3, 35},
827*4882a593Smuzhiyun 	{ 680, 26,  10,  2, 49, 28,  3, 42, 20,  3, 34},
828*4882a593Smuzhiyun 	{ 670, 26,  10,  2, 49, 27,  3, 42, 20,  3, 34},
829*4882a593Smuzhiyun 	{ 660, 26,   9,  2, 48, 27,  3, 42, 19,  3, 33},
830*4882a593Smuzhiyun 	{ 650, 25,   9,  2, 48, 26,  3, 41, 19,  3, 33},
831*4882a593Smuzhiyun 	{ 640, 25,   9,  2, 48, 26,  2, 41, 19,  3, 32},
832*4882a593Smuzhiyun 	{ 630, 24,   9,  2, 47, 26,  2, 40, 18,  3, 32},
833*4882a593Smuzhiyun 	{ 620, 24,   9,  2, 47, 26,  2, 40, 19,  3, 31},
834*4882a593Smuzhiyun 	{ 610, 24,   8,  2, 47, 26,  2, 40, 19,  3, 31},
835*4882a593Smuzhiyun 	{ 600, 23,   8,  1, 46, 26,  2, 39, 18,  3, 30},
836*4882a593Smuzhiyun 	{ 590, 23,   8,  1, 46, 24,  2, 39, 17,  3, 30},
837*4882a593Smuzhiyun 	{ 580, 22,   8,  1, 46, 24,  2, 39, 17,  3, 29},
838*4882a593Smuzhiyun 	{ 570, 22,   8,  1, 45, 23,  2, 38, 17,  3, 29},
839*4882a593Smuzhiyun 	{ 560, 22,   7,  1, 45, 23,  2, 38, 16,  2, 28},
840*4882a593Smuzhiyun 	{ 550, 21,   7,  1, 45, 23,  2, 38, 16,  2, 28},
841*4882a593Smuzhiyun 	{ 540, 21,   7,  1, 44, 22,  2, 37, 16,  2, 27},
842*4882a593Smuzhiyun 	{ 530, 20,   7,  1, 44, 22,  1, 37, 15,  2, 27},
843*4882a593Smuzhiyun 	{ 520, 20,   7,  1, 43, 21,  1, 37, 15,  2, 27},
844*4882a593Smuzhiyun 	{ 510, 20,   6,  1, 43, 21,  1, 36, 15,  2, 26},
845*4882a593Smuzhiyun 	{ 500, 19,   6,  1, 43, 22,  1, 36, 15,  2, 26},
846*4882a593Smuzhiyun 	{ 490, 19,   6,  1, 42, 21,  1, 36, 15,  2, 25},
847*4882a593Smuzhiyun 	{ 480, 18,   6,  1, 42, 21,  1, 35, 15,  2, 25},
848*4882a593Smuzhiyun 	{ 470, 18,   6,  1, 42, 21,  1, 35, 15,  2, 24},
849*4882a593Smuzhiyun 	{ 460, 18,   6,  1, 41, 19,  1, 35, 13,  2, 24},
850*4882a593Smuzhiyun 	{ 450, 17,   5,  1, 41, 19,  1, 34, 13,  2, 23},
851*4882a593Smuzhiyun 	{ 440, 17,   5,  1, 41, 18,  1, 34, 13,  2, 23},
852*4882a593Smuzhiyun 	{ 430, 16,   5,  1, 40, 18,  0, 34, 12,  2, 22},
853*4882a593Smuzhiyun 	{ 420, 16,   5,  1, 40, 18,  0, 33, 12,  2, 22},
854*4882a593Smuzhiyun 	{ 410, 16,   5,  1, 40, 17,  0, 33, 12,  1, 21},
855*4882a593Smuzhiyun 	{ 400, 15,   5,  0, 39, 17,  0, 33, 11,  1, 21},
856*4882a593Smuzhiyun 	{ 390, 15,   4,  0, 39, 17,  0, 32, 12,  1, 20},
857*4882a593Smuzhiyun 	{ 380, 14,   4,  0, 39, 17,  0, 32, 12,  1, 20},
858*4882a593Smuzhiyun 	{ 370, 14,   4,  0, 38, 17,  0, 32, 12,  1, 19},
859*4882a593Smuzhiyun 	{ 360, 14,   4,  0, 38, 15,  0, 31, 10,  1, 19},
860*4882a593Smuzhiyun 	{ 350, 13,   4,  0, 38, 15,  0, 31, 10,  1, 18},
861*4882a593Smuzhiyun 	{ 340, 13,   3,  0, 37, 15,  0, 31, 10,  1, 18},
862*4882a593Smuzhiyun 	{ 330, 12,   3,  0, 37, 14,  0, 30,  9,  1, 17},
863*4882a593Smuzhiyun 	{ 320, 12,   3,  0, 37, 14,  0, 30,  9,  1, 17},
864*4882a593Smuzhiyun 	{ 310, 12,   3,  0, 36, 13,  0, 30,  9,  1, 16},
865*4882a593Smuzhiyun 	{ 300, 11,   3,  0, 36, 13,  0, 29,  8,  1, 16},
866*4882a593Smuzhiyun 	{ 290, 11,   2,  0, 36, 13,  0, 29,  8,  1, 15},
867*4882a593Smuzhiyun 	{ 280, 10,   2,  0, 35, 12,  0, 29,  8,  1, 15},
868*4882a593Smuzhiyun 	{ 270, 10,   2,  0, 35, 12,  0, 28,  8,  0, 14},
869*4882a593Smuzhiyun 	{ 260,  9,   2,  0, 35, 12,  0, 28,  8,  0, 14},
870*4882a593Smuzhiyun 	{ 250,  9,   2,  0, 34, 12,  0, 28,  8,  0, 14},
871*4882a593Smuzhiyun 	{ 240,  9,   2,  0, 34, 12,  0, 27,  8,  0, 13},
872*4882a593Smuzhiyun 	{ 230,  8,   1,  0, 34, 10,  0, 27,  6,  0, 13},
873*4882a593Smuzhiyun 	{ 220,  8,   1,  0, 33, 10,  0, 27,  6,  0, 12},
874*4882a593Smuzhiyun 	{ 210,  7,   1,  0, 33, 10,  0, 26,  6,  0, 12},
875*4882a593Smuzhiyun 	{ 200,  7,   1,  0, 33,  9,  0, 26,  5,  0, 11},
876*4882a593Smuzhiyun 	{ 190,  7,   1,  0, 32,  9,  0, 25,  5,  0, 11},
877*4882a593Smuzhiyun 	{ 180,  6,   1,  0, 32,  8,  0, 25,  5,  0, 10},
878*4882a593Smuzhiyun 	{ 170,  6,   0,  0, 32,  8,  0, 25,  5,  0, 10},
879*4882a593Smuzhiyun 	{ 160,  5,   0,  0, 31,  8,  0, 24,  4,  0,  9},
880*4882a593Smuzhiyun 	{ 150,  5,   0,  0, 31,  8,  0, 24,  5,  0,  9},
881*4882a593Smuzhiyun 	{ 140,  5,   0,  0, 31,  8,  0, 24,  5,  0,  8},
882*4882a593Smuzhiyun 	{ 130,  4,   0,  0, 30,  6,  0, 23,  3,  0,  8},
883*4882a593Smuzhiyun 	{ 120,  4,   0,  0, 30,  6,  0, 23,  3,  0,  7},
884*4882a593Smuzhiyun 	{ 110,  3,   0,  0, 30,  6,  0, 23,  3,  0,  7},
885*4882a593Smuzhiyun 	{ 100,  3,   0,  0, 29,  5,  0, 22,  2,  0,  6},
886*4882a593Smuzhiyun 	{  90,  3,   0,  0, 29,  5,  0, 22,  2,  0,  6},
887*4882a593Smuzhiyun 	{  80,  2,   0,  0, 28,  5,  0, 22,  2,  0,  5},
888*4882a593Smuzhiyun };
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun static const
891*4882a593Smuzhiyun struct samsung_mipi_cphy_timing samsung_mipi_cphy_timing_table[] = {
892*4882a593Smuzhiyun 	{ 3500, 39, 50, 25, 29, 54, 1 },
893*4882a593Smuzhiyun 	{ 3490, 39, 50, 25, 29, 54, 1 },
894*4882a593Smuzhiyun 	{ 3480, 39, 50, 25, 29, 54, 1 },
895*4882a593Smuzhiyun 	{ 3470, 39, 50, 25, 29, 54, 1 },
896*4882a593Smuzhiyun 	{ 3460, 39, 50, 25, 29, 54, 1 },
897*4882a593Smuzhiyun 	{ 3450, 39, 50, 25, 29, 54, 1 },
898*4882a593Smuzhiyun 	{ 3440, 38, 50, 25, 29, 54, 1 },
899*4882a593Smuzhiyun 	{ 3430, 38, 50, 25, 29, 53, 1 },
900*4882a593Smuzhiyun 	{ 3420, 38, 50, 25, 29, 53, 1 },
901*4882a593Smuzhiyun 	{ 3410, 38, 50, 25, 29, 53, 1 },
902*4882a593Smuzhiyun 	{ 3400, 38, 50, 25, 29, 53, 1 },
903*4882a593Smuzhiyun 	{ 3390, 38, 50, 25, 29, 53, 1 },
904*4882a593Smuzhiyun 	{ 3380, 38, 50, 25, 28, 53, 1 },
905*4882a593Smuzhiyun 	{ 3370, 38, 50, 25, 28, 52, 1 },
906*4882a593Smuzhiyun 	{ 3360, 37, 50, 25, 28, 52, 1 },
907*4882a593Smuzhiyun 	{ 3350, 37, 50, 25, 28, 52, 1 },
908*4882a593Smuzhiyun 	{ 3340, 37, 50, 25, 28, 52, 1 },
909*4882a593Smuzhiyun 	{ 3330, 37, 50, 25, 28, 52, 1 },
910*4882a593Smuzhiyun 	{ 3320, 37, 50, 25, 28, 52, 1 },
911*4882a593Smuzhiyun 	{ 3310, 37, 50, 25, 28, 52, 1 },
912*4882a593Smuzhiyun 	{ 3300, 37, 50, 25, 28, 51, 1 },
913*4882a593Smuzhiyun 	{ 3290, 37, 50, 25, 28, 51, 1 },
914*4882a593Smuzhiyun 	{ 3280, 37, 50, 25, 28, 51, 1 },
915*4882a593Smuzhiyun 	{ 3270, 36, 50, 25, 28, 51, 1 },
916*4882a593Smuzhiyun 	{ 3260, 36, 50, 25, 27, 51, 1 },
917*4882a593Smuzhiyun 	{ 3250, 36, 50, 25, 27, 51, 1 },
918*4882a593Smuzhiyun 	{ 3240, 36, 50, 25, 27, 50, 1 },
919*4882a593Smuzhiyun 	{ 3230, 36, 50, 25, 27, 50, 1 },
920*4882a593Smuzhiyun 	{ 3220, 36, 50, 25, 27, 50, 1 },
921*4882a593Smuzhiyun 	{ 3210, 36, 50, 25, 27, 50, 1 },
922*4882a593Smuzhiyun 	{ 3200, 36, 50, 25, 27, 50, 1 },
923*4882a593Smuzhiyun 	{ 3190, 36, 50, 25, 27, 50, 1 },
924*4882a593Smuzhiyun 	{ 3180, 35, 50, 25, 27, 49, 1 },
925*4882a593Smuzhiyun 	{ 3170, 35, 50, 25, 27, 49, 1 },
926*4882a593Smuzhiyun 	{ 3160, 35, 50, 25, 27, 49, 1 },
927*4882a593Smuzhiyun 	{ 3150, 35, 50, 25, 26, 49, 1 },
928*4882a593Smuzhiyun 	{ 3140, 35, 50, 25, 26, 49, 1 },
929*4882a593Smuzhiyun 	{ 3130, 35, 50, 25, 26, 49, 1 },
930*4882a593Smuzhiyun 	{ 3120, 35, 50, 25, 26, 49, 1 },
931*4882a593Smuzhiyun 	{ 3110, 35, 50, 25, 26, 48, 1 },
932*4882a593Smuzhiyun 	{ 3100, 34, 50, 25, 26, 48, 1 },
933*4882a593Smuzhiyun 	{ 3090, 34, 50, 25, 26, 48, 1 },
934*4882a593Smuzhiyun 	{ 3080, 34, 50, 25, 26, 48, 1 },
935*4882a593Smuzhiyun 	{ 3070, 34, 50, 25, 26, 48, 1 },
936*4882a593Smuzhiyun 	{ 3060, 34, 50, 25, 26, 48, 1 },
937*4882a593Smuzhiyun 	{ 3050, 34, 50, 25, 26, 47, 1 },
938*4882a593Smuzhiyun 	{ 3040, 34, 50, 25, 26, 47, 1 },
939*4882a593Smuzhiyun 	{ 3030, 34, 50, 25, 25, 47, 1 },
940*4882a593Smuzhiyun 	{ 3020, 34, 50, 25, 25, 47, 1 },
941*4882a593Smuzhiyun 	{ 3010, 33, 50, 25, 25, 47, 1 },
942*4882a593Smuzhiyun 	{ 3000, 33, 50, 25, 25, 47, 1 },
943*4882a593Smuzhiyun 	{ 2990, 33, 50, 25, 25, 46, 1 },
944*4882a593Smuzhiyun 	{ 2980, 33, 50, 25, 25, 46, 1 },
945*4882a593Smuzhiyun 	{ 2970, 33, 50, 25, 25, 46, 1 },
946*4882a593Smuzhiyun 	{ 2960, 33, 50, 25, 25, 46, 1 },
947*4882a593Smuzhiyun 	{ 2950, 33, 50, 25, 25, 46, 1 },
948*4882a593Smuzhiyun 	{ 2940, 33, 50, 25, 25, 46, 1 },
949*4882a593Smuzhiyun 	{ 2930, 33, 50, 25, 25, 46, 1 },
950*4882a593Smuzhiyun 	{ 2920, 32, 50, 25, 25, 45, 1 },
951*4882a593Smuzhiyun 	{ 2910, 32, 50, 25, 24, 45, 1 },
952*4882a593Smuzhiyun 	{ 2900, 32, 50, 25, 24, 45, 1 },
953*4882a593Smuzhiyun 	{ 2890, 32, 50, 25, 24, 45, 1 },
954*4882a593Smuzhiyun 	{ 2880, 32, 50, 25, 24, 45, 1 },
955*4882a593Smuzhiyun 	{ 2870, 32, 50, 25, 24, 45, 1 },
956*4882a593Smuzhiyun 	{ 2860, 32, 50, 25, 24, 44, 1 },
957*4882a593Smuzhiyun 	{ 2850, 32, 50, 25, 24, 44, 1 },
958*4882a593Smuzhiyun 	{ 2840, 31, 50, 25, 24, 44, 1 },
959*4882a593Smuzhiyun 	{ 2830, 31, 50, 25, 24, 44, 1 },
960*4882a593Smuzhiyun 	{ 2820, 31, 50, 25, 24, 44, 1 },
961*4882a593Smuzhiyun 	{ 2810, 31, 50, 25, 24, 44, 1 },
962*4882a593Smuzhiyun 	{ 2800, 31, 50, 25, 23, 43, 1 },
963*4882a593Smuzhiyun 	{ 2790, 31, 50, 25, 23, 43, 1 },
964*4882a593Smuzhiyun 	{ 2780, 31, 50, 25, 23, 43, 1 },
965*4882a593Smuzhiyun 	{ 2770, 31, 50, 25, 23, 43, 1 },
966*4882a593Smuzhiyun 	{ 2760, 31, 50, 25, 23, 43, 1 },
967*4882a593Smuzhiyun 	{ 2750, 30, 50, 25, 23, 43, 1 },
968*4882a593Smuzhiyun 	{ 2740, 30, 50, 25, 23, 43, 1 },
969*4882a593Smuzhiyun 	{ 2730, 30, 50, 25, 23, 42, 1 },
970*4882a593Smuzhiyun 	{ 2720, 30, 50, 25, 23, 42, 1 },
971*4882a593Smuzhiyun 	{ 2710, 30, 50, 25, 23, 42, 1 },
972*4882a593Smuzhiyun 	{ 2700, 30, 50, 25, 23, 42, 1 },
973*4882a593Smuzhiyun 	{ 2690, 30, 50, 25, 23, 42, 1 },
974*4882a593Smuzhiyun 	{ 2680, 30, 50, 25, 22, 42, 1 },
975*4882a593Smuzhiyun 	{ 2670, 30, 50, 25, 22, 41, 1 },
976*4882a593Smuzhiyun 	{ 2660, 29, 50, 25, 22, 41, 1 },
977*4882a593Smuzhiyun 	{ 2650, 29, 50, 25, 22, 41, 1 },
978*4882a593Smuzhiyun 	{ 2640, 29, 50, 25, 22, 41, 1 },
979*4882a593Smuzhiyun 	{ 2630, 29, 50, 25, 22, 41, 1 },
980*4882a593Smuzhiyun 	{ 2620, 29, 50, 25, 22, 41, 1 },
981*4882a593Smuzhiyun 	{ 2610, 29, 50, 25, 22, 41, 1 },
982*4882a593Smuzhiyun 	{ 2600, 29, 50, 25, 22, 40, 1 },
983*4882a593Smuzhiyun 	{ 2590, 29, 50, 25, 22, 40, 1 },
984*4882a593Smuzhiyun 	{ 2580, 28, 50, 25, 22, 40, 1 },
985*4882a593Smuzhiyun 	{ 2570, 28, 50, 25, 22, 40, 1 },
986*4882a593Smuzhiyun 	{ 2560, 28, 50, 25, 21, 40, 1 },
987*4882a593Smuzhiyun 	{ 2550, 28, 50, 25, 21, 40, 1 },
988*4882a593Smuzhiyun 	{ 2540, 28, 50, 25, 21, 39, 1 },
989*4882a593Smuzhiyun 	{ 2530, 28, 50, 25, 21, 39, 1 },
990*4882a593Smuzhiyun 	{ 2520, 28, 50, 25, 21, 39, 1 },
991*4882a593Smuzhiyun 	{ 2510, 28, 50, 25, 21, 39, 1 },
992*4882a593Smuzhiyun 	{ 2500, 28, 50, 25, 21, 39, 1 },
993*4882a593Smuzhiyun 	{ 2490, 27, 50, 25, 21, 39, 1 },
994*4882a593Smuzhiyun 	{ 2480, 27, 50, 25, 21, 38, 1 },
995*4882a593Smuzhiyun 	{ 2470, 27, 50, 25, 21, 38, 1 },
996*4882a593Smuzhiyun 	{ 2460, 27, 50, 25, 21, 38, 1 },
997*4882a593Smuzhiyun 	{ 2450, 27, 50, 25, 20, 38, 1 },
998*4882a593Smuzhiyun 	{ 2440, 27, 50, 25, 20, 38, 1 },
999*4882a593Smuzhiyun 	{ 2430, 27, 50, 25, 20, 38, 1 },
1000*4882a593Smuzhiyun 	{ 2420, 27, 50, 25, 20, 38, 1 },
1001*4882a593Smuzhiyun 	{ 2410, 27, 50, 25, 20, 37, 1 },
1002*4882a593Smuzhiyun 	{ 2400, 26, 50, 25, 20, 37, 1 },
1003*4882a593Smuzhiyun 	{ 2390, 26, 50, 25, 20, 37, 1 },
1004*4882a593Smuzhiyun 	{ 2380, 26, 50, 25, 20, 37, 1 },
1005*4882a593Smuzhiyun 	{ 2370, 26, 50, 25, 20, 37, 1 },
1006*4882a593Smuzhiyun 	{ 2360, 26, 50, 25, 20, 37, 1 },
1007*4882a593Smuzhiyun 	{ 2350, 26, 50, 25, 20, 36, 1 },
1008*4882a593Smuzhiyun 	{ 2340, 26, 50, 25, 20, 36, 1 },
1009*4882a593Smuzhiyun 	{ 2330, 26, 50, 25, 19, 36, 1 },
1010*4882a593Smuzhiyun 	{ 2320, 25, 50, 25, 19, 36, 1 },
1011*4882a593Smuzhiyun 	{ 2310, 25, 50, 25, 19, 36, 1 },
1012*4882a593Smuzhiyun 	{ 2300, 25, 50, 25, 19, 36, 1 },
1013*4882a593Smuzhiyun 	{ 2290, 25, 50, 25, 19, 35, 1 },
1014*4882a593Smuzhiyun 	{ 2280, 25, 50, 25, 19, 35, 1 },
1015*4882a593Smuzhiyun 	{ 2270, 25, 50, 25, 19, 35, 1 },
1016*4882a593Smuzhiyun 	{ 2260, 25, 50, 25, 19, 35, 1 },
1017*4882a593Smuzhiyun 	{ 2250, 25, 50, 25, 19, 35, 1 },
1018*4882a593Smuzhiyun 	{ 2240, 25, 50, 25, 19, 35, 1 },
1019*4882a593Smuzhiyun 	{ 2230, 24, 50, 25, 19, 35, 1 },
1020*4882a593Smuzhiyun 	{ 2220, 24, 50, 25, 19, 34, 1 },
1021*4882a593Smuzhiyun 	{ 2210, 24, 50, 25, 18, 34, 1 },
1022*4882a593Smuzhiyun 	{ 2200, 24, 50, 25, 18, 34, 1 },
1023*4882a593Smuzhiyun 	{ 2190, 24, 50, 25, 18, 34, 1 },
1024*4882a593Smuzhiyun 	{ 2180, 24, 50, 25, 18, 34, 1 },
1025*4882a593Smuzhiyun 	{ 2170, 24, 50, 25, 18, 34, 1 },
1026*4882a593Smuzhiyun 	{ 2160, 24, 50, 25, 18, 33, 1 },
1027*4882a593Smuzhiyun 	{ 2150, 24, 50, 25, 18, 33, 1 },
1028*4882a593Smuzhiyun 	{ 2140, 23, 50, 25, 18, 33, 1 },
1029*4882a593Smuzhiyun 	{ 2130, 23, 50, 25, 18, 33, 1 },
1030*4882a593Smuzhiyun 	{ 2120, 23, 50, 25, 18, 33, 1 },
1031*4882a593Smuzhiyun 	{ 2110, 23, 50, 25, 18, 33, 1 },
1032*4882a593Smuzhiyun 	{ 2100, 23, 50, 25, 17, 32, 1 },
1033*4882a593Smuzhiyun 	{ 2090, 23, 50, 25, 17, 32, 1 },
1034*4882a593Smuzhiyun 	{ 2080, 23, 50, 25, 17, 32, 1 },
1035*4882a593Smuzhiyun 	{ 2070, 23, 50, 25, 17, 32, 1 },
1036*4882a593Smuzhiyun 	{ 2060, 22, 50, 25, 17, 32, 1 },
1037*4882a593Smuzhiyun 	{ 2050, 22, 50, 25, 17, 32, 1 },
1038*4882a593Smuzhiyun 	{ 2040, 22, 50, 25, 17, 32, 1 },
1039*4882a593Smuzhiyun 	{ 2030, 22, 50, 25, 17, 31, 1 },
1040*4882a593Smuzhiyun 	{ 2020, 22, 50, 25, 17, 31, 1 },
1041*4882a593Smuzhiyun 	{ 2010, 22, 50, 25, 17, 31, 1 },
1042*4882a593Smuzhiyun 	{ 2000, 22, 50, 25, 17, 31, 1 },
1043*4882a593Smuzhiyun 	{ 1990, 22, 50, 25, 17, 31, 1 },
1044*4882a593Smuzhiyun 	{ 1980, 22, 50, 25, 16, 31, 1 },
1045*4882a593Smuzhiyun 	{ 1970, 21, 50, 25, 16, 30, 1 },
1046*4882a593Smuzhiyun 	{ 1960, 21, 50, 25, 16, 30, 1 },
1047*4882a593Smuzhiyun 	{ 1950, 21, 50, 25, 16, 30, 1 },
1048*4882a593Smuzhiyun 	{ 1940, 21, 50, 25, 16, 30, 1 },
1049*4882a593Smuzhiyun 	{ 1930, 21, 50, 25, 16, 30, 1 },
1050*4882a593Smuzhiyun 	{ 1920, 21, 50, 25, 16, 30, 1 },
1051*4882a593Smuzhiyun 	{ 1910, 21, 50, 25, 16, 30, 1 },
1052*4882a593Smuzhiyun 	{ 1900, 21, 50, 25, 16, 29, 1 },
1053*4882a593Smuzhiyun 	{ 1890, 21, 50, 25, 16, 29, 1 },
1054*4882a593Smuzhiyun 	{ 1880, 20, 50, 25, 16, 29, 1 },
1055*4882a593Smuzhiyun 	{ 1870, 20, 50, 25, 16, 29, 1 },
1056*4882a593Smuzhiyun 	{ 1860, 20, 50, 25, 15, 29, 1 },
1057*4882a593Smuzhiyun 	{ 1850, 20, 50, 25, 15, 29, 1 },
1058*4882a593Smuzhiyun 	{ 1840, 20, 50, 25, 15, 28, 1 },
1059*4882a593Smuzhiyun 	{ 1830, 20, 50, 25, 15, 28, 1 },
1060*4882a593Smuzhiyun 	{ 1820, 20, 50, 25, 15, 28, 1 },
1061*4882a593Smuzhiyun 	{ 1810, 20, 50, 25, 15, 28, 1 },
1062*4882a593Smuzhiyun 	{ 1800, 19, 50, 25, 15, 28, 1 },
1063*4882a593Smuzhiyun 	{ 1790, 19, 50, 25, 15, 28, 1 },
1064*4882a593Smuzhiyun 	{ 1780, 19, 50, 25, 15, 27, 1 },
1065*4882a593Smuzhiyun 	{ 1770, 19, 50, 25, 15, 27, 1 },
1066*4882a593Smuzhiyun 	{ 1760, 19, 50, 25, 15, 27, 1 },
1067*4882a593Smuzhiyun 	{ 1750, 19, 50, 25, 14, 27, 1 },
1068*4882a593Smuzhiyun 	{ 1740, 19, 50, 25, 14, 27, 1 },
1069*4882a593Smuzhiyun 	{ 1730, 19, 50, 25, 14, 27, 1 },
1070*4882a593Smuzhiyun 	{ 1720, 19, 50, 25, 14, 27, 1 },
1071*4882a593Smuzhiyun 	{ 1710, 18, 50, 25, 14, 26, 1 },
1072*4882a593Smuzhiyun 	{ 1700, 18, 50, 25, 14, 26, 1 },
1073*4882a593Smuzhiyun 	{ 1690, 18, 50, 25, 14, 26, 1 },
1074*4882a593Smuzhiyun 	{ 1680, 18, 50, 25, 14, 26, 1 },
1075*4882a593Smuzhiyun 	{ 1670, 18, 50, 25, 14, 26, 1 },
1076*4882a593Smuzhiyun 	{ 1660, 18, 50, 25, 14, 26, 1 },
1077*4882a593Smuzhiyun 	{ 1650, 18, 50, 25, 14, 25, 1 },
1078*4882a593Smuzhiyun 	{ 1640, 18, 50, 25, 14, 25, 1 },
1079*4882a593Smuzhiyun 	{ 1630, 18, 50, 25, 13, 25, 1 },
1080*4882a593Smuzhiyun 	{ 1620, 17, 50, 25, 13, 25, 1 },
1081*4882a593Smuzhiyun 	{ 1610, 17, 50, 25, 13, 25, 1 },
1082*4882a593Smuzhiyun 	{ 1600, 17, 50, 25, 13, 25, 1 },
1083*4882a593Smuzhiyun 	{ 1590, 17, 50, 25, 13, 24, 1 },
1084*4882a593Smuzhiyun 	{ 1580, 17, 50, 25, 13, 24, 1 },
1085*4882a593Smuzhiyun 	{ 1570, 17, 50, 25, 13, 24, 1 },
1086*4882a593Smuzhiyun 	{ 1560, 17, 50, 25, 13, 24, 1 },
1087*4882a593Smuzhiyun 	{ 1550, 17, 50, 25, 13, 24, 1 },
1088*4882a593Smuzhiyun 	{ 1540, 16, 50, 25, 13, 24, 1 },
1089*4882a593Smuzhiyun 	{ 1530, 16, 50, 25, 13, 24, 1 },
1090*4882a593Smuzhiyun 	{ 1520, 16, 50, 25, 13, 23, 1 },
1091*4882a593Smuzhiyun 	{ 1510, 16, 50, 25, 12, 23, 1 },
1092*4882a593Smuzhiyun 	{ 1500, 16, 50, 25, 12, 23, 1 },
1093*4882a593Smuzhiyun 	{ 1490, 16, 50, 25, 12, 23, 1 },
1094*4882a593Smuzhiyun 	{ 1480, 16, 50, 25, 12, 23, 1 },
1095*4882a593Smuzhiyun 	{ 1470, 16, 50, 25, 12, 23, 1 },
1096*4882a593Smuzhiyun 	{ 1460, 16, 50, 25, 12, 22, 1 },
1097*4882a593Smuzhiyun 	{ 1450, 15, 50, 25, 12, 22, 1 },
1098*4882a593Smuzhiyun 	{ 1440, 15, 50, 25, 12, 22, 1 },
1099*4882a593Smuzhiyun 	{ 1430, 15, 50, 25, 12, 22, 1 },
1100*4882a593Smuzhiyun 	{ 1420, 15, 50, 25, 12, 22, 1 },
1101*4882a593Smuzhiyun 	{ 1410, 15, 50, 25, 12, 22, 1 },
1102*4882a593Smuzhiyun 	{ 1400, 15, 50, 25, 11, 21, 1 },
1103*4882a593Smuzhiyun 	{ 1390, 15, 50, 25, 11, 21, 1 },
1104*4882a593Smuzhiyun 	{ 1380, 15, 50, 25, 11, 21, 1 },
1105*4882a593Smuzhiyun 	{ 1370, 15, 50, 25, 11, 21, 1 },
1106*4882a593Smuzhiyun 	{ 1360, 14, 50, 25, 11, 21, 1 },
1107*4882a593Smuzhiyun 	{ 1350, 14, 50, 25, 11, 21, 1 },
1108*4882a593Smuzhiyun 	{ 1340, 14, 50, 25, 11, 21, 1 },
1109*4882a593Smuzhiyun 	{ 1330, 14, 50, 25, 11, 20, 1 },
1110*4882a593Smuzhiyun 	{ 1320, 14, 50, 25, 11, 20, 1 },
1111*4882a593Smuzhiyun 	{ 1310, 14, 50, 25, 11, 20, 1 },
1112*4882a593Smuzhiyun 	{ 1300, 14, 50, 25, 11, 20, 1 },
1113*4882a593Smuzhiyun 	{ 1290, 14, 50, 25, 11, 20, 1 },
1114*4882a593Smuzhiyun 	{ 1280, 13, 50, 25, 10, 20, 1 },
1115*4882a593Smuzhiyun 	{ 1270, 13, 50, 25, 10, 19, 1 },
1116*4882a593Smuzhiyun 	{ 1260, 13, 50, 25, 10, 19, 1 },
1117*4882a593Smuzhiyun 	{ 1250, 13, 50, 25, 10, 19, 1 },
1118*4882a593Smuzhiyun 	{ 1240, 13, 50, 25, 10, 19, 1 },
1119*4882a593Smuzhiyun 	{ 1230, 13, 50, 25, 10, 19, 1 },
1120*4882a593Smuzhiyun 	{ 1220, 13, 50, 25, 10, 19, 1 },
1121*4882a593Smuzhiyun 	{ 1210, 13, 50, 25, 10, 19, 1 },
1122*4882a593Smuzhiyun 	{ 1200, 13, 50, 25, 10, 18, 1 },
1123*4882a593Smuzhiyun 	{ 1190, 12, 50, 25, 10, 18, 1 },
1124*4882a593Smuzhiyun 	{ 1180, 12, 50, 25, 10, 18, 1 },
1125*4882a593Smuzhiyun 	{ 1170, 12, 50, 25, 10, 18, 1 },
1126*4882a593Smuzhiyun 	{ 1160, 12, 50, 25,  9, 18, 1 },
1127*4882a593Smuzhiyun 	{ 1150, 12, 50, 25,  9, 18, 1 },
1128*4882a593Smuzhiyun 	{ 1140, 12, 50, 25,  9, 17, 1 },
1129*4882a593Smuzhiyun 	{ 1130, 12, 50, 25,  9, 17, 1 },
1130*4882a593Smuzhiyun 	{ 1120, 12, 50, 25,  9, 17, 1 },
1131*4882a593Smuzhiyun 	{ 1110, 12, 50, 25,  9, 17, 1 },
1132*4882a593Smuzhiyun 	{ 1100, 11, 50, 25,  9, 17, 1 },
1133*4882a593Smuzhiyun 	{ 1090, 11, 50, 25,  9, 17, 1 },
1134*4882a593Smuzhiyun 	{ 1080, 11, 50, 25,  9, 16, 1 },
1135*4882a593Smuzhiyun 	{ 1070, 11, 50, 25,  9, 16, 1 },
1136*4882a593Smuzhiyun 	{ 1060, 11, 50, 25,  9, 16, 1 },
1137*4882a593Smuzhiyun 	{ 1050, 11, 50, 25,  8, 16, 1 },
1138*4882a593Smuzhiyun 	{ 1040, 11, 50, 25,  8, 16, 1 },
1139*4882a593Smuzhiyun 	{ 1030, 11, 50, 25,  8, 16, 1 },
1140*4882a593Smuzhiyun 	{ 1020, 10, 50, 25,  8, 16, 1 },
1141*4882a593Smuzhiyun 	{ 1010, 10, 50, 25,  8, 15, 1 },
1142*4882a593Smuzhiyun 	{ 1000, 10, 50, 25,  8, 15, 1 },
1143*4882a593Smuzhiyun 	{  990, 10, 50, 25,  8, 15, 2 },
1144*4882a593Smuzhiyun 	{  980, 10, 50, 25,  8, 15, 2 },
1145*4882a593Smuzhiyun 	{  970, 10, 50, 25,  8, 15, 2 },
1146*4882a593Smuzhiyun 	{  960, 10, 50, 25,  8, 15, 2 },
1147*4882a593Smuzhiyun 	{  950, 10, 50, 25,  8, 14, 2 },
1148*4882a593Smuzhiyun 	{  940, 10, 50, 25,  8, 14, 2 },
1149*4882a593Smuzhiyun 	{  930,  9, 50, 25,  7, 14, 2 },
1150*4882a593Smuzhiyun 	{  920,  9, 50, 25,  7, 14, 2 },
1151*4882a593Smuzhiyun 	{  910,  9, 50, 25,  7, 14, 2 },
1152*4882a593Smuzhiyun 	{  900,  9, 50, 25,  7, 14, 2 },
1153*4882a593Smuzhiyun 	{  890,  9, 50, 25,  7, 13, 2 },
1154*4882a593Smuzhiyun 	{  880,  9, 50, 25,  7, 13, 2 },
1155*4882a593Smuzhiyun 	{  870,  9, 50, 25,  7, 13, 2 },
1156*4882a593Smuzhiyun 	{  860,  9, 50, 25,  7, 13, 2 },
1157*4882a593Smuzhiyun 	{  850,  9, 50, 25,  7, 13, 2 },
1158*4882a593Smuzhiyun 	{  840,  8, 50, 25,  7, 13, 2 },
1159*4882a593Smuzhiyun 	{  830,  8, 50, 25,  7, 13, 2 },
1160*4882a593Smuzhiyun 	{  820,  8, 50, 25,  7, 12, 2 },
1161*4882a593Smuzhiyun 	{  810,  8, 50, 25,  6, 12, 2 },
1162*4882a593Smuzhiyun 	{  800,  8, 50, 25,  6, 12, 2 },
1163*4882a593Smuzhiyun 	{  790,  8, 50, 25,  6, 12, 2 },
1164*4882a593Smuzhiyun 	{  780,  8, 50, 25,  6, 12, 2 },
1165*4882a593Smuzhiyun 	{  770,  8, 50, 25,  6, 12, 2 },
1166*4882a593Smuzhiyun 	{  760,  7, 50, 25,  6, 11, 2 },
1167*4882a593Smuzhiyun 	{  750,  7, 50, 25,  6, 11, 2 },
1168*4882a593Smuzhiyun 	{  740,  7, 50, 25,  6, 11, 2 },
1169*4882a593Smuzhiyun 	{  730,  7, 50, 25,  6, 11, 2 },
1170*4882a593Smuzhiyun 	{  720,  7, 50, 25,  6, 11, 2 },
1171*4882a593Smuzhiyun 	{  710,  7, 50, 25,  6, 11, 2 },
1172*4882a593Smuzhiyun 	{  700,  7, 50, 25,  5, 10, 2 },
1173*4882a593Smuzhiyun 	{  690,  7, 50, 25,  5, 10, 2 },
1174*4882a593Smuzhiyun 	{  680,  7, 50, 25,  5, 10, 2 },
1175*4882a593Smuzhiyun 	{  670,  6, 50, 25,  5, 10, 2 },
1176*4882a593Smuzhiyun 	{  660,  6, 50, 25,  5, 10, 2 },
1177*4882a593Smuzhiyun 	{  650,  6, 50, 25,  5, 10, 2 },
1178*4882a593Smuzhiyun 	{  640,  6, 50, 25,  5, 10, 2 },
1179*4882a593Smuzhiyun 	{  630,  6, 50, 25,  5,  9, 2 },
1180*4882a593Smuzhiyun 	{  620,  6, 50, 25,  5,  9, 2 },
1181*4882a593Smuzhiyun 	{  610,  6, 50, 25,  5,  9, 2 },
1182*4882a593Smuzhiyun 	{  600,  6, 50, 25,  5,  9, 2 },
1183*4882a593Smuzhiyun 	{  590,  6, 50, 25,  5,  9, 2 },
1184*4882a593Smuzhiyun 	{  580,  5, 50, 25,  4,  9, 2 },
1185*4882a593Smuzhiyun 	{  570,  5, 50, 25,  4,  8, 2 },
1186*4882a593Smuzhiyun 	{  560,  5, 50, 25,  4,  8, 2 },
1187*4882a593Smuzhiyun 	{  550,  5, 50, 25,  4,  8, 2 },
1188*4882a593Smuzhiyun 	{  540,  5, 50, 25,  4,  8, 2 },
1189*4882a593Smuzhiyun 	{  530,  5, 50, 25,  4,  8, 2 },
1190*4882a593Smuzhiyun 	{  520,  5, 50, 25,  4,  8, 2 },
1191*4882a593Smuzhiyun 	{  510,  5, 50, 25,  4,  8, 2 },
1192*4882a593Smuzhiyun 	{  500,  4, 50, 25,  4,  7, 2 },
1193*4882a593Smuzhiyun 	{  490, 18, 50, 25, 14,  6, 2 },
1194*4882a593Smuzhiyun 	{  480, 17, 50, 25, 14,  6, 2 },
1195*4882a593Smuzhiyun 	{  470, 17, 50, 25, 14,  6, 2 },
1196*4882a593Smuzhiyun 	{  460, 17, 50, 25, 13,  6, 2 },
1197*4882a593Smuzhiyun 	{  450, 16, 50, 25, 13,  6, 2 },
1198*4882a593Smuzhiyun 	{  440, 16, 50, 25, 13,  6, 2 },
1199*4882a593Smuzhiyun 	{  430, 15, 50, 25, 12,  6, 2 },
1200*4882a593Smuzhiyun 	{  420, 15, 50, 25, 12,  5, 2 },
1201*4882a593Smuzhiyun 	{  410, 15, 50, 25, 12,  5, 2 },
1202*4882a593Smuzhiyun 	{  400, 14, 50, 25, 11,  5, 2 },
1203*4882a593Smuzhiyun 	{  390, 14, 50, 25, 11,  5, 2 },
1204*4882a593Smuzhiyun 	{  380, 13, 50, 25, 11,  5, 2 },
1205*4882a593Smuzhiyun 	{  370, 13, 50, 25, 11,  5, 2 },
1206*4882a593Smuzhiyun 	{  360, 13, 50, 25, 10,  4, 2 },
1207*4882a593Smuzhiyun 	{  350, 12, 50, 25, 10,  4, 2 },
1208*4882a593Smuzhiyun 	{  340, 12, 50, 25, 10,  4, 2 },
1209*4882a593Smuzhiyun 	{  330, 11, 50, 25,  9,  4, 2 },
1210*4882a593Smuzhiyun 	{  320, 11, 50, 25,  9,  4, 2 },
1211*4882a593Smuzhiyun 	{  310, 11, 50, 25,  9,  4, 2 },
1212*4882a593Smuzhiyun 	{  300, 10, 50, 25,  8,  3, 2 },
1213*4882a593Smuzhiyun 	{  290, 10, 50, 25,  8,  3, 2 },
1214*4882a593Smuzhiyun 	{  280,  9, 50, 25,  8,  3, 2 },
1215*4882a593Smuzhiyun 	{  270,  9, 50, 25,  8,  3, 2 },
1216*4882a593Smuzhiyun 	{  260,  8, 50, 25,  7,  3, 2 },
1217*4882a593Smuzhiyun 	{  250,  8, 50, 25,  7,  3, 2 },
1218*4882a593Smuzhiyun 	{  240,  8, 50, 25,  7,  3, 2 },
1219*4882a593Smuzhiyun 	{  230,  7, 50, 25,  6,  2, 2 },
1220*4882a593Smuzhiyun 	{  220,  7, 50, 25,  6,  2, 2 },
1221*4882a593Smuzhiyun 	{  210,  6, 50, 25,  6,  2, 2 },
1222*4882a593Smuzhiyun 	{  200,  6, 50, 25,  5,  2, 2 },
1223*4882a593Smuzhiyun 	{  190,  6, 50, 25,  5,  2, 2 },
1224*4882a593Smuzhiyun 	{  180,  5, 50, 25,  5,  2, 2 },
1225*4882a593Smuzhiyun 	{  170,  5, 50, 25,  5,  1, 2 },
1226*4882a593Smuzhiyun 	{  160,  4, 50, 25,  4,  1, 2 },
1227*4882a593Smuzhiyun 	{  150,  4, 50, 25,  4,  1, 2 },
1228*4882a593Smuzhiyun 	{  140,  4, 50, 25,  4,  1, 2 },
1229*4882a593Smuzhiyun 	{  130,  3, 50, 25,  3,  1, 2 },
1230*4882a593Smuzhiyun 	{  120,  3, 50, 25,  3,  1, 2 },
1231*4882a593Smuzhiyun 	{  110,  2, 50, 25,  3,  1, 2 },
1232*4882a593Smuzhiyun 	{  100,  2, 50, 25,  2,  0, 2 },
1233*4882a593Smuzhiyun 	{   90,  2, 50, 25,  2,  0, 2 },
1234*4882a593Smuzhiyun 	{   80,  1, 50, 25,  2,  0, 2 },
1235*4882a593Smuzhiyun };
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun struct hsfreq_range {
1238*4882a593Smuzhiyun 	u32 range_h;
1239*4882a593Smuzhiyun 	u16 cfg_bit;
1240*4882a593Smuzhiyun };
1241*4882a593Smuzhiyun /* These tables must be sorted by .range_h ascending. */
1242*4882a593Smuzhiyun static const struct hsfreq_range samsung_dphy_rx_hsfreq_ranges[] = {
1243*4882a593Smuzhiyun 	{ 80,  0x105}, { 100, 0x106}, { 120, 0x107}, { 140, 0x108},
1244*4882a593Smuzhiyun 	{ 160, 0x109}, { 180, 0x10a}, { 200, 0x10b}, { 220, 0x10c},
1245*4882a593Smuzhiyun 	{ 240, 0x10d}, { 270, 0x10e}, { 290, 0x10f}, { 310, 0x110},
1246*4882a593Smuzhiyun 	{ 330, 0x111}, { 350, 0x112}, { 370, 0x113}, { 390, 0x114},
1247*4882a593Smuzhiyun 	{ 410, 0x115}, { 430, 0x116}, { 450, 0x117}, { 470, 0x118},
1248*4882a593Smuzhiyun 	{ 490, 0x119}, { 510, 0x11a}, { 540, 0x11b}, { 560, 0x11c},
1249*4882a593Smuzhiyun 	{ 580, 0x11d}, { 600, 0x11e}, { 620, 0x11f}, { 640, 0x120},
1250*4882a593Smuzhiyun 	{ 660, 0x121}, { 680, 0x122}, { 700, 0x123}, { 720, 0x124},
1251*4882a593Smuzhiyun 	{ 740, 0x125}, { 760, 0x126}, { 790, 0x127}, { 810, 0x128},
1252*4882a593Smuzhiyun 	{ 830, 0x129}, { 850, 0x12a}, { 870, 0x12b}, { 890, 0x12c},
1253*4882a593Smuzhiyun 	{ 910, 0x12d}, { 930, 0x12e}, { 950, 0x12f}, { 970, 0x130},
1254*4882a593Smuzhiyun 	{ 990, 0x131}, {1010, 0x132}, {1030, 0x133}, {1060, 0x134},
1255*4882a593Smuzhiyun 	{1080, 0x135}, {1100, 0x136}, {1120, 0x137}, {1140, 0x138},
1256*4882a593Smuzhiyun 	{1160, 0x139}, {1180, 0x13a}, {1200, 0x13b}, {1220, 0x13c},
1257*4882a593Smuzhiyun 	{1240, 0x13d}, {1260, 0x13e}, {1280, 0x13f}, {1310, 0x140},
1258*4882a593Smuzhiyun 	{1330, 0x141}, {1350, 0x142}, {1370, 0x143}, {1390, 0x144},
1259*4882a593Smuzhiyun 	{1410, 0x145}, {1430, 0x146}, {1450, 0x147}, {1470, 0x148},
1260*4882a593Smuzhiyun 	{1490, 0x149}, {1580, 0x007}, {1740, 0x008}, {1910, 0x009},
1261*4882a593Smuzhiyun 	{2070, 0x00a}, {2240, 0x00b}, {2410, 0x00c}, {2570, 0x00d},
1262*4882a593Smuzhiyun 	{2740, 0x00e}, {2910, 0x00f}, {3070, 0x010}, {3240, 0x011},
1263*4882a593Smuzhiyun 	{3410, 0x012}, {3570, 0x013}, {3740, 0x014}, {3890, 0x015},
1264*4882a593Smuzhiyun 	{4070, 0x016}, {4240, 0x017}, {4400, 0x018}, {4500, 0x019},
1265*4882a593Smuzhiyun };
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun /* These tables must be sorted by .range_h ascending. */
1268*4882a593Smuzhiyun static const struct hsfreq_range samsung_cphy_rx_hsfreq_ranges[] = {
1269*4882a593Smuzhiyun 	{ 500,  0x102}, { 990, 0x002}, { 2500, 0x001},
1270*4882a593Smuzhiyun };
1271*4882a593Smuzhiyun 
samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy * samsung,struct csi2_dphy * csi_dphy)1272*4882a593Smuzhiyun static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *samsung,
1273*4882a593Smuzhiyun 						 struct csi2_dphy *csi_dphy)
1274*4882a593Smuzhiyun {
1275*4882a593Smuzhiyun 	u32 bias_con2 = 0x3223;
1276*4882a593Smuzhiyun 
1277*4882a593Smuzhiyun 	if (csi_dphy &&
1278*4882a593Smuzhiyun 	    csi_dphy->dphy_param.lp_vol_ref != 3 &&
1279*4882a593Smuzhiyun 	    csi_dphy->dphy_param.lp_vol_ref < 0x7) {
1280*4882a593Smuzhiyun 		bias_con2 &= 0xfffffff8;
1281*4882a593Smuzhiyun 		bias_con2 |= csi_dphy->dphy_param.lp_vol_ref;
1282*4882a593Smuzhiyun 		dev_info(samsung->dev,
1283*4882a593Smuzhiyun 			 "rx change lp_vol_ref to %d, it may cause tx exception\n",
1284*4882a593Smuzhiyun 			 csi_dphy->dphy_param.lp_vol_ref);
1285*4882a593Smuzhiyun 	}
1286*4882a593Smuzhiyun 	regmap_write(samsung->regmap, BIAS_CON0, 0x0010);
1287*4882a593Smuzhiyun 	regmap_write(samsung->regmap, BIAS_CON1, 0x0110);
1288*4882a593Smuzhiyun 	regmap_write(samsung->regmap, BIAS_CON2, bias_con2);
1289*4882a593Smuzhiyun 
1290*4882a593Smuzhiyun 	/* default output voltage select:
1291*4882a593Smuzhiyun 	 * dphy: 400mv
1292*4882a593Smuzhiyun 	 * cphy: 530mv
1293*4882a593Smuzhiyun 	 */
1294*4882a593Smuzhiyun 	if (samsung->c_option)
1295*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, BIAS_CON4,
1296*4882a593Smuzhiyun 				   I_MUX_SEL_MASK, I_MUX_SEL(2));
1297*4882a593Smuzhiyun }
1298*4882a593Smuzhiyun 
samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy * samsung)1299*4882a593Smuzhiyun static void samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy *samsung)
1300*4882a593Smuzhiyun {
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun 
samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy * samsung)1303*4882a593Smuzhiyun static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung)
1304*4882a593Smuzhiyun {
1305*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000));
1306*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, DPHY_MC_GNR_CON0,
1307*4882a593Smuzhiyun 			   PHY_ENABLE, PHY_ENABLE);
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun 	switch (samsung->lanes) {
1310*4882a593Smuzhiyun 	case 4:
1311*4882a593Smuzhiyun 		regmap_write(samsung->regmap, DPHY_MD3_GNR_CON1,
1312*4882a593Smuzhiyun 			     T_PHY_READY(0x2000));
1313*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, DPHY_MD3_GNR_CON0,
1314*4882a593Smuzhiyun 				   PHY_ENABLE, PHY_ENABLE);
1315*4882a593Smuzhiyun 		fallthrough;
1316*4882a593Smuzhiyun 	case 3:
1317*4882a593Smuzhiyun 		regmap_write(samsung->regmap, COMBO_MD2_GNR_CON1,
1318*4882a593Smuzhiyun 			     T_PHY_READY(0x2000));
1319*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0,
1320*4882a593Smuzhiyun 				   PHY_ENABLE, PHY_ENABLE);
1321*4882a593Smuzhiyun 		fallthrough;
1322*4882a593Smuzhiyun 	case 2:
1323*4882a593Smuzhiyun 		regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1,
1324*4882a593Smuzhiyun 			     T_PHY_READY(0x2000));
1325*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0,
1326*4882a593Smuzhiyun 				   PHY_ENABLE, PHY_ENABLE);
1327*4882a593Smuzhiyun 		fallthrough;
1328*4882a593Smuzhiyun 	case 1:
1329*4882a593Smuzhiyun 	default:
1330*4882a593Smuzhiyun 		regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1,
1331*4882a593Smuzhiyun 			     T_PHY_READY(0x2000));
1332*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0,
1333*4882a593Smuzhiyun 				   PHY_ENABLE, PHY_ENABLE);
1334*4882a593Smuzhiyun 		break;
1335*4882a593Smuzhiyun 	}
1336*4882a593Smuzhiyun }
1337*4882a593Smuzhiyun 
samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy * samsung)1338*4882a593Smuzhiyun static void samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy *samsung)
1339*4882a593Smuzhiyun {
1340*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000));
1341*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000));
1342*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000));
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0,
1345*4882a593Smuzhiyun 			   PHY_ENABLE, PHY_ENABLE);
1346*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0,
1347*4882a593Smuzhiyun 			   PHY_ENABLE, PHY_ENABLE);
1348*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0,
1349*4882a593Smuzhiyun 			   PHY_ENABLE, PHY_ENABLE);
1350*4882a593Smuzhiyun }
1351*4882a593Smuzhiyun 
samsung_mipi_dphy_lane_disable(struct samsung_mipi_dcphy * samsung)1352*4882a593Smuzhiyun static void samsung_mipi_dphy_lane_disable(struct samsung_mipi_dcphy *samsung)
1353*4882a593Smuzhiyun {
1354*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, DPHY_MC_GNR_CON0, PHY_ENABLE, 0);
1355*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0);
1356*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0);
1357*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0);
1358*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, DPHY_MD3_GNR_CON0, PHY_ENABLE, 0);
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun 
samsung_mipi_cphy_lane_disable(struct samsung_mipi_dcphy * samsung)1361*4882a593Smuzhiyun static void samsung_mipi_cphy_lane_disable(struct samsung_mipi_dcphy *samsung)
1362*4882a593Smuzhiyun {
1363*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0);
1364*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0);
1365*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0);
1366*4882a593Smuzhiyun }
1367*4882a593Smuzhiyun 
samsung_mipi_dcphy_pll_configure(struct samsung_mipi_dcphy * samsung)1368*4882a593Smuzhiyun static void samsung_mipi_dcphy_pll_configure(struct samsung_mipi_dcphy *samsung)
1369*4882a593Smuzhiyun {
1370*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, PLL_CON0, S_MASK | P_MASK,
1371*4882a593Smuzhiyun 			   S(samsung->pll.scaler) | P(samsung->pll.prediv));
1372*4882a593Smuzhiyun 
1373*4882a593Smuzhiyun 	if (samsung->pll.dsm < 0) {
1374*4882a593Smuzhiyun 		u16 dsm_tmp;
1375*4882a593Smuzhiyun 
1376*4882a593Smuzhiyun 		/* Using opposite number subtraction to find complement */
1377*4882a593Smuzhiyun 		dsm_tmp = abs(samsung->pll.dsm);
1378*4882a593Smuzhiyun 		dsm_tmp = dsm_tmp - 1;
1379*4882a593Smuzhiyun 		dsm_tmp ^= 0xffff;
1380*4882a593Smuzhiyun 		regmap_write(samsung->regmap, PLL_CON1, dsm_tmp);
1381*4882a593Smuzhiyun 	} else {
1382*4882a593Smuzhiyun 		regmap_write(samsung->regmap, PLL_CON1, samsung->pll.dsm);
1383*4882a593Smuzhiyun 	}
1384*4882a593Smuzhiyun 
1385*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, PLL_CON2,
1386*4882a593Smuzhiyun 			   M_MASK, M(samsung->pll.fbdiv));
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 	if (samsung->pll.ssc_en) {
1389*4882a593Smuzhiyun 		regmap_write(samsung->regmap, PLL_CON3,
1390*4882a593Smuzhiyun 			     MRR(samsung->pll.mrr) | MFR(samsung->pll.mfr));
1391*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, PLL_CON4, SSCG_EN, SSCG_EN);
1392*4882a593Smuzhiyun 	}
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun 	regmap_write(samsung->regmap, PLL_CON5, RESET_N_SEL | PLL_ENABLE_SEL);
1395*4882a593Smuzhiyun 	regmap_write(samsung->regmap, PLL_CON7, PLL_LOCK_CNT(0xf000));
1396*4882a593Smuzhiyun 	regmap_write(samsung->regmap, PLL_CON8, PLL_STB_CNT(0xf000));
1397*4882a593Smuzhiyun }
1398*4882a593Smuzhiyun 
samsung_mipi_dcphy_pll_enable(struct samsung_mipi_dcphy * samsung)1399*4882a593Smuzhiyun static void samsung_mipi_dcphy_pll_enable(struct samsung_mipi_dcphy *samsung)
1400*4882a593Smuzhiyun {
1401*4882a593Smuzhiyun 	u32 sts;
1402*4882a593Smuzhiyun 	int ret;
1403*4882a593Smuzhiyun 
1404*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, PLL_CON0, PLL_EN, PLL_EN);
1405*4882a593Smuzhiyun 
1406*4882a593Smuzhiyun 	ret = regmap_read_poll_timeout(samsung->regmap, PLL_STAT0,
1407*4882a593Smuzhiyun 				       sts, (sts & PLL_LOCK), 1000, 20000);
1408*4882a593Smuzhiyun 	if (ret < 0)
1409*4882a593Smuzhiyun 		dev_err(samsung->dev, "DC-PHY pll is not locked\n");
1410*4882a593Smuzhiyun }
1411*4882a593Smuzhiyun 
samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy * samsung)1412*4882a593Smuzhiyun static void samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy *samsung)
1413*4882a593Smuzhiyun {
1414*4882a593Smuzhiyun 	regmap_update_bits(samsung->regmap, PLL_CON0, PLL_EN, 0);
1415*4882a593Smuzhiyun }
1416*4882a593Smuzhiyun 
1417*4882a593Smuzhiyun static const struct samsung_mipi_dphy_timing *
samsung_mipi_dphy_get_timing(struct samsung_mipi_dcphy * samsung)1418*4882a593Smuzhiyun samsung_mipi_dphy_get_timing(struct samsung_mipi_dcphy *samsung)
1419*4882a593Smuzhiyun {
1420*4882a593Smuzhiyun 	const struct samsung_mipi_dphy_timing *timings;
1421*4882a593Smuzhiyun 	unsigned int num_timings;
1422*4882a593Smuzhiyun 	unsigned int lane_mbps = div64_ul(samsung->pll.rate, USEC_PER_SEC);
1423*4882a593Smuzhiyun 	unsigned int i;
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 	timings = samsung_mipi_dphy_timing_table;
1426*4882a593Smuzhiyun 	num_timings = ARRAY_SIZE(samsung_mipi_dphy_timing_table);
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 	for (i = num_timings; i > 0; i--)
1429*4882a593Smuzhiyun 		if (lane_mbps <= timings[i - 1].max_lane_mbps)
1430*4882a593Smuzhiyun 			break;
1431*4882a593Smuzhiyun 
1432*4882a593Smuzhiyun 	if (i == 0)
1433*4882a593Smuzhiyun 		++i;
1434*4882a593Smuzhiyun 
1435*4882a593Smuzhiyun 	return &timings[i - 1];
1436*4882a593Smuzhiyun }
1437*4882a593Smuzhiyun 
1438*4882a593Smuzhiyun static const struct samsung_mipi_cphy_timing *
samsung_mipi_cphy_get_timing(struct samsung_mipi_dcphy * samsung)1439*4882a593Smuzhiyun samsung_mipi_cphy_get_timing(struct samsung_mipi_dcphy *samsung)
1440*4882a593Smuzhiyun {
1441*4882a593Smuzhiyun 	const struct samsung_mipi_cphy_timing *timings;
1442*4882a593Smuzhiyun 	unsigned int num_timings;
1443*4882a593Smuzhiyun 	unsigned int lane_msps = div64_ul(samsung->pll.rate, USEC_PER_SEC);
1444*4882a593Smuzhiyun 	unsigned int i;
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun 	timings = samsung_mipi_cphy_timing_table;
1447*4882a593Smuzhiyun 	num_timings = ARRAY_SIZE(samsung_mipi_cphy_timing_table);
1448*4882a593Smuzhiyun 
1449*4882a593Smuzhiyun 	for (i = num_timings; i > 0; i--)
1450*4882a593Smuzhiyun 		if (lane_msps <= timings[i - 1].max_lane_msps)
1451*4882a593Smuzhiyun 			break;
1452*4882a593Smuzhiyun 
1453*4882a593Smuzhiyun 	if (i == 0)
1454*4882a593Smuzhiyun 		++i;
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 	return &timings[i - 1];
1457*4882a593Smuzhiyun }
1458*4882a593Smuzhiyun 
samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy * samsung)1459*4882a593Smuzhiyun static void samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy *samsung)
1460*4882a593Smuzhiyun {
1461*4882a593Smuzhiyun 	const struct samsung_mipi_cphy_timing *timing;
1462*4882a593Smuzhiyun 	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
1463*4882a593Smuzhiyun 	u32 val = 0;
1464*4882a593Smuzhiyun 
1465*4882a593Smuzhiyun 	timing = samsung_mipi_cphy_get_timing(samsung);
1466*4882a593Smuzhiyun 
1467*4882a593Smuzhiyun 	/*
1468*4882a593Smuzhiyun 	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
1469*4882a593Smuzhiyun 	 * 500Msps, otherwise divide-by-16 Clock from Serial Clock
1470*4882a593Smuzhiyun 	 */
1471*4882a593Smuzhiyun 	if (lane_hs_rate < 500)
1472*4882a593Smuzhiyun 		val = HSTX_CLK_SEL;
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	val |= T_LPX(timing->lpx);
1475*4882a593Smuzhiyun 	/*  T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
1476*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON0, val);
1477*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON0, val);
1478*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON0, val);
1479*4882a593Smuzhiyun 
1480*4882a593Smuzhiyun 	val = T_HS_ZERO(timing->prebegin_3) | T_HS_PREPARE(timing->prepare_3);
1481*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON1, val);
1482*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON1, val);
1483*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON1, val);
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun 	val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->post_3);
1486*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON2, val);
1487*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON2, val);
1488*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON2, val);
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun 	/* TTA-GET/TTA-GO Timing Counter register use default value */
1491*4882a593Smuzhiyun 	val = T_TA_GET(0x3) | T_TA_GO(0x0);
1492*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON3, val);
1493*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON3, val);
1494*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON3, val);
1495*4882a593Smuzhiyun 
1496*4882a593Smuzhiyun 	/* Escape Clock is 20.00MHz */
1497*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON4, 0x1f4);
1498*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON4, 0x1f4);
1499*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON4, 0x1f4);
1500*4882a593Smuzhiyun 
1501*4882a593Smuzhiyun 	/* set T_ERR_SOT_SYNC default value */
1502*4882a593Smuzhiyun }
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun static unsigned long
samsung_mipi_dcphy_pll_round_rate(struct samsung_mipi_dcphy * samsung,unsigned long prate,unsigned long rate,u8 * prediv,u16 * fbdiv,int * dsm,u8 * scaler)1505*4882a593Smuzhiyun samsung_mipi_dcphy_pll_round_rate(struct samsung_mipi_dcphy *samsung,
1506*4882a593Smuzhiyun 				  unsigned long prate, unsigned long rate,
1507*4882a593Smuzhiyun 				  u8 *prediv, u16 *fbdiv, int *dsm, u8 *scaler)
1508*4882a593Smuzhiyun {
1509*4882a593Smuzhiyun 	u64 max_fout = samsung->c_option ? MAX_CPHY_BW : MAX_DPHY_BW;
1510*4882a593Smuzhiyun 	u64 best_freq = 0;
1511*4882a593Smuzhiyun 	u64 fin, fvco, fout;
1512*4882a593Smuzhiyun 	u8 min_prediv, max_prediv;
1513*4882a593Smuzhiyun 	u8 _prediv, best_prediv = 1;
1514*4882a593Smuzhiyun 	u16 _fbdiv, best_fbdiv = 1;
1515*4882a593Smuzhiyun 	u8 _scaler, best_scaler = 0;
1516*4882a593Smuzhiyun 	u32 min_delta = UINT_MAX;
1517*4882a593Smuzhiyun 	long _dsm, best_dsm = 0;
1518*4882a593Smuzhiyun 
1519*4882a593Smuzhiyun 	/*
1520*4882a593Smuzhiyun 	 * The PLL output frequency can be calculated using a simple formula:
1521*4882a593Smuzhiyun 	 * Fvco = ((m+k/65536) x 2 x Fin) / p
1522*4882a593Smuzhiyun 	 * Fout = ((m+k/65536) x 2 x Fin) / (p x 2^s)
1523*4882a593Smuzhiyun 	 */
1524*4882a593Smuzhiyun 	fin = div64_ul(prate, MSEC_PER_SEC);
1525*4882a593Smuzhiyun 
1526*4882a593Smuzhiyun 	while (!best_freq) {
1527*4882a593Smuzhiyun 		fout = div64_ul(rate, MSEC_PER_SEC);
1528*4882a593Smuzhiyun 		if (fout > max_fout)
1529*4882a593Smuzhiyun 			fout = max_fout;
1530*4882a593Smuzhiyun 
1531*4882a593Smuzhiyun 		/* 0 ≤ S[2:0] ≤ 6 */
1532*4882a593Smuzhiyun 		for (_scaler = 0; _scaler < 7; _scaler++) {
1533*4882a593Smuzhiyun 			fvco = fout << _scaler;
1534*4882a593Smuzhiyun 
1535*4882a593Smuzhiyun 			/*
1536*4882a593Smuzhiyun 			 * 2600MHz ≤ FVCO ≤ 6600MHz
1537*4882a593Smuzhiyun 			 */
1538*4882a593Smuzhiyun 			if (fvco < 2600 * MSEC_PER_SEC || fvco > 6600 * MSEC_PER_SEC)
1539*4882a593Smuzhiyun 				continue;
1540*4882a593Smuzhiyun 
1541*4882a593Smuzhiyun 			/* 6MHz ≤ Fref(Fin / p) ≤ 30MHz */
1542*4882a593Smuzhiyun 			min_prediv = DIV_ROUND_UP_ULL(fin, 30 * MSEC_PER_SEC);
1543*4882a593Smuzhiyun 			max_prediv = DIV_ROUND_CLOSEST_ULL(fin, 6 * MSEC_PER_SEC);
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 			for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
1546*4882a593Smuzhiyun 				u64 delta, tmp;
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 				_fbdiv = DIV_ROUND_CLOSEST_ULL(fvco * _prediv, 2 * fin);
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 				 /* 64 ≤ M[9:0] ≤ 1023 */
1551*4882a593Smuzhiyun 				if ((_fbdiv < 64) || (_fbdiv > 1023))
1552*4882a593Smuzhiyun 					continue;
1553*4882a593Smuzhiyun 
1554*4882a593Smuzhiyun 				/* -32767 ≤ K[15:0] ≤ 32767 */
1555*4882a593Smuzhiyun 				_dsm = ((_prediv * fvco) - (2 * _fbdiv * fin));
1556*4882a593Smuzhiyun 				_dsm = DIV_ROUND_UP_ULL(_dsm << 15, fin);
1557*4882a593Smuzhiyun 				if (abs(_dsm) > 32767)
1558*4882a593Smuzhiyun 					continue;
1559*4882a593Smuzhiyun 
1560*4882a593Smuzhiyun 				tmp = DIV_ROUND_CLOSEST_ULL((_fbdiv * fin * 2 * 1000), _prediv);
1561*4882a593Smuzhiyun 				tmp += DIV_ROUND_CLOSEST_ULL((_dsm * fin * 1000), _prediv << 15);
1562*4882a593Smuzhiyun 
1563*4882a593Smuzhiyun 				delta = abs(fvco * MSEC_PER_SEC - tmp);
1564*4882a593Smuzhiyun 				if (delta < min_delta) {
1565*4882a593Smuzhiyun 					best_prediv = _prediv;
1566*4882a593Smuzhiyun 					best_fbdiv = _fbdiv;
1567*4882a593Smuzhiyun 					best_dsm = _dsm;
1568*4882a593Smuzhiyun 					best_scaler = _scaler;
1569*4882a593Smuzhiyun 					min_delta = delta;
1570*4882a593Smuzhiyun 					best_freq = DIV_ROUND_CLOSEST_ULL(tmp, 1000) * MSEC_PER_SEC;
1571*4882a593Smuzhiyun 				}
1572*4882a593Smuzhiyun 			}
1573*4882a593Smuzhiyun 		}
1574*4882a593Smuzhiyun 
1575*4882a593Smuzhiyun 		rate += 100 * MSEC_PER_SEC;
1576*4882a593Smuzhiyun 	}
1577*4882a593Smuzhiyun 
1578*4882a593Smuzhiyun 	*prediv = best_prediv;
1579*4882a593Smuzhiyun 	*fbdiv = best_fbdiv;
1580*4882a593Smuzhiyun 	*dsm = (int)best_dsm & 0xffff;
1581*4882a593Smuzhiyun 	*scaler = best_scaler;
1582*4882a593Smuzhiyun 	dev_dbg(samsung->dev, "p: %d, m: %d, dsm:%ld, scaler: %d\n",
1583*4882a593Smuzhiyun 		 best_prediv, best_fbdiv, best_dsm, best_scaler);
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 	return best_freq >> best_scaler;
1586*4882a593Smuzhiyun }
1587*4882a593Smuzhiyun 
1588*4882a593Smuzhiyun static void
samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy * samsung)1589*4882a593Smuzhiyun samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung)
1590*4882a593Smuzhiyun {
1591*4882a593Smuzhiyun 	const struct samsung_mipi_dphy_timing *timing;
1592*4882a593Smuzhiyun 	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
1593*4882a593Smuzhiyun 	u32 val = 0;
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun 	timing = samsung_mipi_dphy_get_timing(samsung);
1596*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_GNR_CON0, 0xf000);
1597*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_ANA_CON0, 0x7133);
1598*4882a593Smuzhiyun 
1599*4882a593Smuzhiyun 	if (lane_hs_rate >= 4500)
1600*4882a593Smuzhiyun 		regmap_write(samsung->regmap, DPHY_MC_ANA_CON1, 0x0001);
1601*4882a593Smuzhiyun 
1602*4882a593Smuzhiyun 	/*
1603*4882a593Smuzhiyun 	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
1604*4882a593Smuzhiyun 	 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
1605*4882a593Smuzhiyun 	 */
1606*4882a593Smuzhiyun 	if (lane_hs_rate < 1500)
1607*4882a593Smuzhiyun 		val = HSTX_CLK_SEL;
1608*4882a593Smuzhiyun 
1609*4882a593Smuzhiyun 	val |= T_LPX(timing->lpx);
1610*4882a593Smuzhiyun 	/*  T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
1611*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON0, val);
1612*4882a593Smuzhiyun 
1613*4882a593Smuzhiyun 	val = T_CLK_ZERO(timing->clk_zero) | T_CLK_PREPARE(timing->clk_prepare);
1614*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON1, val);
1615*4882a593Smuzhiyun 
1616*4882a593Smuzhiyun 	val = T_HS_EXIT(timing->hs_exit) | T_CLK_TRAIL(timing->clk_trail_eot);
1617*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON2, val);
1618*4882a593Smuzhiyun 
1619*4882a593Smuzhiyun 	val = T_CLK_POST(timing->clk_post);
1620*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON3, val);
1621*4882a593Smuzhiyun 
1622*4882a593Smuzhiyun 	/* Escape Clock is 20.00MHz */
1623*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON4, 0x1f4);
1624*4882a593Smuzhiyun 
1625*4882a593Smuzhiyun 	/*
1626*4882a593Smuzhiyun 	 * skew calibration should be off, if the operation data rate is
1627*4882a593Smuzhiyun 	 * under 1.5Gbps or equal to 1.5Gbps.
1628*4882a593Smuzhiyun 	 */
1629*4882a593Smuzhiyun 	if (lane_hs_rate > 1500)
1630*4882a593Smuzhiyun 		regmap_write(samsung->regmap, DPHY_MC_DESKEW_CON0, 0x9cb1);
1631*4882a593Smuzhiyun }
1632*4882a593Smuzhiyun 
1633*4882a593Smuzhiyun static void
samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy * samsung)1634*4882a593Smuzhiyun samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy *samsung)
1635*4882a593Smuzhiyun {
1636*4882a593Smuzhiyun 	const struct samsung_mipi_dphy_timing *timing;
1637*4882a593Smuzhiyun 	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
1638*4882a593Smuzhiyun 	u32 val = 0;
1639*4882a593Smuzhiyun 
1640*4882a593Smuzhiyun 	timing = samsung_mipi_dphy_get_timing(samsung);
1641*4882a593Smuzhiyun 
1642*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_ANA_CON0, 0x7133);
1643*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_ANA_CON0, 0x7133);
1644*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_ANA_CON0, 0x7133);
1645*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MD3_ANA_CON0, 0x7133);
1646*4882a593Smuzhiyun 
1647*4882a593Smuzhiyun 	if (lane_hs_rate >= 4500) {
1648*4882a593Smuzhiyun 		regmap_write(samsung->regmap, COMBO_MD0_ANA_CON1, 0x0001);
1649*4882a593Smuzhiyun 		regmap_write(samsung->regmap, COMBO_MD1_ANA_CON1, 0x0001);
1650*4882a593Smuzhiyun 		regmap_write(samsung->regmap, COMBO_MD2_ANA_CON1, 0x0001);
1651*4882a593Smuzhiyun 		regmap_write(samsung->regmap, DPHY_MD3_ANA_CON1, 0x0001);
1652*4882a593Smuzhiyun 	}
1653*4882a593Smuzhiyun 
1654*4882a593Smuzhiyun 	/*
1655*4882a593Smuzhiyun 	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
1656*4882a593Smuzhiyun 	 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
1657*4882a593Smuzhiyun 	 */
1658*4882a593Smuzhiyun 	if (lane_hs_rate < 1500)
1659*4882a593Smuzhiyun 		val = HSTX_CLK_SEL;
1660*4882a593Smuzhiyun 
1661*4882a593Smuzhiyun 	val |= T_LPX(timing->lpx);
1662*4882a593Smuzhiyun 	/*  T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
1663*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON0, val);
1664*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON0, val);
1665*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON0, val);
1666*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON0, val);
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun 	val = T_HS_ZERO(timing->hs_zero) | T_HS_PREPARE(timing->hs_prepare);
1669*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON1, val);
1670*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON1, val);
1671*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON1, val);
1672*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON1, val);
1673*4882a593Smuzhiyun 
1674*4882a593Smuzhiyun 	val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->hs_trail_eot);
1675*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON2, val);
1676*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON2, val);
1677*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON2, val);
1678*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON2, val);
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	/* TTA-GET/TTA-GO Timing Counter register use default value */
1681*4882a593Smuzhiyun 	val = T_TA_GET(0x3) | T_TA_GO(0x0);
1682*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON3, val);
1683*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON3, val);
1684*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON3, val);
1685*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON3, val);
1686*4882a593Smuzhiyun 
1687*4882a593Smuzhiyun 	/* Escape Clock is 20.00MHz */
1688*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON4, 0x1f4);
1689*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON4, 0x1f4);
1690*4882a593Smuzhiyun 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON4, 0x1f4);
1691*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON4, 0x1f4);
1692*4882a593Smuzhiyun }
1693*4882a593Smuzhiyun 
1694*4882a593Smuzhiyun static void
samsung_mipi_dcphy_hs_vreg_amp_configure(struct samsung_mipi_dcphy * samsung)1695*4882a593Smuzhiyun samsung_mipi_dcphy_hs_vreg_amp_configure(struct samsung_mipi_dcphy *samsung)
1696*4882a593Smuzhiyun {
1697*4882a593Smuzhiyun 	regmap_write(samsung->regmap, DPHY_MC_ANA_CON2, HS_VREG_AMP_ICON(2));
1698*4882a593Smuzhiyun }
1699*4882a593Smuzhiyun 
samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy * samsung)1700*4882a593Smuzhiyun static void samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung)
1701*4882a593Smuzhiyun {
1702*4882a593Smuzhiyun 	reset_control_assert(samsung->m_phy_rst);
1703*4882a593Smuzhiyun 
1704*4882a593Smuzhiyun 	samsung_mipi_dcphy_bias_block_enable(samsung, NULL);
1705*4882a593Smuzhiyun 	samsung_mipi_dcphy_pll_configure(samsung);
1706*4882a593Smuzhiyun 	samsung_mipi_dphy_clk_lane_timing_init(samsung);
1707*4882a593Smuzhiyun 	samsung_mipi_dphy_data_lane_timing_init(samsung);
1708*4882a593Smuzhiyun 	samsung_mipi_dcphy_pll_enable(samsung);
1709*4882a593Smuzhiyun 	samsung_mipi_dphy_lane_enable(samsung);
1710*4882a593Smuzhiyun 
1711*4882a593Smuzhiyun 	reset_control_deassert(samsung->m_phy_rst);
1712*4882a593Smuzhiyun 
1713*4882a593Smuzhiyun 	/* The TSKEWCAL maximum is 100 µsec
1714*4882a593Smuzhiyun 	 * at initial calibration.
1715*4882a593Smuzhiyun 	 */
1716*4882a593Smuzhiyun 	usleep_range(100, 110);
1717*4882a593Smuzhiyun }
1718*4882a593Smuzhiyun 
samsung_mipi_cphy_power_on(struct samsung_mipi_dcphy * samsung)1719*4882a593Smuzhiyun static void samsung_mipi_cphy_power_on(struct samsung_mipi_dcphy *samsung)
1720*4882a593Smuzhiyun {
1721*4882a593Smuzhiyun 	regmap_write(samsung->grf_regmap, MIPI_DCPHY_GRF_CON0, M_CPHY_MODE);
1722*4882a593Smuzhiyun 	reset_control_assert(samsung->m_phy_rst);
1723*4882a593Smuzhiyun 
1724*4882a593Smuzhiyun 	samsung_mipi_dcphy_bias_block_enable(samsung, NULL);
1725*4882a593Smuzhiyun 	samsung_mipi_dcphy_hs_vreg_amp_configure(samsung);
1726*4882a593Smuzhiyun 	samsung_mipi_dcphy_pll_configure(samsung);
1727*4882a593Smuzhiyun 	samsung_mipi_cphy_timing_init(samsung);
1728*4882a593Smuzhiyun 	samsung_mipi_dcphy_pll_enable(samsung);
1729*4882a593Smuzhiyun 	samsung_mipi_cphy_lane_enable(samsung);
1730*4882a593Smuzhiyun 
1731*4882a593Smuzhiyun 	reset_control_deassert(samsung->m_phy_rst);
1732*4882a593Smuzhiyun }
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun static struct v4l2_subdev *get_remote_sensor(struct v4l2_subdev *sd);
1735*4882a593Smuzhiyun 
samsung_mipi_dcphy_power_on(struct phy * phy)1736*4882a593Smuzhiyun static int samsung_mipi_dcphy_power_on(struct phy *phy)
1737*4882a593Smuzhiyun {
1738*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
1739*4882a593Smuzhiyun 	enum phy_mode mode = phy_get_mode(phy);
1740*4882a593Smuzhiyun 	int on = 0;
1741*4882a593Smuzhiyun 	struct v4l2_subdev *sensor_sd = NULL;
1742*4882a593Smuzhiyun 
1743*4882a593Smuzhiyun 	pm_runtime_get_sync(samsung->dev);
1744*4882a593Smuzhiyun 	reset_control_assert(samsung->apb_rst);
1745*4882a593Smuzhiyun 	udelay(1);
1746*4882a593Smuzhiyun 	reset_control_deassert(samsung->apb_rst);
1747*4882a593Smuzhiyun 	if (atomic_read(&samsung->stream_cnt)) {
1748*4882a593Smuzhiyun 		sensor_sd = get_remote_sensor(&samsung->dphy_dev[0]->sd);
1749*4882a593Smuzhiyun 		samsung->stream_off(samsung->dphy_dev[0], &samsung->dphy_dev[0]->sd);
1750*4882a593Smuzhiyun 		if (sensor_sd)
1751*4882a593Smuzhiyun 			v4l2_subdev_call(sensor_sd, core, ioctl,
1752*4882a593Smuzhiyun 					 RKMODULE_SET_QUICK_STREAM, &on);
1753*4882a593Smuzhiyun 		samsung->stream_on(samsung->dphy_dev[0], &samsung->dphy_dev[0]->sd);
1754*4882a593Smuzhiyun 		on = 1;
1755*4882a593Smuzhiyun 		if (sensor_sd)
1756*4882a593Smuzhiyun 			v4l2_subdev_call(sensor_sd, core, ioctl,
1757*4882a593Smuzhiyun 					 RKMODULE_SET_QUICK_STREAM, &on);
1758*4882a593Smuzhiyun 	}
1759*4882a593Smuzhiyun 
1760*4882a593Smuzhiyun 	switch (mode) {
1761*4882a593Smuzhiyun 	case PHY_MODE_MIPI_DPHY:
1762*4882a593Smuzhiyun 		samsung_mipi_dphy_power_on(samsung);
1763*4882a593Smuzhiyun 		break;
1764*4882a593Smuzhiyun 	default:
1765*4882a593Smuzhiyun 		samsung_mipi_cphy_power_on(samsung);
1766*4882a593Smuzhiyun 	}
1767*4882a593Smuzhiyun 
1768*4882a593Smuzhiyun 	return 0;
1769*4882a593Smuzhiyun }
1770*4882a593Smuzhiyun 
samsung_mipi_dcphy_power_off(struct phy * phy)1771*4882a593Smuzhiyun static int samsung_mipi_dcphy_power_off(struct phy *phy)
1772*4882a593Smuzhiyun {
1773*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
1774*4882a593Smuzhiyun 	enum phy_mode mode = phy_get_mode(phy);
1775*4882a593Smuzhiyun 
1776*4882a593Smuzhiyun 	switch (mode) {
1777*4882a593Smuzhiyun 	case PHY_MODE_MIPI_DPHY:
1778*4882a593Smuzhiyun 		samsung_mipi_dphy_lane_disable(samsung);
1779*4882a593Smuzhiyun 		break;
1780*4882a593Smuzhiyun 	default:
1781*4882a593Smuzhiyun 		samsung_mipi_cphy_lane_disable(samsung);
1782*4882a593Smuzhiyun 	}
1783*4882a593Smuzhiyun 
1784*4882a593Smuzhiyun 	samsung_mipi_dcphy_pll_disable(samsung);
1785*4882a593Smuzhiyun 	samsung_mipi_dcphy_bias_block_disable(samsung);
1786*4882a593Smuzhiyun 
1787*4882a593Smuzhiyun 	pm_runtime_put(samsung->dev);
1788*4882a593Smuzhiyun 
1789*4882a593Smuzhiyun 	return 0;
1790*4882a593Smuzhiyun }
1791*4882a593Smuzhiyun 
samsung_mipi_dcphy_set_mode(struct phy * phy,enum phy_mode mode,int submode)1792*4882a593Smuzhiyun static int samsung_mipi_dcphy_set_mode(struct phy *phy, enum phy_mode mode,
1793*4882a593Smuzhiyun 				   int submode)
1794*4882a593Smuzhiyun {
1795*4882a593Smuzhiyun 	return 0;
1796*4882a593Smuzhiyun }
1797*4882a593Smuzhiyun 
1798*4882a593Smuzhiyun static int
samsung_mipi_dcphy_pll_ssc_modulation_calc(struct samsung_mipi_dcphy * samsung,u8 * mfr,u8 * mrr)1799*4882a593Smuzhiyun samsung_mipi_dcphy_pll_ssc_modulation_calc(struct samsung_mipi_dcphy *samsung,
1800*4882a593Smuzhiyun 					   u8 *mfr, u8 *mrr)
1801*4882a593Smuzhiyun {
1802*4882a593Smuzhiyun 	unsigned long fin = div64_ul(clk_get_rate(samsung->ref_clk), MSEC_PER_SEC);
1803*4882a593Smuzhiyun 	u16 prediv = samsung->pll.prediv;
1804*4882a593Smuzhiyun 	u16 fbdiv = samsung->pll.fbdiv;
1805*4882a593Smuzhiyun 	u16 min_mfr, max_mfr;
1806*4882a593Smuzhiyun 	u16 _mfr, best_mfr = 0;
1807*4882a593Smuzhiyun 	u16 mr, _mrr, best_mrr = 0;
1808*4882a593Smuzhiyun 
1809*4882a593Smuzhiyun 	/* 20KHz ≤ MF ≤ 150KHz */
1810*4882a593Smuzhiyun 	max_mfr = DIV_ROUND_UP(fin, (20 * prediv) << 5);
1811*4882a593Smuzhiyun 	min_mfr = div64_ul(fin, ((150 * prediv) << 5));
1812*4882a593Smuzhiyun 	/*0 ≤ mfr ≤ 255 */
1813*4882a593Smuzhiyun 	if (max_mfr > 256)
1814*4882a593Smuzhiyun 		max_mfr = 256;
1815*4882a593Smuzhiyun 
1816*4882a593Smuzhiyun 	for (_mfr = min_mfr; _mfr < max_mfr; _mfr++) {
1817*4882a593Smuzhiyun 		/* 1 ≤ mrr ≤ 31 */
1818*4882a593Smuzhiyun 		for (_mrr = 1; _mrr < 32; _mrr++) {
1819*4882a593Smuzhiyun 			mr = DIV_ROUND_UP(_mfr * _mrr * 100, fbdiv << 6);
1820*4882a593Smuzhiyun 			/* 0 ≤ MR ≤ 5% */
1821*4882a593Smuzhiyun 			if (mr > 5)
1822*4882a593Smuzhiyun 				continue;
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun 			if (_mfr * _mrr < 513) {
1825*4882a593Smuzhiyun 				best_mfr = _mfr;
1826*4882a593Smuzhiyun 				best_mrr = _mrr;
1827*4882a593Smuzhiyun 				break;
1828*4882a593Smuzhiyun 			}
1829*4882a593Smuzhiyun 		}
1830*4882a593Smuzhiyun 	}
1831*4882a593Smuzhiyun 
1832*4882a593Smuzhiyun 	if (best_mrr) {
1833*4882a593Smuzhiyun 		*mfr = best_mfr & 0xff;
1834*4882a593Smuzhiyun 		*mrr = best_mrr & 0x3f;
1835*4882a593Smuzhiyun 	} else {
1836*4882a593Smuzhiyun 		dev_err(samsung->dev, "failed to calc ssc parameter mfr and mrr\n");
1837*4882a593Smuzhiyun 		return -EINVAL;
1838*4882a593Smuzhiyun 	}
1839*4882a593Smuzhiyun 
1840*4882a593Smuzhiyun 	return 0;
1841*4882a593Smuzhiyun }
1842*4882a593Smuzhiyun 
1843*4882a593Smuzhiyun static void
samsung_mipi_dcphy_pll_calc_rate(struct samsung_mipi_dcphy * samsung,unsigned long long rate)1844*4882a593Smuzhiyun samsung_mipi_dcphy_pll_calc_rate(struct samsung_mipi_dcphy *samsung,
1845*4882a593Smuzhiyun 				 unsigned long long rate)
1846*4882a593Smuzhiyun {
1847*4882a593Smuzhiyun 	unsigned long prate = clk_get_rate(samsung->ref_clk);
1848*4882a593Smuzhiyun 	unsigned long fout;
1849*4882a593Smuzhiyun 	u8 scaler = 0, mfr = 0, mrr = 0;
1850*4882a593Smuzhiyun 	u16 fbdiv = 1;
1851*4882a593Smuzhiyun 	u8 prediv = 1;
1852*4882a593Smuzhiyun 	int dsm = 0;
1853*4882a593Smuzhiyun 	int ret;
1854*4882a593Smuzhiyun 
1855*4882a593Smuzhiyun 	fout = samsung_mipi_dcphy_pll_round_rate(samsung, prate, rate,
1856*4882a593Smuzhiyun 						 &prediv, &fbdiv, &dsm,
1857*4882a593Smuzhiyun 						 &scaler);
1858*4882a593Smuzhiyun 
1859*4882a593Smuzhiyun 	dev_dbg(samsung->dev, "%s: fin=%lu, req_rate=%llu\n",
1860*4882a593Smuzhiyun 		__func__, prate, rate);
1861*4882a593Smuzhiyun 	dev_dbg(samsung->dev, "%s: fout=%lu, prediv=%u, fbdiv=%u\n",
1862*4882a593Smuzhiyun 		__func__, fout, prediv, fbdiv);
1863*4882a593Smuzhiyun 
1864*4882a593Smuzhiyun 	samsung->pll.prediv = prediv;
1865*4882a593Smuzhiyun 	samsung->pll.fbdiv = fbdiv;
1866*4882a593Smuzhiyun 	samsung->pll.dsm = dsm;
1867*4882a593Smuzhiyun 	samsung->pll.scaler = scaler;
1868*4882a593Smuzhiyun 	samsung->pll.rate = fout;
1869*4882a593Smuzhiyun 
1870*4882a593Smuzhiyun 	/*
1871*4882a593Smuzhiyun 	 * All DPHY 2.0 compliant Transmitters shall support SSC operating above
1872*4882a593Smuzhiyun 	 * 2.5 Gbps
1873*4882a593Smuzhiyun 	 */
1874*4882a593Smuzhiyun 	if (fout > 2500000000LL) {
1875*4882a593Smuzhiyun 		ret = samsung_mipi_dcphy_pll_ssc_modulation_calc(samsung,
1876*4882a593Smuzhiyun 								 &mfr, &mrr);
1877*4882a593Smuzhiyun 		if (!ret) {
1878*4882a593Smuzhiyun 			samsung->pll.ssc_en = true;
1879*4882a593Smuzhiyun 			samsung->pll.mfr = mfr;
1880*4882a593Smuzhiyun 			samsung->pll.mrr = mrr;
1881*4882a593Smuzhiyun 		}
1882*4882a593Smuzhiyun 	}
1883*4882a593Smuzhiyun }
1884*4882a593Smuzhiyun 
samsung_mipi_dcphy_configure(struct phy * phy,union phy_configure_opts * opts)1885*4882a593Smuzhiyun static int samsung_mipi_dcphy_configure(struct phy *phy,
1886*4882a593Smuzhiyun 					union phy_configure_opts *opts)
1887*4882a593Smuzhiyun {
1888*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
1889*4882a593Smuzhiyun 	unsigned long long target_rate = opts->mipi_dphy.hs_clk_rate;
1890*4882a593Smuzhiyun 	enum phy_mode mode = phy_get_mode(phy);
1891*4882a593Smuzhiyun 
1892*4882a593Smuzhiyun 	samsung->c_option = (mode == PHY_MODE_MIPI_DPHY) ? false : true;
1893*4882a593Smuzhiyun 
1894*4882a593Smuzhiyun 	samsung->lanes = opts->mipi_dphy.lanes > 4 ? 4 : opts->mipi_dphy.lanes;
1895*4882a593Smuzhiyun 
1896*4882a593Smuzhiyun 	samsung_mipi_dcphy_pll_calc_rate(samsung, target_rate);
1897*4882a593Smuzhiyun 	opts->mipi_dphy.hs_clk_rate = samsung->pll.rate;
1898*4882a593Smuzhiyun 
1899*4882a593Smuzhiyun 	return 0;
1900*4882a593Smuzhiyun }
1901*4882a593Smuzhiyun 
get_remote_sensor(struct v4l2_subdev * sd)1902*4882a593Smuzhiyun static struct v4l2_subdev *get_remote_sensor(struct v4l2_subdev *sd)
1903*4882a593Smuzhiyun {
1904*4882a593Smuzhiyun 	struct media_pad *local, *remote;
1905*4882a593Smuzhiyun 	struct media_entity *sensor_me;
1906*4882a593Smuzhiyun 
1907*4882a593Smuzhiyun 	local = &sd->entity.pads[CSI2_DPHY_RX_PAD_SINK];
1908*4882a593Smuzhiyun 	remote = media_entity_remote_pad(local);
1909*4882a593Smuzhiyun 	if (!remote) {
1910*4882a593Smuzhiyun 		v4l2_warn(sd, "No link between dphy and sensor\n");
1911*4882a593Smuzhiyun 		return NULL;
1912*4882a593Smuzhiyun 	}
1913*4882a593Smuzhiyun 
1914*4882a593Smuzhiyun 	sensor_me = media_entity_remote_pad(local)->entity;
1915*4882a593Smuzhiyun 	return media_entity_to_v4l2_subdev(sensor_me);
1916*4882a593Smuzhiyun }
1917*4882a593Smuzhiyun 
sd_to_sensor(struct csi2_dphy * dphy,struct v4l2_subdev * sd)1918*4882a593Smuzhiyun static struct csi2_sensor *sd_to_sensor(struct csi2_dphy *dphy,
1919*4882a593Smuzhiyun 					   struct v4l2_subdev *sd)
1920*4882a593Smuzhiyun {
1921*4882a593Smuzhiyun 	int i;
1922*4882a593Smuzhiyun 
1923*4882a593Smuzhiyun 	for (i = 0; i < dphy->num_sensors; ++i)
1924*4882a593Smuzhiyun 		if (dphy->sensors[i].sd == sd)
1925*4882a593Smuzhiyun 			return &dphy->sensors[i];
1926*4882a593Smuzhiyun 
1927*4882a593Smuzhiyun 	return NULL;
1928*4882a593Smuzhiyun }
1929*4882a593Smuzhiyun 
samsung_dcphy_rx_config_settle(struct csi2_dphy * dphy,struct csi2_sensor * sensor)1930*4882a593Smuzhiyun static void samsung_dcphy_rx_config_settle(struct csi2_dphy *dphy,
1931*4882a593Smuzhiyun 					  struct csi2_sensor *sensor)
1932*4882a593Smuzhiyun {
1933*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
1934*4882a593Smuzhiyun 	const struct hsfreq_range *hsfreq_ranges = NULL;
1935*4882a593Smuzhiyun 	int num_hsfreq_ranges = 0;
1936*4882a593Smuzhiyun 	int i, hsfreq = 0;
1937*4882a593Smuzhiyun 	u32 sot_sync = 0;
1938*4882a593Smuzhiyun 
1939*4882a593Smuzhiyun 	if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
1940*4882a593Smuzhiyun 		hsfreq_ranges = samsung_dphy_rx_hsfreq_ranges;
1941*4882a593Smuzhiyun 		num_hsfreq_ranges = ARRAY_SIZE(samsung_dphy_rx_hsfreq_ranges);
1942*4882a593Smuzhiyun 		sot_sync = 0x03;
1943*4882a593Smuzhiyun 	} else if (sensor->mbus.type == V4L2_MBUS_CSI2_CPHY) {
1944*4882a593Smuzhiyun 		hsfreq_ranges = samsung_cphy_rx_hsfreq_ranges;
1945*4882a593Smuzhiyun 		num_hsfreq_ranges = ARRAY_SIZE(samsung_cphy_rx_hsfreq_ranges);
1946*4882a593Smuzhiyun 		sot_sync = 0x32;
1947*4882a593Smuzhiyun 	} else {
1948*4882a593Smuzhiyun 		dev_err(dphy->dev, "mbus type %d is not support",
1949*4882a593Smuzhiyun 			sensor->mbus.type);
1950*4882a593Smuzhiyun 		return;
1951*4882a593Smuzhiyun 	}
1952*4882a593Smuzhiyun 	/* set data lane */
1953*4882a593Smuzhiyun 	for (i = 0; i < num_hsfreq_ranges; i++) {
1954*4882a593Smuzhiyun 		if (hsfreq_ranges[i].range_h >= dphy->data_rate_mbps) {
1955*4882a593Smuzhiyun 			hsfreq = hsfreq_ranges[i].cfg_bit;
1956*4882a593Smuzhiyun 			break;
1957*4882a593Smuzhiyun 		}
1958*4882a593Smuzhiyun 	}
1959*4882a593Smuzhiyun 
1960*4882a593Smuzhiyun 	if (i == num_hsfreq_ranges) {
1961*4882a593Smuzhiyun 		i = num_hsfreq_ranges - 1;
1962*4882a593Smuzhiyun 		dev_warn(dphy->dev, "data rate: %lld mbps, max support %d mbps",
1963*4882a593Smuzhiyun 			 dphy->data_rate_mbps, hsfreq_ranges[i].range_h + 1);
1964*4882a593Smuzhiyun 		hsfreq = hsfreq_ranges[i].cfg_bit;
1965*4882a593Smuzhiyun 	}
1966*4882a593Smuzhiyun 	/*clk settle fix to 0x301*/
1967*4882a593Smuzhiyun 	if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY)
1968*4882a593Smuzhiyun 		regmap_write(samsung->regmap, RX_CLK_THS_SETTLE, 0x301);
1969*4882a593Smuzhiyun 
1970*4882a593Smuzhiyun 	if (sensor->lanes > 0x00) {
1971*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE0_THS_SETTLE, 0x1ff, hsfreq);
1972*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE0_ERR_SOT_SYNC, 0xff, sot_sync);
1973*4882a593Smuzhiyun 	}
1974*4882a593Smuzhiyun 	if (sensor->lanes > 0x01) {
1975*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE1_THS_SETTLE, 0x1ff, hsfreq);
1976*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE1_ERR_SOT_SYNC, 0xff, sot_sync);
1977*4882a593Smuzhiyun 	}
1978*4882a593Smuzhiyun 	if (sensor->lanes > 0x02) {
1979*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE2_THS_SETTLE, 0x1ff, hsfreq);
1980*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE2_ERR_SOT_SYNC, 0xff, sot_sync);
1981*4882a593Smuzhiyun 	}
1982*4882a593Smuzhiyun 	if (sensor->lanes > 0x03) {
1983*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE3_THS_SETTLE, 0x1ff, hsfreq);
1984*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_LANE3_ERR_SOT_SYNC, 0xff, sot_sync);
1985*4882a593Smuzhiyun 	}
1986*4882a593Smuzhiyun }
1987*4882a593Smuzhiyun 
samsung_dcphy_rx_config_common(struct csi2_dphy * dphy,struct csi2_sensor * sensor)1988*4882a593Smuzhiyun static int samsung_dcphy_rx_config_common(struct csi2_dphy *dphy,
1989*4882a593Smuzhiyun 					  struct csi2_sensor *sensor)
1990*4882a593Smuzhiyun {
1991*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
1992*4882a593Smuzhiyun 	u32 dlysel = 0;
1993*4882a593Smuzhiyun 	int i = 0;
1994*4882a593Smuzhiyun 
1995*4882a593Smuzhiyun 	if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
1996*4882a593Smuzhiyun 		if (dphy->data_rate_mbps < 1500)
1997*4882a593Smuzhiyun 			dlysel = 0;
1998*4882a593Smuzhiyun 		else if (dphy->data_rate_mbps < 2000)
1999*4882a593Smuzhiyun 			dlysel = 3 << 8;
2000*4882a593Smuzhiyun 		else if (dphy->data_rate_mbps < 3000)
2001*4882a593Smuzhiyun 			dlysel = 2 << 8;
2002*4882a593Smuzhiyun 		else if (dphy->data_rate_mbps < 4000)
2003*4882a593Smuzhiyun 			dlysel = 1 << 8;
2004*4882a593Smuzhiyun 		else if (dphy->data_rate_mbps < 6500)
2005*4882a593Smuzhiyun 			dlysel = 0;
2006*4882a593Smuzhiyun 		if (dphy->dphy_param.clk_hs_term_sel > 0x7) {
2007*4882a593Smuzhiyun 			dev_err(dphy->dev, "clk_hs_term_sel error param %d\n",
2008*4882a593Smuzhiyun 				dphy->dphy_param.clk_hs_term_sel);
2009*4882a593Smuzhiyun 			return -EINVAL;
2010*4882a593Smuzhiyun 		}
2011*4882a593Smuzhiyun 		for (i = 0; i < sensor->lanes; i++) {
2012*4882a593Smuzhiyun 			if (dphy->dphy_param.data_hs_term_sel[i] > 0x7) {
2013*4882a593Smuzhiyun 				dev_err(dphy->dev, "data_hs_term_sel[%d] error param %d\n",
2014*4882a593Smuzhiyun 					i,
2015*4882a593Smuzhiyun 					dphy->dphy_param.data_hs_term_sel[i]);
2016*4882a593Smuzhiyun 				return -EINVAL;
2017*4882a593Smuzhiyun 			}
2018*4882a593Smuzhiyun 			if (dphy->dphy_param.lp_hys_sw[i] > 0x3) {
2019*4882a593Smuzhiyun 				dev_err(dphy->dev, "lp_hys_sw[%d] error param %d\n",
2020*4882a593Smuzhiyun 					i,
2021*4882a593Smuzhiyun 					dphy->dphy_param.lp_hys_sw[i]);
2022*4882a593Smuzhiyun 				return -EINVAL;
2023*4882a593Smuzhiyun 			}
2024*4882a593Smuzhiyun 			if (dphy->dphy_param.lp_escclk_pol_sel[i] > 0x1) {
2025*4882a593Smuzhiyun 				dev_err(dphy->dev, "lp_escclk_pol_sel[%d] error param %d\n",
2026*4882a593Smuzhiyun 					i,
2027*4882a593Smuzhiyun 					dphy->dphy_param.lp_escclk_pol_sel[i]);
2028*4882a593Smuzhiyun 				return -EINVAL;
2029*4882a593Smuzhiyun 			}
2030*4882a593Smuzhiyun 			if (dphy->dphy_param.skew_data_cal_clk[i] > 0x1f) {
2031*4882a593Smuzhiyun 				dev_err(dphy->dev, "skew_data_cal_clk[%d] error param %d\n",
2032*4882a593Smuzhiyun 					i,
2033*4882a593Smuzhiyun 					dphy->dphy_param.skew_data_cal_clk[i]);
2034*4882a593Smuzhiyun 				return -EINVAL;
2035*4882a593Smuzhiyun 			}
2036*4882a593Smuzhiyun 		}
2037*4882a593Smuzhiyun 		regmap_write(samsung->regmap, RX_S0C_GNR_CON1, 0x1450);
2038*4882a593Smuzhiyun 		regmap_write(samsung->regmap, RX_S0C_ANA_CON1, 0x8000);
2039*4882a593Smuzhiyun 		regmap_write(samsung->regmap, RX_S0C_ANA_CON2, dphy->dphy_param.clk_hs_term_sel);
2040*4882a593Smuzhiyun 		regmap_write(samsung->regmap, RX_S0C_ANA_CON3, 0x0600);
2041*4882a593Smuzhiyun 		if (sensor->lanes > 0x00) {
2042*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_GNR_CON1, 0x1450);
2043*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON1, 0x8000);
2044*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON2, dlysel |
2045*4882a593Smuzhiyun 				     dphy->dphy_param.data_hs_term_sel[0]);
2046*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON3, 0x0600 |
2047*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_hys_sw[0] << 4) |
2048*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_escclk_pol_sel[0] << 11));
2049*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON7, 0x40);
2050*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_DESKEW_CON2,
2051*4882a593Smuzhiyun 				     dphy->dphy_param.skew_data_cal_clk[0]);
2052*4882a593Smuzhiyun 		}
2053*4882a593Smuzhiyun 		if (sensor->lanes > 0x01) {
2054*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_GNR_CON1, 0x1450);
2055*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON1, 0x8000);
2056*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON2, dlysel |
2057*4882a593Smuzhiyun 				     dphy->dphy_param.data_hs_term_sel[1]);
2058*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON3, 0x0600 |
2059*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_hys_sw[1] << 4) |
2060*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_escclk_pol_sel[1] << 11));
2061*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON7, 0x40);
2062*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_DESKEW_CON2,
2063*4882a593Smuzhiyun 				     dphy->dphy_param.skew_data_cal_clk[1]);
2064*4882a593Smuzhiyun 		}
2065*4882a593Smuzhiyun 		if (sensor->lanes > 0x02) {
2066*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_GNR_CON1, 0x1450);
2067*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON1, 0x8000);
2068*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON2, dlysel |
2069*4882a593Smuzhiyun 				     dphy->dphy_param.data_hs_term_sel[2]);
2070*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON3, 0x0600 |
2071*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_hys_sw[2] << 4) |
2072*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_escclk_pol_sel[2] << 11));
2073*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON7, 0x40);
2074*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_DESKEW_CON2,
2075*4882a593Smuzhiyun 				     dphy->dphy_param.skew_data_cal_clk[2]);
2076*4882a593Smuzhiyun 		}
2077*4882a593Smuzhiyun 		if (sensor->lanes > 0x03) {
2078*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_S0D3_GNR_CON1, 0x1450);
2079*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_S0D3_ANA_CON1, 0x8000);
2080*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_S0D3_ANA_CON2, dlysel |
2081*4882a593Smuzhiyun 				     dphy->dphy_param.data_hs_term_sel[3]);
2082*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_S0D3_ANA_CON3, 0x0600 |
2083*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_hys_sw[3] << 4) |
2084*4882a593Smuzhiyun 				     (dphy->dphy_param.lp_escclk_pol_sel[3] << 11));
2085*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_S0D3_DESKEW_CON2,
2086*4882a593Smuzhiyun 				     dphy->dphy_param.skew_data_cal_clk[3]);
2087*4882a593Smuzhiyun 		}
2088*4882a593Smuzhiyun 	} else {
2089*4882a593Smuzhiyun 		if (sensor->lanes > 0x00) {
2090*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_GNR_CON1, 0x1450);
2091*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON1, 0x8000);
2092*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON2, 0x5);
2093*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON3, 0x600);
2094*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON6, 0x608);
2095*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON7, 0x40);
2096*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_CRC_CON1, 0x1500);
2097*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D0_CRC_CON2, 0x30);
2098*4882a593Smuzhiyun 		}
2099*4882a593Smuzhiyun 		if (sensor->lanes > 0x01) {
2100*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_GNR_CON1, 0x1450);
2101*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON1, 0x8000);
2102*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON2, 0x5);
2103*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON3, 0x600);
2104*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON6, 0x608);
2105*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON7, 0x40);
2106*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_CRC_CON1, 0x1500);
2107*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D1_CRC_CON2, 0x30);
2108*4882a593Smuzhiyun 		}
2109*4882a593Smuzhiyun 		if (sensor->lanes > 0x02) {
2110*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_GNR_CON1, 0x1450);
2111*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON1, 0x8000);
2112*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON2, 0x5);
2113*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON3, 0x600);
2114*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON6, 0x608);
2115*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON7, 0x40);
2116*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_CRC_CON1, 0x1500);
2117*4882a593Smuzhiyun 			regmap_write(samsung->regmap, RX_COMBO_S0D2_CRC_CON2, 0x30);
2118*4882a593Smuzhiyun 		}
2119*4882a593Smuzhiyun 	}
2120*4882a593Smuzhiyun 	return 0;
2121*4882a593Smuzhiyun }
2122*4882a593Smuzhiyun 
samsung_dcphy_rx_lane_enable(struct csi2_dphy * dphy,struct csi2_sensor * sensor)2123*4882a593Smuzhiyun static int samsung_dcphy_rx_lane_enable(struct csi2_dphy *dphy,
2124*4882a593Smuzhiyun 					  struct csi2_sensor *sensor)
2125*4882a593Smuzhiyun {
2126*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
2127*4882a593Smuzhiyun 	u32 sts;
2128*4882a593Smuzhiyun 	int ret = 0;
2129*4882a593Smuzhiyun 
2130*4882a593Smuzhiyun 	if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY)
2131*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_CLK_LANE_ENABLE, PHY_ENABLE, PHY_ENABLE);
2132*4882a593Smuzhiyun 
2133*4882a593Smuzhiyun 	if (sensor->lanes > 0x00)
2134*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE0_ENABLE, PHY_ENABLE, PHY_ENABLE);
2135*4882a593Smuzhiyun 	if (sensor->lanes > 0x01)
2136*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE1_ENABLE, PHY_ENABLE, PHY_ENABLE);
2137*4882a593Smuzhiyun 	if (sensor->lanes > 0x02)
2138*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE2_ENABLE, PHY_ENABLE, PHY_ENABLE);
2139*4882a593Smuzhiyun 	if (sensor->lanes > 0x03)
2140*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE3_ENABLE, PHY_ENABLE, PHY_ENABLE);
2141*4882a593Smuzhiyun 
2142*4882a593Smuzhiyun 	/*wait for clk lane ready*/
2143*4882a593Smuzhiyun 	if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
2144*4882a593Smuzhiyun 		ret = regmap_read_poll_timeout(samsung->regmap, RX_CLK_LANE_ENABLE,
2145*4882a593Smuzhiyun 				       sts, (sts & PHY_READY), 200, 4000);
2146*4882a593Smuzhiyun 		if (ret < 0) {
2147*4882a593Smuzhiyun 			dev_err(samsung->dev, "phy rx clk lane is not locked\n");
2148*4882a593Smuzhiyun 			return -EINVAL;
2149*4882a593Smuzhiyun 		}
2150*4882a593Smuzhiyun 	}
2151*4882a593Smuzhiyun 
2152*4882a593Smuzhiyun 	/*wait for data lane ready*/
2153*4882a593Smuzhiyun 	if (sensor->lanes > 0x00) {
2154*4882a593Smuzhiyun 		ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE0_ENABLE,
2155*4882a593Smuzhiyun 				       sts, (sts & PHY_READY), 200, 2000);
2156*4882a593Smuzhiyun 		if (ret < 0) {
2157*4882a593Smuzhiyun 			dev_err(samsung->dev, "phy rx data lane 0 is not locked\n");
2158*4882a593Smuzhiyun 			return -EINVAL;
2159*4882a593Smuzhiyun 		}
2160*4882a593Smuzhiyun 	}
2161*4882a593Smuzhiyun 	if (sensor->lanes > 0x01) {
2162*4882a593Smuzhiyun 		ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE1_ENABLE,
2163*4882a593Smuzhiyun 				       sts, (sts & PHY_READY), 200, 2000);
2164*4882a593Smuzhiyun 		if (ret < 0) {
2165*4882a593Smuzhiyun 			dev_err(samsung->dev, "phy rx data lane 1 is not locked\n");
2166*4882a593Smuzhiyun 			return -EINVAL;
2167*4882a593Smuzhiyun 		}
2168*4882a593Smuzhiyun 	}
2169*4882a593Smuzhiyun 	if (sensor->lanes > 0x02) {
2170*4882a593Smuzhiyun 		ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE2_ENABLE,
2171*4882a593Smuzhiyun 				       sts, (sts & PHY_READY), 200, 2000);
2172*4882a593Smuzhiyun 		if (ret < 0) {
2173*4882a593Smuzhiyun 			dev_err(samsung->dev, "phy rx data lane 2 is not locked\n");
2174*4882a593Smuzhiyun 			return -EINVAL;
2175*4882a593Smuzhiyun 		}
2176*4882a593Smuzhiyun 	}
2177*4882a593Smuzhiyun 
2178*4882a593Smuzhiyun 	if (sensor->lanes > 0x03) {
2179*4882a593Smuzhiyun 		ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE3_ENABLE,
2180*4882a593Smuzhiyun 				       sts, (sts & PHY_READY), 200, 2000);
2181*4882a593Smuzhiyun 		if (ret < 0) {
2182*4882a593Smuzhiyun 			dev_err(samsung->dev, "phy rx data lane 3 is not locked\n");
2183*4882a593Smuzhiyun 			return -EINVAL;
2184*4882a593Smuzhiyun 		}
2185*4882a593Smuzhiyun 	}
2186*4882a593Smuzhiyun 	return 0;
2187*4882a593Smuzhiyun }
2188*4882a593Smuzhiyun 
samsung_dcphy_rx_stream_on(struct csi2_dphy * dphy,struct v4l2_subdev * sd)2189*4882a593Smuzhiyun static int samsung_dcphy_rx_stream_on(struct csi2_dphy *dphy,
2190*4882a593Smuzhiyun 					struct v4l2_subdev *sd)
2191*4882a593Smuzhiyun {
2192*4882a593Smuzhiyun 	struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
2193*4882a593Smuzhiyun 	struct csi2_sensor *sensor;
2194*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
2195*4882a593Smuzhiyun 	int ret = 0;
2196*4882a593Smuzhiyun 
2197*4882a593Smuzhiyun 	if (!sensor_sd)
2198*4882a593Smuzhiyun 		return -ENODEV;
2199*4882a593Smuzhiyun 	sensor = sd_to_sensor(dphy, sensor_sd);
2200*4882a593Smuzhiyun 	if (!sensor)
2201*4882a593Smuzhiyun 		return -ENODEV;
2202*4882a593Smuzhiyun 
2203*4882a593Smuzhiyun 	mutex_lock(&samsung->mutex);
2204*4882a593Smuzhiyun 	if (sensor->mbus.type == V4L2_MBUS_CSI2_CPHY)
2205*4882a593Smuzhiyun 		regmap_write(samsung->grf_regmap, MIPI_DCPHY_GRF_CON0, S_CPHY_MODE);
2206*4882a593Smuzhiyun 
2207*4882a593Smuzhiyun 	if (samsung->s_phy_rst)
2208*4882a593Smuzhiyun 		reset_control_assert(samsung->s_phy_rst);
2209*4882a593Smuzhiyun 
2210*4882a593Smuzhiyun 	samsung_mipi_dcphy_bias_block_enable(samsung, dphy);
2211*4882a593Smuzhiyun 	ret = samsung_dcphy_rx_config_common(dphy, sensor);
2212*4882a593Smuzhiyun 	if (ret)
2213*4882a593Smuzhiyun 		goto out_streamon;
2214*4882a593Smuzhiyun 	samsung_dcphy_rx_config_settle(dphy, sensor);
2215*4882a593Smuzhiyun 
2216*4882a593Smuzhiyun 	ret = samsung_dcphy_rx_lane_enable(dphy, sensor);
2217*4882a593Smuzhiyun 	if (ret)
2218*4882a593Smuzhiyun 		goto out_streamon;
2219*4882a593Smuzhiyun 
2220*4882a593Smuzhiyun 	if (samsung->s_phy_rst)
2221*4882a593Smuzhiyun 		reset_control_deassert(samsung->s_phy_rst);
2222*4882a593Smuzhiyun 
2223*4882a593Smuzhiyun 	atomic_inc(&samsung->stream_cnt);
2224*4882a593Smuzhiyun 	mutex_unlock(&samsung->mutex);
2225*4882a593Smuzhiyun 
2226*4882a593Smuzhiyun 	return 0;
2227*4882a593Smuzhiyun out_streamon:
2228*4882a593Smuzhiyun 	if (samsung->s_phy_rst)
2229*4882a593Smuzhiyun 		reset_control_deassert(samsung->s_phy_rst);
2230*4882a593Smuzhiyun 	mutex_unlock(&samsung->mutex);
2231*4882a593Smuzhiyun 	dev_err(dphy->dev, "stream on error\n");
2232*4882a593Smuzhiyun 	return -EINVAL;
2233*4882a593Smuzhiyun 
2234*4882a593Smuzhiyun }
2235*4882a593Smuzhiyun 
samsung_dcphy_rx_stream_off(struct csi2_dphy * dphy,struct v4l2_subdev * sd)2236*4882a593Smuzhiyun static int samsung_dcphy_rx_stream_off(struct csi2_dphy *dphy,
2237*4882a593Smuzhiyun 					  struct v4l2_subdev *sd)
2238*4882a593Smuzhiyun {
2239*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
2240*4882a593Smuzhiyun 	struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
2241*4882a593Smuzhiyun 	struct csi2_sensor *sensor;
2242*4882a593Smuzhiyun 
2243*4882a593Smuzhiyun 	if (!sensor_sd)
2244*4882a593Smuzhiyun 		return -ENODEV;
2245*4882a593Smuzhiyun 	sensor = sd_to_sensor(dphy, sensor_sd);
2246*4882a593Smuzhiyun 	if (!sensor)
2247*4882a593Smuzhiyun 		return -ENODEV;
2248*4882a593Smuzhiyun 
2249*4882a593Smuzhiyun 	if (atomic_dec_return(&samsung->stream_cnt))
2250*4882a593Smuzhiyun 		return 0;
2251*4882a593Smuzhiyun 
2252*4882a593Smuzhiyun 	mutex_lock(&samsung->mutex);
2253*4882a593Smuzhiyun 	if (samsung->s_phy_rst)
2254*4882a593Smuzhiyun 		reset_control_assert(samsung->s_phy_rst);
2255*4882a593Smuzhiyun 
2256*4882a593Smuzhiyun 	if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY)
2257*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_CLK_LANE_ENABLE, PHY_ENABLE, 0);
2258*4882a593Smuzhiyun 
2259*4882a593Smuzhiyun 	if (sensor->lanes > 0x00)
2260*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE0_ENABLE, PHY_ENABLE, 0);
2261*4882a593Smuzhiyun 	if (sensor->lanes > 0x01)
2262*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE1_ENABLE, PHY_ENABLE, 0);
2263*4882a593Smuzhiyun 	if (sensor->lanes > 0x02)
2264*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE2_ENABLE, PHY_ENABLE, 0);
2265*4882a593Smuzhiyun 	if (sensor->lanes > 0x03)
2266*4882a593Smuzhiyun 		regmap_update_bits(samsung->regmap, RX_DATA_LANE3_ENABLE, PHY_ENABLE, 0);
2267*4882a593Smuzhiyun 
2268*4882a593Smuzhiyun 	if (samsung->s_phy_rst)
2269*4882a593Smuzhiyun 		reset_control_deassert(samsung->s_phy_rst);
2270*4882a593Smuzhiyun 	usleep_range(500, 1000);
2271*4882a593Smuzhiyun 
2272*4882a593Smuzhiyun 	mutex_unlock(&samsung->mutex);
2273*4882a593Smuzhiyun 
2274*4882a593Smuzhiyun 	return 0;
2275*4882a593Smuzhiyun }
2276*4882a593Smuzhiyun 
samsung_mipi_dcphy_init(struct phy * phy)2277*4882a593Smuzhiyun static int samsung_mipi_dcphy_init(struct phy *phy)
2278*4882a593Smuzhiyun {
2279*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
2280*4882a593Smuzhiyun 
2281*4882a593Smuzhiyun 	pm_runtime_get_sync(samsung->dev);
2282*4882a593Smuzhiyun 
2283*4882a593Smuzhiyun 	return 0;
2284*4882a593Smuzhiyun }
2285*4882a593Smuzhiyun 
samsung_mipi_dcphy_exit(struct phy * phy)2286*4882a593Smuzhiyun static int samsung_mipi_dcphy_exit(struct phy *phy)
2287*4882a593Smuzhiyun {
2288*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
2289*4882a593Smuzhiyun 
2290*4882a593Smuzhiyun 	pm_runtime_put(samsung->dev);
2291*4882a593Smuzhiyun 
2292*4882a593Smuzhiyun 	return 0;
2293*4882a593Smuzhiyun }
2294*4882a593Smuzhiyun static const struct phy_ops samsung_mipi_dcphy_ops = {
2295*4882a593Smuzhiyun 	.configure = samsung_mipi_dcphy_configure,
2296*4882a593Smuzhiyun 	.set_mode = samsung_mipi_dcphy_set_mode,
2297*4882a593Smuzhiyun 	.power_on  = samsung_mipi_dcphy_power_on,
2298*4882a593Smuzhiyun 	.power_off = samsung_mipi_dcphy_power_off,
2299*4882a593Smuzhiyun 	.init = samsung_mipi_dcphy_init,
2300*4882a593Smuzhiyun 	.exit = samsung_mipi_dcphy_exit,
2301*4882a593Smuzhiyun 	.owner	   = THIS_MODULE,
2302*4882a593Smuzhiyun };
2303*4882a593Smuzhiyun 
2304*4882a593Smuzhiyun static const struct regmap_config samsung_mipi_dcphy_regmap_config = {
2305*4882a593Smuzhiyun 	.name = "dcphy",
2306*4882a593Smuzhiyun 	.reg_bits = 32,
2307*4882a593Smuzhiyun 	.val_bits = 32,
2308*4882a593Smuzhiyun 	.reg_stride = 4,
2309*4882a593Smuzhiyun 	.max_register = 0x10000,
2310*4882a593Smuzhiyun };
2311*4882a593Smuzhiyun 
samsung_mipi_dcphy_probe(struct platform_device * pdev)2312*4882a593Smuzhiyun static int samsung_mipi_dcphy_probe(struct platform_device *pdev)
2313*4882a593Smuzhiyun {
2314*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
2315*4882a593Smuzhiyun 	struct device_node *np = dev->of_node;
2316*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung;
2317*4882a593Smuzhiyun 	struct phy_provider *phy_provider;
2318*4882a593Smuzhiyun 	struct phy *phy;
2319*4882a593Smuzhiyun 	struct resource *res;
2320*4882a593Smuzhiyun 	void __iomem *regs;
2321*4882a593Smuzhiyun 	int ret;
2322*4882a593Smuzhiyun 
2323*4882a593Smuzhiyun 	samsung = devm_kzalloc(dev, sizeof(*samsung), GFP_KERNEL);
2324*4882a593Smuzhiyun 	if (!samsung)
2325*4882a593Smuzhiyun 		return -ENOMEM;
2326*4882a593Smuzhiyun 
2327*4882a593Smuzhiyun 	samsung->dev = dev;
2328*4882a593Smuzhiyun 	platform_set_drvdata(pdev, samsung);
2329*4882a593Smuzhiyun 
2330*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2331*4882a593Smuzhiyun 	regs = devm_ioremap_resource(dev, res);
2332*4882a593Smuzhiyun 	if (IS_ERR(regs))
2333*4882a593Smuzhiyun 		return PTR_ERR(regs);
2334*4882a593Smuzhiyun 
2335*4882a593Smuzhiyun 	samsung->regmap = devm_regmap_init_mmio(dev, regs,
2336*4882a593Smuzhiyun 						&samsung_mipi_dcphy_regmap_config);
2337*4882a593Smuzhiyun 	if (IS_ERR(samsung->regmap)) {
2338*4882a593Smuzhiyun 		ret = PTR_ERR(samsung->regmap);
2339*4882a593Smuzhiyun 		dev_err(dev, "failed to init regmap: %d\n", ret);
2340*4882a593Smuzhiyun 		return ret;
2341*4882a593Smuzhiyun 	}
2342*4882a593Smuzhiyun 
2343*4882a593Smuzhiyun 	samsung->grf_regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
2344*4882a593Smuzhiyun 	if (IS_ERR(samsung->grf_regmap)) {
2345*4882a593Smuzhiyun 		dev_err(dev, "Unable to get rockchip,grf\n");
2346*4882a593Smuzhiyun 		return PTR_ERR(samsung->grf_regmap);
2347*4882a593Smuzhiyun 	}
2348*4882a593Smuzhiyun 
2349*4882a593Smuzhiyun 	samsung->ref_clk = devm_clk_get(dev, "ref");
2350*4882a593Smuzhiyun 	if (IS_ERR(samsung->ref_clk)) {
2351*4882a593Smuzhiyun 		dev_err(dev, "failed to get reference clock\n");
2352*4882a593Smuzhiyun 		return PTR_ERR(samsung->ref_clk);
2353*4882a593Smuzhiyun 	}
2354*4882a593Smuzhiyun 
2355*4882a593Smuzhiyun 	samsung->pclk = devm_clk_get(dev, "pclk");
2356*4882a593Smuzhiyun 	if (IS_ERR(samsung->pclk)) {
2357*4882a593Smuzhiyun 		dev_err(dev, "failed to get pclk\n");
2358*4882a593Smuzhiyun 		return PTR_ERR(samsung->pclk);
2359*4882a593Smuzhiyun 	}
2360*4882a593Smuzhiyun 
2361*4882a593Smuzhiyun 	samsung->m_phy_rst = devm_reset_control_get(dev, "m_phy");
2362*4882a593Smuzhiyun 	if (IS_ERR(samsung->m_phy_rst)) {
2363*4882a593Smuzhiyun 		dev_err(dev, "failed to get system m_phy_rst control\n");
2364*4882a593Smuzhiyun 		return PTR_ERR(samsung->m_phy_rst);
2365*4882a593Smuzhiyun 	}
2366*4882a593Smuzhiyun 
2367*4882a593Smuzhiyun 	samsung->s_phy_rst = devm_reset_control_get(dev, "s_phy");
2368*4882a593Smuzhiyun 	if (IS_ERR(samsung->s_phy_rst)) {
2369*4882a593Smuzhiyun 		dev_err(dev, "failed to get system s_phy_rst control\n");
2370*4882a593Smuzhiyun 		return PTR_ERR(samsung->s_phy_rst);
2371*4882a593Smuzhiyun 	}
2372*4882a593Smuzhiyun 
2373*4882a593Smuzhiyun 	samsung->apb_rst = devm_reset_control_get(dev, "apb");
2374*4882a593Smuzhiyun 	if (IS_ERR(samsung->apb_rst)) {
2375*4882a593Smuzhiyun 		dev_err(dev, "failed to get system apb_rst control\n");
2376*4882a593Smuzhiyun 		return PTR_ERR(samsung->apb_rst);
2377*4882a593Smuzhiyun 	}
2378*4882a593Smuzhiyun 
2379*4882a593Smuzhiyun 	samsung->grf_apb_rst = devm_reset_control_get(dev, "grf");
2380*4882a593Smuzhiyun 	if (IS_ERR(samsung->grf_apb_rst)) {
2381*4882a593Smuzhiyun 		dev_err(dev, "failed to get system grf_apb_rst control\n");
2382*4882a593Smuzhiyun 		return PTR_ERR(samsung->grf_apb_rst);
2383*4882a593Smuzhiyun 	}
2384*4882a593Smuzhiyun 
2385*4882a593Smuzhiyun 	phy = devm_phy_create(dev, NULL, &samsung_mipi_dcphy_ops);
2386*4882a593Smuzhiyun 	if (IS_ERR(phy)) {
2387*4882a593Smuzhiyun 		dev_err(dev, "failed to create MIPI Dc-PHY\n");
2388*4882a593Smuzhiyun 		return PTR_ERR(phy);
2389*4882a593Smuzhiyun 	}
2390*4882a593Smuzhiyun 
2391*4882a593Smuzhiyun 	phy_set_drvdata(phy, samsung);
2392*4882a593Smuzhiyun 
2393*4882a593Smuzhiyun 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
2394*4882a593Smuzhiyun 	if (IS_ERR(phy_provider)) {
2395*4882a593Smuzhiyun 		dev_err(dev, "failed to register phy provider\n");
2396*4882a593Smuzhiyun 		return PTR_ERR(phy_provider);
2397*4882a593Smuzhiyun 	}
2398*4882a593Smuzhiyun 
2399*4882a593Smuzhiyun 	samsung->stream_on = samsung_dcphy_rx_stream_on;
2400*4882a593Smuzhiyun 	samsung->stream_off = samsung_dcphy_rx_stream_off;
2401*4882a593Smuzhiyun 	mutex_init(&samsung->mutex);
2402*4882a593Smuzhiyun 	pm_runtime_enable(dev);
2403*4882a593Smuzhiyun 
2404*4882a593Smuzhiyun 	return 0;
2405*4882a593Smuzhiyun }
2406*4882a593Smuzhiyun 
samsung_mipi_dcphy_remove(struct platform_device * pdev)2407*4882a593Smuzhiyun static int samsung_mipi_dcphy_remove(struct platform_device *pdev)
2408*4882a593Smuzhiyun {
2409*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = platform_get_drvdata(pdev);
2410*4882a593Smuzhiyun 
2411*4882a593Smuzhiyun 	pm_runtime_disable(samsung->dev);
2412*4882a593Smuzhiyun 	mutex_destroy(&samsung->mutex);
2413*4882a593Smuzhiyun 
2414*4882a593Smuzhiyun 	return 0;
2415*4882a593Smuzhiyun }
2416*4882a593Smuzhiyun 
samsung_mipi_dcphy_runtime_suspend(struct device * dev)2417*4882a593Smuzhiyun static __maybe_unused int samsung_mipi_dcphy_runtime_suspend(struct device *dev)
2418*4882a593Smuzhiyun {
2419*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = dev_get_drvdata(dev);
2420*4882a593Smuzhiyun 
2421*4882a593Smuzhiyun 	clk_disable_unprepare(samsung->pclk);
2422*4882a593Smuzhiyun 	clk_disable_unprepare(samsung->ref_clk);
2423*4882a593Smuzhiyun 
2424*4882a593Smuzhiyun 	return 0;
2425*4882a593Smuzhiyun }
2426*4882a593Smuzhiyun 
samsung_mipi_dcphy_runtime_resume(struct device * dev)2427*4882a593Smuzhiyun static __maybe_unused int samsung_mipi_dcphy_runtime_resume(struct device *dev)
2428*4882a593Smuzhiyun {
2429*4882a593Smuzhiyun 	struct samsung_mipi_dcphy *samsung = dev_get_drvdata(dev);
2430*4882a593Smuzhiyun 
2431*4882a593Smuzhiyun 	clk_prepare_enable(samsung->pclk);
2432*4882a593Smuzhiyun 	clk_prepare_enable(samsung->ref_clk);
2433*4882a593Smuzhiyun 
2434*4882a593Smuzhiyun 	return 0;
2435*4882a593Smuzhiyun }
2436*4882a593Smuzhiyun 
2437*4882a593Smuzhiyun static const struct dev_pm_ops samsung_mipi_dcphy_pm_ops = {
2438*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(samsung_mipi_dcphy_runtime_suspend,
2439*4882a593Smuzhiyun 			   samsung_mipi_dcphy_runtime_resume, NULL)
2440*4882a593Smuzhiyun };
2441*4882a593Smuzhiyun 
2442*4882a593Smuzhiyun static const struct of_device_id samsung_mipi_dcphy_of_match[] = {
2443*4882a593Smuzhiyun 	{
2444*4882a593Smuzhiyun 		.compatible = "rockchip,rk3588-mipi-dcphy",
2445*4882a593Smuzhiyun 	},
2446*4882a593Smuzhiyun 	{}
2447*4882a593Smuzhiyun };
2448*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, samsung_mipi_dcphy_of_match);
2449*4882a593Smuzhiyun 
2450*4882a593Smuzhiyun static struct platform_driver samsung_mipi_dcphy_driver = {
2451*4882a593Smuzhiyun 	.driver = {
2452*4882a593Smuzhiyun 		.name = "samsung-mipi-dcphy",
2453*4882a593Smuzhiyun 		.of_match_table	= of_match_ptr(samsung_mipi_dcphy_of_match),
2454*4882a593Smuzhiyun 		.pm = &samsung_mipi_dcphy_pm_ops,
2455*4882a593Smuzhiyun 	},
2456*4882a593Smuzhiyun 	.probe	= samsung_mipi_dcphy_probe,
2457*4882a593Smuzhiyun 	.remove = samsung_mipi_dcphy_remove,
2458*4882a593Smuzhiyun };
2459*4882a593Smuzhiyun module_platform_driver(samsung_mipi_dcphy_driver);
2460*4882a593Smuzhiyun 
2461*4882a593Smuzhiyun MODULE_AUTHOR("Guochun Huang<hero.huang@rock-chips.com>");
2462*4882a593Smuzhiyun MODULE_DESCRIPTION("Samsung MIPI DCPHY Driver");
2463*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
2464