| /OK3568_Linux_fs/kernel/drivers/clk/zynqmp/ |
| H A D | pll.c | 21 u32 clk_id; member
51 u32 clk_id = clk->clk_id; in zynqmp_pll_get_mode() local
56 ret = zynqmp_pm_get_pll_frac_mode(clk_id, ret_payload); in zynqmp_pll_get_mode()
72 u32 clk_id = clk->clk_id; in zynqmp_pll_set_mode() local
82 ret = zynqmp_pm_set_pll_frac_mode(clk_id, mode); in zynqmp_pll_set_mode()
134 u32 clk_id = clk->clk_id; in zynqmp_pll_recalc_rate() local
141 ret = zynqmp_pm_clock_getdivider(clk_id, &fbdiv); in zynqmp_pll_recalc_rate()
148 zynqmp_pm_get_pll_frac_data(clk_id, ret_payload); in zynqmp_pll_recalc_rate()
171 u32 clk_id = clk->clk_id; in zynqmp_pll_set_rate() local
187 ret = zynqmp_pm_clock_setdivider(clk_id, m); in zynqmp_pll_set_rate()
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| H A D | clk-gate-zynqmp.c | 23 u32 clk_id; member
38 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_enable() local
41 ret = zynqmp_pm_clock_enable(clk_id); in zynqmp_clk_gate_enable()
58 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_disable() local
61 ret = zynqmp_pm_clock_disable(clk_id); in zynqmp_clk_gate_disable()
78 u32 clk_id = gate->clk_id; in zynqmp_clk_gate_is_enabled() local
81 ret = zynqmp_pm_clock_getstate(clk_id, &state); in zynqmp_clk_gate_is_enabled()
107 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id, in zynqmp_clk_register_gate() argument
131 gate->clk_id = clk_id; in zynqmp_clk_register_gate()
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| H A D | clkc.c | 78 u32 clk_id; member
121 static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id,
145 static inline int zynqmp_is_valid_clock(u32 clk_id) in zynqmp_is_valid_clock() argument
147 if (clk_id >= clock_max_idx) in zynqmp_is_valid_clock()
150 return clock[clk_id].valid; in zynqmp_is_valid_clock()
160 static int zynqmp_get_clock_name(u32 clk_id, char *clk_name) in zynqmp_get_clock_name() argument
164 ret = zynqmp_is_valid_clock(clk_id); in zynqmp_get_clock_name()
166 strncpy(clk_name, clock[clk_id].clk_name, MAX_NAME_LEN); in zynqmp_get_clock_name()
180 static int zynqmp_get_clock_type(u32 clk_id, u32 *type) in zynqmp_get_clock_type() argument
184 ret = zynqmp_is_valid_clock(clk_id); in zynqmp_get_clock_type()
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| H A D | clk-mux-zynqmp.c | 32 u32 clk_id; member
47 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_get_parent() local
51 ret = zynqmp_pm_clock_getparent(clk_id, &val); in zynqmp_clk_mux_get_parent()
71 u32 clk_id = mux->clk_id; in zynqmp_clk_mux_set_parent() local
74 ret = zynqmp_pm_clock_setparent(clk_id, index); in zynqmp_clk_mux_set_parent()
104 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, in zynqmp_clk_register_mux() argument
128 mux->clk_id = clk_id; in zynqmp_clk_register_mux()
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| H A D | divider.c | 43 u32 clk_id; member
83 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_recalc_rate() local
88 ret = zynqmp_pm_clock_getdivider(clk_id, &div); in zynqmp_clk_divider_recalc_rate()
169 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_round_rate() local
176 ret = zynqmp_pm_clock_getdivider(clk_id, &bestdiv); in zynqmp_clk_divider_round_rate()
226 u32 clk_id = divider->clk_id; in zynqmp_clk_divider_set_rate() local
243 ret = zynqmp_pm_clock_setdivider(clk_id, div); in zynqmp_clk_divider_set_rate()
266 static u32 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) in zynqmp_clk_get_max_divisor() argument
273 qdata.arg1 = clk_id; in zynqmp_clk_get_max_divisor()
297 u32 clk_id, in zynqmp_clk_register_divider() argument
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| H A D | clk-zynqmp.h | 36 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
41 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
47 u32 clk_id,
52 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
58 u32 clk_id,
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| /OK3568_Linux_fs/kernel/drivers/clk/keystone/ |
| H A D | sci-clk.c | 63 u32 clk_id; member
88 clk->clk_id, enable_ssc, in sci_clk_prepare()
105 clk->clk_id); in sci_clk_unprepare()
109 clk->dev_id, clk->clk_id, ret); in sci_clk_unprepare()
126 clk->clk_id, &req_state, in sci_clk_is_prepared()
131 clk->dev_id, clk->clk_id, ret); in sci_clk_is_prepared()
154 clk->clk_id, &freq); in sci_clk_recalc_rate()
158 clk->dev_id, clk->clk_id, ret); in sci_clk_recalc_rate()
189 clk->clk_id, in sci_clk_determine_rate()
197 clk->dev_id, clk->clk_id, ret); in sci_clk_determine_rate()
[all …]
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| /OK3568_Linux_fs/kernel/drivers/soc/mediatek/ |
| H A D | mtk-scpsys.c | 81 enum clk_id { enum
129 enum clk_id clk_id[MAX_CLKS]; member
496 for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { in init_scp()
497 struct clk *c = clk[data->clk_id[j]]; in init_scp()
564 .clk_id = {CLK_NONE},
572 .clk_id = {CLK_MM},
582 .clk_id = {CLK_MFG},
591 .clk_id = {CLK_MM},
600 .clk_id = {CLK_MM},
608 .clk_id = {CLK_NONE},
[all …]
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| /OK3568_Linux_fs/kernel/tools/testing/selftests/timens/ |
| H A D | timens.h | 64 static inline int _settime(clockid_t clk_id, time_t offset) in _settime() argument
69 if (clk_id == CLOCK_MONOTONIC_COARSE || clk_id == CLOCK_MONOTONIC_RAW) in _settime()
70 clk_id = CLOCK_MONOTONIC; in _settime()
72 len = snprintf(buf, sizeof(buf), "%d %ld 0", clk_id, offset); in _settime()
86 static inline int _gettime(clockid_t clk_id, struct timespec *res, bool raw_syscall) in _gettime() argument
91 if (clock_gettime(clk_id, res)) { in _gettime()
92 pr_perror("clock_gettime(%d)", (int)clk_id); in _gettime()
98 err = syscall(SYS_clock_gettime, clk_id, res); in _gettime()
100 pr_perror("syscall(SYS_clock_gettime(%d))", (int)clk_id); in _gettime()
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| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3562.c | 200 static ulong rk3562_bus_get_rate(struct rk3562_clk_priv *priv, ulong clk_id) in rk3562_bus_get_rate() argument
206 switch (clk_id) { in rk3562_bus_get_rate()
234 static ulong rk3562_bus_set_rate(struct rk3562_clk_priv *priv, ulong clk_id, in rk3562_bus_set_rate() argument
248 switch (clk_id) { in rk3562_bus_set_rate()
271 return rk3562_bus_get_rate(priv, clk_id); in rk3562_bus_set_rate()
274 static ulong rk3562_peri_get_rate(struct rk3562_clk_priv *priv, ulong clk_id) in rk3562_peri_get_rate() argument
280 switch (clk_id) { in rk3562_peri_get_rate()
308 static ulong rk3562_peri_set_rate(struct rk3562_clk_priv *priv, ulong clk_id, in rk3562_peri_set_rate() argument
322 switch (clk_id) { in rk3562_peri_set_rate()
345 return rk3562_peri_get_rate(priv, clk_id); in rk3562_peri_set_rate()
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| H A D | clk_rk1808.c | 95 static ulong rk1808_i2c_get_clk(struct rk1808_clk_priv *priv, ulong clk_id) in rk1808_i2c_get_clk() argument
100 switch (clk_id) { in rk1808_i2c_get_clk()
134 ulong clk_id, uint hz) in rk1808_i2c_set_clk() argument
142 switch (clk_id) { in rk1808_i2c_set_clk()
184 return rk1808_i2c_get_clk(priv, clk_id); in rk1808_i2c_set_clk()
188 static ulong rk1808_mmc_get_clk(struct rk1808_clk_priv *priv, uint clk_id) in rk1808_mmc_get_clk() argument
193 switch (clk_id) { in rk1808_mmc_get_clk()
222 ulong clk_id, ulong set_rate) in rk1808_mmc_set_clk() argument
228 switch (clk_id) { in rk1808_mmc_set_clk()
265 return rk1808_mmc_get_clk(priv, clk_id); in rk1808_mmc_set_clk()
[all …]
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| H A D | clk_rv1106.c | 76 static ulong rv1106_peri_get_clk(struct rv1106_clk_priv *priv, ulong clk_id) in rv1106_peri_get_clk() argument
81 switch (clk_id) { in rv1106_peri_get_clk()
164 ulong clk_id, ulong rate) in rv1106_peri_set_clk() argument
169 switch (clk_id) { in rv1106_peri_set_clk()
256 return rv1106_peri_get_clk(priv, clk_id); in rv1106_peri_set_clk()
259 static ulong rv1106_i2c_get_clk(struct rv1106_clk_priv *priv, ulong clk_id) in rv1106_i2c_get_clk() argument
265 switch (clk_id) { in rv1106_i2c_get_clk()
311 static ulong rv1106_crypto_get_clk(struct rv1106_clk_priv *priv, ulong clk_id) in rv1106_crypto_get_clk() argument
316 switch (clk_id) { in rv1106_crypto_get_clk()
345 ulong clk_id, ulong rate) in rv1106_crypto_set_clk() argument
[all …]
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| H A D | clk_rk3588.c | 150 static ulong rk3588_center_get_clk(struct rk3588_clk_priv *priv, ulong clk_id) in rk3588_center_get_clk() argument
155 switch (clk_id) { in rk3588_center_get_clk()
216 ulong clk_id, ulong rate) in rk3588_center_set_clk() argument
221 switch (clk_id) { in rk3588_center_set_clk()
279 return rk3588_center_get_clk(priv, clk_id); in rk3588_center_set_clk()
282 static ulong rk3588_top_get_clk(struct rk3588_clk_priv *priv, ulong clk_id) in rk3588_top_get_clk() argument
287 switch (clk_id) { in rk3588_top_get_clk()
328 ulong clk_id, ulong rate) in rk3588_top_set_clk() argument
333 switch (clk_id) { in rk3588_top_set_clk()
376 return rk3588_top_get_clk(priv, clk_id); in rk3588_top_set_clk()
[all …]
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| H A D | clk_px30.c | 297 static ulong px30_i2c_get_clk(struct px30_clk_priv *priv, ulong clk_id) in px30_i2c_get_clk() argument
302 switch (clk_id) { in px30_i2c_get_clk()
327 static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_i2c_set_clk() argument
335 switch (clk_id) { in px30_i2c_set_clk()
369 return px30_i2c_get_clk(priv, clk_id); in px30_i2c_set_clk()
426 static ulong px30_i2s_get_clk(struct px30_clk_priv *priv, ulong clk_id) in px30_i2s_get_clk() argument
433 switch (clk_id) { in px30_i2s_get_clk()
453 static ulong px30_i2s_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_i2s_set_clk() argument
464 switch (clk_id) { in px30_i2s_set_clk()
483 return px30_i2s_get_clk(priv, clk_id); in px30_i2s_set_clk()
[all …]
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| H A D | clk_rk3568.c | 245 ulong clk_id) in rk3568_i2c_get_pmuclk() argument
250 switch (clk_id) { in rk3568_i2c_get_pmuclk()
263 ulong clk_id, ulong rate) in rk3568_i2c_set_pmuclk() argument
271 switch (clk_id) { in rk3568_i2c_set_pmuclk()
280 return rk3568_i2c_get_pmuclk(priv, clk_id); in rk3568_i2c_set_pmuclk()
284 ulong clk_id) in rk3568_pwm_get_pmuclk() argument
289 switch (clk_id) { in rk3568_pwm_get_pmuclk()
307 ulong clk_id, ulong rate) in rk3568_pwm_set_pmuclk() argument
312 switch (clk_id) { in rk3568_pwm_set_pmuclk()
333 return rk3568_pwm_get_pmuclk(priv, clk_id); in rk3568_pwm_set_pmuclk()
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| H A D | clk_rk3528.c | 237 ulong clk_id) in rk3528_ppll_matrix_get_rate() argument
243 switch (clk_id) { in rk3528_ppll_matrix_get_rate()
279 ulong clk_id, ulong rate) in rk3528_ppll_matrix_set_rate() argument
285 switch (clk_id) { in rk3528_ppll_matrix_set_rate()
320 return rk3528_ppll_matrix_get_rate(priv, clk_id); in rk3528_ppll_matrix_set_rate()
324 ulong clk_id) in rk3528_cgpll_matrix_get_rate() argument
333 switch (clk_id) { in rk3528_cgpll_matrix_get_rate()
432 ulong clk_id, ulong rate) in rk3528_cgpll_matrix_set_rate() argument
441 switch (clk_id) { in rk3528_cgpll_matrix_set_rate()
545 return rk3528_cgpll_matrix_get_rate(priv, clk_id); in rk3528_cgpll_matrix_set_rate()
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| H A D | clk_rk3328.c | 167 static ulong rk3328_i2c_get_clk(struct rk3328_clk_priv *priv, ulong clk_id) in rk3328_i2c_get_clk() argument
172 switch (clk_id) { in rk3328_i2c_get_clk()
198 ulong clk_id, uint hz) in rk3328_i2c_set_clk() argument
206 switch (clk_id) { in rk3328_i2c_set_clk()
316 static ulong rk3328_mmc_get_clk(struct rk3328_clk_priv *priv, uint clk_id) in rk3328_mmc_get_clk() argument
321 switch (clk_id) { in rk3328_mmc_get_clk()
345 ulong clk_id, ulong set_rate) in rk3328_mmc_set_clk() argument
351 switch (clk_id) { in rk3328_mmc_set_clk()
381 return rk3328_mmc_get_clk(priv, clk_id); in rk3328_mmc_set_clk()
492 static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id) in rk3328_vop_get_clk() argument
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| H A D | clk_rk3368.c | 293 static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id) in rk3368_mmc_get_clk() argument
298 switch (clk_id) { in rk3368_mmc_get_clk()
389 ulong clk_id = clk->id; in rk3368_mmc_set_clk() local
395 switch (clk_id) { in rk3368_mmc_set_clk()
413 return rk3368_mmc_get_clk(cru, clk_id); in rk3368_mmc_set_clk()
514 static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id) in rk3368_spi_get_clk() argument
519 switch (clk_id) { in rk3368_spi_get_clk()
521 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3368_spi_get_clk()
525 pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); in rk3368_spi_get_clk()
536 static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz) in rk3368_spi_set_clk() argument
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| H A D | clk_rk3399.c | 584 static ulong rk3399_i2c_get_clk(struct rk3399_cru *cru, ulong clk_id) in rk3399_i2c_get_clk() argument
588 switch (clk_id) { in rk3399_i2c_get_clk()
621 static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_i2c_set_clk() argument
629 switch (clk_id) { in rk3399_i2c_set_clk()
659 return rk3399_i2c_get_clk(cru, clk_id); in rk3399_i2c_set_clk()
698 static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) in rk3399_spi_get_clk() argument
703 switch (clk_id) { in rk3399_spi_get_clk()
705 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3399_spi_get_clk()
709 pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); in rk3399_spi_get_clk()
720 static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_spi_set_clk() argument
[all …]
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| /OK3568_Linux_fs/kernel/drivers/firmware/arm_scmi/ |
| H A D | clock.c | 104 u32 clk_id, struct scmi_clock_info *clk) in scmi_clock_attributes_get() argument
111 sizeof(clk_id), sizeof(*attr), &t); in scmi_clock_attributes_get()
115 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_attributes_get()
141 scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id, in scmi_clock_describe_rates_get() argument
162 clk_desc->id = cpu_to_le32(clk_id); in scmi_clock_describe_rates_get()
220 u32 clk_id, u64 *value) in scmi_clock_rate_get() argument
230 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_rate_get()
241 u32 clk_id, u64 rate) in scmi_clock_rate_set() argument
259 cfg->id = cpu_to_le32(clk_id); in scmi_clock_rate_set()
276 scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id, in scmi_clock_config_set() argument
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| /OK3568_Linux_fs/kernel/sound/soc/ti/ |
| H A D | omap-dmic.c | 279 static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id, in omap_dmic_select_fclk() argument
298 if (dmic->sysclk == clk_id) { in omap_dmic_select_fclk()
309 switch (clk_id) { in omap_dmic_select_fclk()
320 dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id); in omap_dmic_select_fclk()
353 dmic->sysclk = clk_id; in omap_dmic_select_fclk()
363 static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id, in omap_dmic_select_outclk() argument
368 if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) { in omap_dmic_select_outclk()
370 clk_id); in omap_dmic_select_outclk()
390 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, in omap_dmic_set_dai_sysclk() argument
396 return omap_dmic_select_fclk(dmic, clk_id, freq); in omap_dmic_set_dai_sysclk()
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| /OK3568_Linux_fs/kernel/drivers/firmware/ |
| H A D | ti_sci.c | 940 u32 dev_id, u32 clk_id, in ti_sci_set_clock_state() argument
968 if (clk_id < 255) { in ti_sci_set_clock_state()
969 req->clk_id = clk_id; in ti_sci_set_clock_state()
971 req->clk_id = 255; in ti_sci_set_clock_state()
972 req->clk_id_32 = clk_id; in ti_sci_set_clock_state()
1005 u32 dev_id, u32 clk_id, in ti_sci_cmd_get_clock_state() argument
1036 if (clk_id < 255) { in ti_sci_cmd_get_clock_state()
1037 req->clk_id = clk_id; in ti_sci_cmd_get_clock_state()
1039 req->clk_id = 255; in ti_sci_cmd_get_clock_state()
1040 req->clk_id_32 = clk_id; in ti_sci_cmd_get_clock_state()
[all …]
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| /OK3568_Linux_fs/kernel/sound/soc/codecs/ |
| H A D | adav80x.c | 537 int clk_id, int source, in adav80x_set_sysclk() argument
544 switch (clk_id) { in adav80x_set_sysclk()
557 if (adav80x->clk_src != clk_id) { in adav80x_set_sysclk()
560 adav80x->clk_src = clk_id; in adav80x_set_sysclk()
561 if (clk_id == ADAV80X_CLK_XTAL) in adav80x_set_sysclk()
562 clk_id = ADAV80X_CLK_XIN; in adav80x_set_sysclk()
564 iclk_ctrl1 = ADAV80X_ICLK_CTRL1_DAC_SRC(clk_id) | in adav80x_set_sysclk()
565 ADAV80X_ICLK_CTRL1_ADC_SRC(clk_id) | in adav80x_set_sysclk()
566 ADAV80X_ICLK_CTRL1_ICLK2_SRC(clk_id); in adav80x_set_sysclk()
567 iclk_ctrl2 = ADAV80X_ICLK_CTRL2_ICLK1_SRC(clk_id); in adav80x_set_sysclk()
[all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/tegra/ |
| H A D | clk-tegra-audio.c | 35 int clk_id; member
41 .clk_id = tegra_clk_ ## _name,\
66 int clk_id; member
77 .clk_id = tegra_clk_ ## _name ## _2x,\
181 dt_clk = tegra_lookup_dt_id(info->clk_id, tegra_clks); in tegra_audio_clk_init()
207 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()
231 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); in tegra_audio_clk_init()
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| /OK3568_Linux_fs/kernel/drivers/clk/baikal-t1/ |
| H A D | clk-ccu-pll.c | 82 unsigned int clk_id) in ccu_pll_find_desc() argument
89 if (pll && pll->id == clk_id) in ccu_pll_find_desc()
131 unsigned int clk_id; in ccu_pll_of_clk_hw_get() local
133 clk_id = clkspec->args[0]; in ccu_pll_of_clk_hw_get()
134 pll = ccu_pll_find_desc(data, clk_id); in ccu_pll_of_clk_hw_get()
136 pr_info("Invalid PLL clock ID %d specified\n", clk_id); in ccu_pll_of_clk_hw_get()
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