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Searched refs:IPU_CHA_BUF0_RDY (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/dma/ipu/
H A Dipu_intern.h18 #define IPU_CHA_BUF0_RDY 0x04 macro
H A Dipu_idmac.c81 idmac_read_ipureg(ipu, IPU_CHA_BUF0_RDY), in dump_idmac_reg()
715 idmac_write_ipureg(&ipu_data, 1UL << channel, IPU_CHA_BUF0_RDY); in ipu_select_buffer()
739 reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY); in ipu_update_channel_buffer()
1092 idmac_read_ipureg(ipu, IPU_CHA_BUF0_RDY), in ipu_disable_channel()
1172 ready0 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF0_RDY); in idmac_interrupt()
/OK3568_Linux_fs/u-boot/drivers/video/
H A Dmx3fb.c102 #define IPU_CHA_BUF0_RDY (0x04 + IPU_BASE) macro
612 reg = readl(IPU_CHA_BUF0_RDY); in ipu_update_channel_buffer()
637 writel(1UL << channel, IPU_CHA_BUF0_RDY); in idmac_tx_submit()
H A Dipu_regs.h318 #define IPU_CHA_BUF0_RDY(ch) (&IPU_STAT->ch_buf0_rdy[ch / 32]) macro
H A Dipu_common.c1104 if (idma_is_set(IPU_CHA_BUF0_RDY, dma_ch)) { in ipu_clear_buffer_ready()
1106 IPU_CHA_BUF0_RDY(dma_ch)); in ipu_clear_buffer_ready()
/OK3568_Linux_fs/kernel/drivers/gpu/ipu-v3/
H A Dipu-common.c440 reg = ipu_cm_read(ipu, IPU_CHA_BUF0_RDY(channel->num)); in ipu_idmac_buffer_is_ready()
465 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno)); in ipu_idmac_select_buffer()
484 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno)); in ipu_idmac_clear_buffer()
560 if (ipu_cm_read(ipu, IPU_CHA_BUF0_RDY(channel->num)) & in ipu_idmac_disable_channel()
563 IPU_CHA_BUF0_RDY(channel->num)); in ipu_idmac_disable_channel()
H A Dipu-prv.h60 #define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32)) macro