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Searched refs:HPLL (Results 1 – 12 of 12) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dclk.h15 #define HPLL 3 macro
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclk.h14 #define HPLL 3 macro
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3562.c51 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3562_PLL_CON(40),
1376 rate = rockchip_pll_get_rate(&rk3562_pll_clks[HPLL], priv->cru, in rk3562_clk_get_rate()
1377 HPLL); in rk3562_clk_get_rate()
1506 ret = rockchip_pll_set_rate(&rk3562_pll_clks[HPLL], priv->cru, in rk3562_clk_set_rate()
1507 HPLL, rate); in rk3562_clk_set_rate()
1508 priv->hpll_hz = rockchip_pll_get_rate(&rk3562_pll_clks[HPLL], in rk3562_clk_set_rate()
1509 priv->cru, HPLL); in rk3562_clk_set_rate()
1834 ret = rockchip_pll_set_rate(&rk3562_pll_clks[HPLL], priv->cru, in rk3562_clk_init()
1835 HPLL, HPLL_HZ); in rk3562_clk_init()
H A Dclk_rk3568.c82 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PMU_PLL_CON(16),
386 rate = rockchip_pll_get_rate(&rk3568_pll_clks[HPLL], in rk3568_pmuclk_get_rate()
387 priv->pmucru, HPLL); in rk3568_pmuclk_get_rate()
428 ret = rockchip_pll_set_rate(&rk3568_pll_clks[HPLL], in rk3568_pmuclk_set_rate()
429 priv->pmucru, HPLL, rate); in rk3568_pmuclk_set_rate()
430 priv->hpll_hz = rockchip_pll_get_rate(&rk3568_pll_clks[HPLL], in rk3568_pmuclk_set_rate()
431 priv->pmucru, HPLL); in rk3568_pmuclk_set_rate()
1797 parent = rk3568_pmu_pll_get_rate(priv, HPLL); in rk3568_dclk_vop_get_clk()
1843 rk3568_pmu_pll_set_rate(priv, HPLL, div * rate); in rk3568_dclk_vop_set_clk()
1909 return rk3568_pmu_pll_get_rate(priv, HPLL); in rk3568_gmac_src_get_clk()
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H A Dclk_rv1126.c66 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RV1126_PLL_CON(24),
1633 rate = rockchip_pll_get_rate(&rv1126_pll_clks[HPLL], priv->cru, in rv1126_clk_get_rate()
1634 HPLL); in rv1126_clk_get_rate()
1755 ret = rockchip_pll_set_rate(&rv1126_pll_clks[HPLL], priv->cru, in rv1126_clk_set_rate()
1756 HPLL, rate); in rv1126_clk_set_rate()
2153 ret = rockchip_pll_set_rate(&rv1126_pll_clks[HPLL], priv->cru, in rv1126_clk_init()
2154 HPLL, HPLL_HZ); in rv1126_clk_init()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dqcom,hfpll.txt19 Definition: address and size of HPLL registers. An optional second
/OK3568_Linux_fs/u-boot/board/samsung/smdkc100/
H A Dlowlevel_init.S105 ldr r1, =0x1111 @ A, M, E, HPLL Muxing
/OK3568_Linux_fs/u-boot/arch/arm/mach-s5pc1xx/
H A Dclock.c43 case HPLL: in s5pc100_get_pll_clk()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rv1126.h51 HPLL, enumerator
H A Dcru_rk3562.h27 HPLL, enumerator
H A Dcru_rk3568.h28 HPLL, enumerator
/OK3568_Linux_fs/u-boot/board/samsung/goni/
H A Dlowlevel_init.S285 ldr r1, =0x00001111 @ A, M, E, HPLL Muxing