1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2009 Samsung Electronics 3*4882a593Smuzhiyun * Minkyu Kang <mk7.kang@samsung.com> 4*4882a593Smuzhiyun * Heungjun Kim <riverful.kim@samsung.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __ASM_ARM_ARCH_CLK_H_ 10*4882a593Smuzhiyun #define __ASM_ARM_ARCH_CLK_H_ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define APLL 0 13*4882a593Smuzhiyun #define MPLL 1 14*4882a593Smuzhiyun #define EPLL 2 15*4882a593Smuzhiyun #define HPLL 3 16*4882a593Smuzhiyun #define VPLL 4 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun unsigned long get_pll_clk(int pllreg); 19*4882a593Smuzhiyun unsigned long get_arm_clk(void); 20*4882a593Smuzhiyun unsigned long get_pwm_clk(void); 21*4882a593Smuzhiyun unsigned long get_uart_clk(int dev_index); 22*4882a593Smuzhiyun void set_mmc_clk(int dev_index, unsigned int div); 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #endif 25