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/rk3399_ARM-atf/plat/intel/soc/stratix10/soc/
H A Ds10_pinmux.c9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
H A Ds10_memory_controller.c9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
H A Ds10_clock_manager.c9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Ds10_pinmux.h9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
H A Ds10_memory_controller.h9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
H A Ds10_system_manager.h9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
H A Ds10_clock_manager.h9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
/rk3399_ARM-atf/plat/intel/soc/stratix10/
H A Dbl2_plat_setup.c9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
H A Dplatform.mk9d82ef26c657fda9ee21806817c7a16547b0b605 Mon Feb 04 08:17:24 UTC 2019 Loh Tien Hock <tien.hock.loh@intel.com> plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>