Searched +full:sun4i +full:- +full:a10 +full:- +full:axi +full:- +full:clk (Results 1 – 14 of 14) sorted by relevance
2 * Copyright 2012-2015 Maxime Ripard4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms47 #include <dt-bindings/clock/sun4i-a10-pll2.h>48 #include <dt-bindings/dma/sun4i-a10.h>49 #include <dt-bindings/pinctrl/sun4i-a10.h>52 interrupt-parent = <&intc>;55 #address-cells = <1>;56 #size-cells = <0>;60 compatible = "arm,cortex-a8";[all …]
4 * Mylène Josserand <mylene.josserand@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/clock/sun4i-a10-pll2.h>46 #include <dt-bindings/dma/sun4i-a10.h>47 #include <dt-bindings/pinctrl/sun4i-a10.h>50 interrupt-parent = <&intc>;51 #address-cells = <1>;52 #size-cells = <1>;55 #address-cells = <1>;56 #size-cells = <0>;[all …]
5 * This file is dual-licensed: you can use it either under the terms46 #include <dt-bindings/thermal/thermal.h>48 #include <dt-bindings/clock/sun4i-a10-pll2.h>49 #include <dt-bindings/dma/sun4i-a10.h>50 #include <dt-bindings/pinctrl/sun4i-a10.h>53 interrupt-parent = <&intc>;60 #address-cells = <1>;61 #size-cells = <1>;65 compatible = "allwinner,simple-framebuffer",66 "simple-framebuffer";[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms47 #include <dt-bindings/interrupt-controller/arm-gic.h>48 #include <dt-bindings/thermal/thermal.h>50 #include <dt-bindings/clock/sun4i-a10-pll2.h>51 #include <dt-bindings/dma/sun4i-a10.h>52 #include <dt-bindings/pinctrl/sun4i-a10.h>55 interrupt-parent = <&gic>;62 #address-cells = <1>;63 #size-cells = <1>;[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms47 #include <dt-bindings/interrupt-controller/arm-gic.h>48 #include <dt-bindings/thermal/thermal.h>50 #include <dt-bindings/pinctrl/sun4i-a10.h>53 interrupt-parent = <&gic>;60 #address-cells = <1>;61 #size-cells = <1>;65 compatible = "allwinner,simple-framebuffer",66 "simple-framebuffer";[all …]
2 * Copyright 2014 Chen-Yu Tsai4 * Chen-Yu Tsai <wens@csie.org>6 * This file is dual-licensed: you can use it either under the terms47 #include <dt-bindings/interrupt-controller/arm-gic.h>49 #include <dt-bindings/pinctrl/sun4i-a10.h>52 interrupt-parent = <&gic>;55 #address-cells = <1>;56 #size-cells = <1>;60 compatible = "allwinner,simple-framebuffer",61 "simple-framebuffer";[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A10 Bus Gates Clock Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 "#clock-cells":24 - const: allwinner,sun4i-a10-gates-clk25 - const: allwinner,sun4i-a10-axi-gates-clk[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-axi-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A10 AXI Clock Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 "#clock-cells":21 - allwinner,sun4i-a10-axi-clk22 - allwinner,sun8i-a23-axi-clk[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A10 AHB Clock Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 "#clock-cells":21 - allwinner,sun4i-a10-ahb-clk22 - allwinner,sun6i-a31-ahb1-clk[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later5 * Maxime Ripard <maxime.ripard@free-electrons.com>8 #include <linux/clk.h>9 #include <linux/clk-provider.h>43 number = of_property_count_u32_elems(node, "clock-indices"); in sunxi_simple_gates_setup()44 of_property_read_u32_index(node, "clock-indices", number - 1, &number); in sunxi_simple_gates_setup()46 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); in sunxi_simple_gates_setup()47 if (!clk_data->clks) in sunxi_simple_gates_setup()50 of_property_for_each_u32(node, "clock-indices", prop, p, index) { in sunxi_simple_gates_setup()51 of_property_read_string_index(node, "clock-output-names", in sunxi_simple_gates_setup()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later8 #include <linux/clk.h>9 #include <linux/clk-provider.h>14 #include <linux/reset-controller.h>19 #include "clk-factors.h"27 * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL138 div = req->rate / 6000000; in sun4i_get_pll1_factors()39 req->rate = 6000000 * div; in sun4i_get_pll1_factors()42 req->m = 0; in sun4i_get_pll1_factors()45 if (req->rate >= 768000000 || req->rate == 42000000 || in sun4i_get_pll1_factors()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only8 #include <linux/clk-provider.h>26 #include "ccu-sun4i-a10.h"36 .hw.init = CLK_HW_INIT("pll-core",48 * With sigma-delta modulation for fractional-N on the audio PLL,71 .hw.init = CLK_HW_INIT("pll-audio-base",89 .hw.init = CLK_HW_INIT("pll-video0",104 .hw.init = CLK_HW_INIT("pll-ve",117 .hw.init = CLK_HW_INIT("pll-ve",130 .hw.init = CLK_HW_INIT("pll-ddr-base",[all …]
... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]