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/rk3399_rockchip-uboot/arch/arm/dts/
H A Dsocfpga.dtsi135 compatible = "altr,socfpga-pll-clock";
141 compatible = "altr,socfpga-perip-clk";
149 compatible = "altr,socfpga-perip-clk";
157 compatible = "altr,socfpga-perip-clk";
165 compatible = "altr,socfpga-perip-clk";
172 compatible = "altr,socfpga-perip-clk";
179 compatible = "altr,socfpga-perip-clk";
189 compatible = "altr,socfpga-pll-clock";
195 compatible = "altr,socfpga-perip-clk";
202 compatible = "altr,socfpga-perip-clk";
[all …]
H A Dsocfpga_arria10.dtsi138 compatible = "altr,socfpga-a10-pll-clock";
145 compatible = "altr,socfpga-a10-perip-clk";
152 compatible = "altr,socfpga-a10-perip-clk";
159 compatible = "altr,socfpga-a10-perip-clk";
166 compatible = "altr,socfpga-a10-perip-clk";
173 compatible = "altr,socfpga-a10-perip-clk";
180 compatible = "altr,socfpga-a10-perip-clk";
187 compatible = "altr,socfpga-a10-perip-clk";
194 compatible = "altr,socfpga-a10-perip-clk";
201 compatible = "altr,socfpga-a10-perip-clk";
[all …]
H A Dsocfpga_cyclone5_sr1500.dts10 model = "SoCFPGA Cyclone V SR1500";
11 compatible = "anonymous,socfpga-sr1500", "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_is1.dts10 model = "SoCFPGA Cyclone V IS1";
11 compatible = "anonymous,socfpga-is1", "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi18 model = "Altera SOCFPGA Arria 10";
19 compatible = "altr,socfpga-arria10", "altr,socfpga";
389 compatible = "altr,socfpga-a10-noc";
452 compatible = "altr,socfpga-hps2fpga-bridge";
457 compatible = "altr,socfpga-lwhps2fpga-bridge";
462 compatible = "altr,socfpga-fpga2hps-bridge";
467 compatible = "altr,socfpga-fpga2sdram0-bridge";
472 compatible = "altr,socfpga-fpga2sdram1-bridge";
477 compatible = "altr,socfpga-fpga2sdram2-bridge";
H A Dsocfpga_arria5_socdk.dts10 model = "Altera SOCFPGA Arria V SoC Development Kit";
11 compatible = "altr,socfpga-arria5", "altr,socfpga";
H A Dsocfpga_cyclone5_socdk.dts10 model = "Altera SOCFPGA Cyclone V SoC Development Kit";
11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_mcvevk.dts11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_de0_nano_soc.dts11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_de10_nano.dts13 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_de1_soc.dts11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_socrates.dts11 compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_sockit.dts11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
H A Dsocfpga_cyclone5_vining_fpga.dts11 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/
H A DKconfig53 prompt "Altera SOCFPGA board select"
57 bool "Altera SOCFPGA SoCDK (Arria 10)"
61 bool "Altera SOCFPGA SoCDK (Arria V)"
65 bool "Altera SOCFPGA SoCDK (Cyclone V)"
134 default "socfpga"
H A Dfpga_manager.c5 * This file contains only support functions used also by the SoCFPGA
6 * platform code, the real meat is located in drivers/fpga/socfpga.c .
H A Dreset_manager_gen5.c21 /* Assert or de-assert SoCFPGA reset manager reset. */
78 /* For SoCFPGA-VT, this is NOP. */ in socfpga_bridges_reset()
H A Dqts-filter.sh27 * Altera SoCFPGA IOCSR configuration
71 * Altera SoCFPGA PinMux configuration
108 * Altera SoCFPGA Clock and PLL configuration
152 * Altera SoCFPGA SDRAM configuration
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/include/mach/
H A Dboot0.h2 * Specialty padding for the Altera SoCFPGA preloader image
16 .word 0x1337c0d3; /* SoCFPGA preloader validation word */
21 b reset; /* SoCFPGA jumps here */
/rk3399_rockchip-uboot/drivers/ddr/altera/
H A DKconfig2 bool "SoCFPGA DDR SDRAM driver"
5 Enable DDR SDRAM controller for the SoCFPGA devices.
/rk3399_rockchip-uboot/doc/
H A DREADME.socfpga2 SOCFPGA Documentation for U-Boot and SPL
6 based SOCFPGA. To know more about the hardware itself, please refer to
14 controller support within SOCFPGA
111 $ ./arch/arm/mach-socfpga/qts-filter.sh \
/rk3399_rockchip-uboot/drivers/mmc/
H A Dsocfpga_dw_mmc.c30 /* socfpga implmentation specific driver private data */
88 * We only have one dwmmc block on gen5 SoCFPGA. in socfpga_dwmmc_ofdata_to_platdata()
145 { .compatible = "altr,socfpga-dw-mshc" },
/rk3399_rockchip-uboot/board/terasic/de0-nano-soc/
H A DMAINTAINERS1 SOCFPGA ATLAS BOARD
/rk3399_rockchip-uboot/board/altera/arria10-socdk/
H A DMakefile7 obj-y := socfpga.o
/rk3399_rockchip-uboot/board/sr1500/
H A DMakefile7 obj-y := socfpga.o

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