151c580c6SStefan Roese/* 251c580c6SStefan Roese * Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de> 351c580c6SStefan Roese * 45bf1f1edSStefan Roese * SPDX-License-Identifier: GPL-2.0+ 551c580c6SStefan Roese */ 651c580c6SStefan Roese 751c580c6SStefan Roese#include "socfpga_cyclone5.dtsi" 851c580c6SStefan Roese 951c580c6SStefan Roese/ { 1051c580c6SStefan Roese model = "EBV SOCrates"; 1151c580c6SStefan Roese compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga"; 1251c580c6SStefan Roese 1351c580c6SStefan Roese chosen { 1451c580c6SStefan Roese bootargs = "console=ttyS0,115200"; 1551c580c6SStefan Roese }; 1651c580c6SStefan Roese 17b5a5d2bdSMarek Vasut aliases { 1843809cfaSStefan Roese /* 1943809cfaSStefan Roese * This allows the ethaddr uboot environment variable 2043809cfaSStefan Roese * contents to be added to the gmac1 device tree blob. 2143809cfaSStefan Roese */ 2243809cfaSStefan Roese ethernet0 = &gmac1; 23b5a5d2bdSMarek Vasut udc0 = &usb1; 24b5a5d2bdSMarek Vasut }; 25b5a5d2bdSMarek Vasut 2651c580c6SStefan Roese memory { 2751c580c6SStefan Roese name = "memory"; 2851c580c6SStefan Roese device_type = "memory"; 2951c580c6SStefan Roese reg = <0x0 0x40000000>; /* 1GB */ 3051c580c6SStefan Roese }; 31856b30daSMarek Vasut 32856b30daSMarek Vasut soc { 33856b30daSMarek Vasut u-boot,dm-pre-reloc; 34856b30daSMarek Vasut }; 3551c580c6SStefan Roese}; 3651c580c6SStefan Roese 3751c580c6SStefan Roese&gmac1 { 3851c580c6SStefan Roese status = "okay"; 39c2624240SMarek Vasut phy-mode = "rgmii"; 405d8546efSMarek Vasut 415d8546efSMarek Vasut rxd0-skew-ps = <0>; 425d8546efSMarek Vasut rxd1-skew-ps = <0>; 435d8546efSMarek Vasut rxd2-skew-ps = <0>; 445d8546efSMarek Vasut rxd3-skew-ps = <0>; 455d8546efSMarek Vasut txen-skew-ps = <0>; 465d8546efSMarek Vasut txc-skew-ps = <2600>; 475d8546efSMarek Vasut rxdv-skew-ps = <0>; 485d8546efSMarek Vasut rxc-skew-ps = <2000>; 4951c580c6SStefan Roese}; 5051c580c6SStefan Roese 5151c580c6SStefan Roese&i2c0 { 5251c580c6SStefan Roese status = "okay"; 5351c580c6SStefan Roese 5451c580c6SStefan Roese rtc: rtc@68 { 5551c580c6SStefan Roese compatible = "stm,m41t82"; 5651c580c6SStefan Roese reg = <0x68>; 5751c580c6SStefan Roese }; 5851c580c6SStefan Roese}; 5951c580c6SStefan Roese 60afe13993SMarek Vasut&mmc0 { 6151c580c6SStefan Roese status = "okay"; 62856b30daSMarek Vasut u-boot,dm-pre-reloc; 6351c580c6SStefan Roese}; 64881f6a44SStefan Roese 65881f6a44SStefan Roese&qspi { 66881f6a44SStefan Roese status = "okay"; 67881f6a44SStefan Roese 68881f6a44SStefan Roese flash0: n25q00@0 { 69881f6a44SStefan Roese #address-cells = <1>; 70881f6a44SStefan Roese #size-cells = <1>; 71881f6a44SStefan Roese compatible = "n25q00"; 72881f6a44SStefan Roese reg = <0>; /* chip select */ 73881f6a44SStefan Roese spi-max-frequency = <50000000>; 74881f6a44SStefan Roese m25p,fast-read; 75881f6a44SStefan Roese page-size = <256>; 76881f6a44SStefan Roese block-size = <16>; /* 2^16, 64KB */ 77881f6a44SStefan Roese read-delay = <4>; /* delay value in read data capture register */ 78881f6a44SStefan Roese tshsl-ns = <50>; 79881f6a44SStefan Roese tsd2d-ns = <50>; 80881f6a44SStefan Roese tchsh-ns = <4>; 81881f6a44SStefan Roese tslch-ns = <4>; 82881f6a44SStefan Roese }; 83881f6a44SStefan Roese}; 84b5a5d2bdSMarek Vasut 85b5a5d2bdSMarek Vasut&usb1 { 86*268da813SMarek Vasut disable-over-current; 87b5a5d2bdSMarek Vasut status = "okay"; 88b5a5d2bdSMarek Vasut}; 89