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12

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/
H A Drockchip-pcie.txt4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
8 - compatible: Should contain "rockchip,rk3399-pcie"
9 - reg: Two register ranges as listed in the reg-names property
10 - reg-names: Must include the following names
11 - "axi-base"
12 - "apb-base"
13 - clocks: Must contain an entry for each entry in clock-names.
14 See ../clocks/clock-bindings.txt for details.
[all …]
H A Drockchip-pcie-host.txt4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
8 - compatible: Should contain "rockchip,rk3399-pcie"
9 - reg: Two register ranges as listed in the reg-names property
10 - reg-names: Must include the following names
11 - "axi-base"
12 - "apb-base"
13 - clocks: Must contain an entry for each entry in clock-names.
14 See ../clocks/clock-bindings.txt for details.
[all …]
H A Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
18 - brcm,bcm7278-pcie # Broadcom 7278 Arm
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/include/
H A Dpcie_core.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 1999-2017, Broadcom Corporation
21 * Notwithstanding the above, under no circumstances may you combine this
26 * <<Broadcom-WL-IPTag/Open:>>
28 * $Id: pcie_core.h 673814 2016-12-05 06:10:24Z $
101 #define IFRM_FR_PER_VECREG_MASK ((0x1 << IFRM_FR_PER_VECREG_SHIFT) - 1)
204 /* 0x400 - 0x7FF, PCIE Cfg Space, note: not used anymore in PcieGen2 */
212 uint32 PAD[3]; /* 0x134-0x138-0x13c */
214 pcie_doorbell_t dbls[PCIEDEV_MAX_DMAS]; /* 0x140 - 0x17F */
232 uint32 PAD[7]; /* 0x1C4 - 0x1DF */
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/os_dep/linux/
H A Dpci_intf.c3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
129 struct pci_dev *pdev = pdvobjpriv->ppcidev; in PlatformClearPciPMEStatus()
207 struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); in rtw_pci_platform_switch_device_pci_aspm()
212 …Result = pci_write_config_byte(pdvobjpriv->ppcidev, pcipriv->pciehdr_offset + 0x10, value); /* ena… in rtw_pci_platform_switch_device_pci_aspm()
213 RTW_INFO("PlatformSwitchDevicePciASPM(0x%x) = 0x%x\n", pcipriv->pciehdr_offset + 0x10, value); in rtw_pci_platform_switch_device_pci_aspm()
239 error = pci_write_config_byte(pdvobjpriv->ppcidev, 0x81, buffer); in rtw_pci_switch_clk_req()
248 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
253 struct pci_dev *pdev = pdvobjpriv->ppcidev; in rtw_pci_disable_aspm()
254 struct pci_dev *bridge_pdev = pdev->bus->self; in rtw_pci_disable_aspm()
255 struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); in rtw_pci_disable_aspm()
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/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/
H A Dpcie_core.h6 * Copyright (C) 1999-2017, Broadcom Corporation
22 * Notwithstanding the above, under no circumstances may you combine this
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: pcie_core.h 698652 2017-05-10 10:39:24Z $
103 #define IFRM_FR_PER_VECREG_MASK ((0x1 << IFRM_FR_PER_VECREG_SHIFT) - 1)
226 /* 0x400 - 0x7FF, PCIE Cfg Space, note: not used anymore in PcieGen2 */
234 uint32 PAD[3]; /* 0x134-0x138-0x13c */
236 pcie_doorbell_t dbls[PCIEDEV_MAX_DMAS]; /* 0x140 - 0x17F */
257 uint32 PAD[4]; /* 0x1D0 - 0x1DF */
261 uint32 PAD[5]; /* 0x1EC - 0x1FF */
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/
H A Dpcie_core.h6 * Copyright (C) 1999-2017, Broadcom Corporation
22 * Notwithstanding the above, under no circumstances may you combine this
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: pcie_core.h 698652 2017-05-10 10:39:24Z $
103 #define IFRM_FR_PER_VECREG_MASK ((0x1 << IFRM_FR_PER_VECREG_SHIFT) - 1)
226 /* 0x400 - 0x7FF, PCIE Cfg Space, note: not used anymore in PcieGen2 */
234 uint32 PAD[3]; /* 0x134-0x138-0x13c */
236 pcie_doorbell_t dbls[PCIEDEV_MAX_DMAS]; /* 0x140 - 0x17F */
257 uint32 PAD[4]; /* 0x1D0 - 0x1DF */
261 uint32 PAD[5]; /* 0x1EC - 0x1FF */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/
H A Dpcie_core.h6 * Copyright (C) 1999-2017, Broadcom Corporation
22 * Notwithstanding the above, under no circumstances may you combine this
27 * <<Broadcom-WL-IPTag/Open:>>
29 * $Id: pcie_core.h 698652 2017-05-10 10:39:24Z $
103 #define IFRM_FR_PER_VECREG_MASK ((0x1 << IFRM_FR_PER_VECREG_SHIFT) - 1)
226 /* 0x400 - 0x7FF, PCIE Cfg Space, note: not used anymore in PcieGen2 */
234 uint32 PAD[3]; /* 0x134-0x138-0x13c */
236 pcie_doorbell_t dbls[PCIEDEV_MAX_DMAS]; /* 0x140 - 0x17F */
257 uint32 PAD[4]; /* 0x1D0 - 0x1DF */
261 uint32 PAD[5]; /* 0x1EC - 0x1FF */
[all …]
/OK3568_Linux_fs/kernel/drivers/pci/controller/dwc/
H A Dpcie-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
33 #include "pcie-designware.h"
35 #include <soc/tegra/bpmp-abi.h>
322 writel_relaxed(value, pcie->appl_base + reg); in appl_writel()
327 return readl_relaxed(pcie->appl_base + reg); in appl_readl()
342 * NOTE:- Since this scenario is uncommon and link as such is not in apply_bad_link_workaround()
344 * transitioning to Gen-2 speed in apply_bad_link_workaround()
346 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA); in apply_bad_link_workaround()
350 if (pcie->init_link_width > current_link_width) { in apply_bad_link_workaround()
351 dev_warn(pci->dev, "PCIe link is bad, width reduced\n"); in apply_bad_link_workaround()
[all …]
H A Dpcie-dw-rockchip.c1 // SPDX-License-Identifier: GPL-2.0
6 * http://www.rock-chips.com
8 * Author: Simon Xue <xxm@rock-chips.com>
39 #include <linux/rfkill-wlan.h>
43 #include <linux/pci-epf.h>
45 #include "pcie-designware.h"
47 #include "../rockchip-pcie-dma.h"
48 #include "pcie-dw-dmatest.h"
189 u16 aspm; member
202 #define to_rk_pcie(x) dev_get_drvdata((x)->dev)
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/OK3568_Linux_fs/kernel/include/uapi/linux/
H A Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
123 /* 0x35-0x3b are reserved */
129 /* Header type 1 (PCI-to-PCI bridges) */
157 /* 0x35-0x3b is reserved */
159 /* 0x3c-0x3d are same as for htype 0 */
[all …]
/OK3568_Linux_fs/kernel/drivers/pci/controller/
H A Dpcie-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2009 - 2019 Broadcom */
34 /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */
175 #define IDX_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_INDEX])
176 #define DATA_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_DATA])
177 #define PCIE_RGR1_SW_INIT_1(pcie) (pcie->reg_offsets[RGR1_SW_INIT_1])
267 int nr; /* No. of MSI available, depends on chip */
294 * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE
302 return (log2_in - 12) + 0x1c; in brcm_pcie_encode_ibar_size()
305 return log2_in - 15; in brcm_pcie_encode_ibar_size()
[all …]
H A Dpcie-rockchip-host.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
40 #include "pcie-rockchip.h"
41 #include "rockchip-pcie-dma.h"
45 struct rockchip_pcie *rockchip = dev_get_drvdata(obj->dev); in rk_pcie_start_dma_rk3399()
47 int chn = tbl->chn; in rk_pcie_start_dma_rk3399()
49 rockchip_pcie_write(rockchip, (u32)(tbl->phys_descs & 0xffffffff), in rk_pcie_start_dma_rk3399()
51 rockchip_pcie_write(rockchip, (u32)(tbl->phys_descs >> 32), in rk_pcie_start_dma_rk3399()
53 rockchip_pcie_write(rockchip, BIT(0) | (tbl->dir << 1), in rk_pcie_start_dma_rk3399()
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/
H A Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
27 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
28 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
51 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
60 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
123 /* 0x35-0x3b are reserved */
129 /* Header type 1 (PCI-to-PCI bridges) */
157 /* 0x35-0x3b is reserved */
159 /* 0x3c-0x3d are same as for htype 0 */
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/
H A Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
27 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
28 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
51 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
60 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
123 /* 0x35-0x3b are reserved */
129 /* Header type 1 (PCI-to-PCI bridges) */
157 /* 0x35-0x3b is reserved */
159 /* 0x3c-0x3d are same as for htype 0 */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath9k/
H A Dar9002_hw.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
29 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271); in ar9002_hw_init_mode_regs()
30 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271); in ar9002_hw_init_mode_regs()
31 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg); in ar9002_hw_init_mode_regs()
35 INIT_INI_ARRAY(&ah->iniPcieSerdes, in ar9002_hw_init_mode_regs()
39 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1); in ar9002_hw_init_mode_regs()
40 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1); in ar9002_hw_init_mode_regs()
42 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2); in ar9002_hw_init_mode_regs()
43 INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2); in ar9002_hw_init_mode_regs()
[all …]
/OK3568_Linux_fs/kernel/arch/sh/drivers/pci/
H A Dpcie-sh7786.c1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Express Support for the SH7786
5 * Copyright (C) 2009 - 2011 Paul Mundt
15 #include <linux/dma-mapping.h>
21 #include "pcie-sh7786.h"
47 .end = 0xfd000000 + SZ_8M - 1,
52 .end = 0xc0000000 + SZ_512M - 1,
57 .end = 0x10000000 + SZ_64M - 1,
62 .end = 0xfe100000 + SZ_1M - 1,
71 .end = 0xfd800000 + SZ_8M - 1,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/intel/iwlegacy/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 #include <linux/dma-mapping.h>
39 return -ETIMEDOUT; in _il_poll_bit()
48 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_set_bit()
50 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_set_bit()
59 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_clear_bit()
61 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_clear_bit()
79 * to/from host DRAM when sleeping/waking for power-saving. in _il_grab_nic_access()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
14 * atl1c_pci_tbl - PCI Device ID Table
35 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
65 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { in atl1c_pcie_patch()
74 /* aspm/PCIE setting only for l2cb 1.0 */ in atl1c_pcie_patch()
75 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { in atl1c_pcie_patch()
88 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { in atl1c_pcie_patch()
98 /* FIXME: no need any more ? */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/atheros/alx/
H A Dhw.c28 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
58 return -ETIMEDOUT; in alx_wait_mdio_idle()
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
104 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_write_phy_core()
175 spin_lock(&hw->mdio_lock); in alx_read_phy_reg()
177 spin_unlock(&hw->mdio_lock); in alx_read_phy_reg()
186 spin_lock(&hw->mdio_lock); in alx_write_phy_reg()
188 spin_unlock(&hw->mdio_lock); in alx_write_phy_reg()
197 spin_lock(&hw->mdio_lock); in alx_read_phy_ext()
199 spin_unlock(&hw->mdio_lock); in alx_read_phy_ext()
[all …]
/OK3568_Linux_fs/kernel/drivers/pci/
H A Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
63 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
64 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
65 (f->vendor == dev->vendor || in pci_do_fixups()
66 f->vendor == (u16) PCI_ANY_ID) && in pci_do_fixups()
67 (f->device == dev->device || in pci_do_fixups()
68 f->device == (u16) PCI_ANY_ID)) { in pci_do_fixups()
71 hook = offset_to_ptr(&f->hook_offset); in pci_do_fixups()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/realtek/
H A Dr8169_main.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
26 #include <linux/dma-mapping.h>
38 #define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
39 #define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
40 #define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
41 #define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
42 #define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
43 #define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
44 #define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/core/
H A Drtw_debug.c3 * Copyright(c) 2007 - 2017 Realtek Corporation.
51 char *kernel_version = utsname()->release; in dump_drv_cfg()
57 RTW_PRINT_SEL(sel, "------------------------------------------------\n"); in dump_drv_cfg()
84 RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH=%s\n", REALTEK_CONFIG_PATH); in dump_drv_cfg()
86 RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH_WITH_IC_NAME_FOLDER\n"); in dump_drv_cfg()
117 RTW_PRINT_SEL(sel, "CONFIG_WOWLAN - "); in dump_drv_cfg()
120 RTW_PRINT_SEL(sel, "CONFIG_GPIO_WAKEUP - WAKEUP_GPIO_IDX:%d\n", WAKEUP_GPIO_IDX); in dump_drv_cfg()
175 RTW_PRINT_SEL(sel, "\n=== XMIT-INFO ===\n"); in dump_drv_cfg()
183 RTW_PRINT_SEL(sel, "\n=== RECV-INFO ===\n"); in dump_drv_cfg()
350 struct recv_priv *precvpriv = &(adapter->recvpriv); in rtw_sink_rtp_seq_dbg()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/core/
H A Drtw_debug.c3 * Copyright(c) 2007 - 2019 Realtek Corporation.
51 char *kernel_version = utsname()->release; in dump_drv_cfg()
63 RTW_PRINT_SEL(sel, "------------------------------------------------\n"); in dump_drv_cfg()
122 RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH=%s\n", REALTEK_CONFIG_PATH); in dump_drv_cfg()
124 RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH_WITH_IC_NAME_FOLDER\n"); in dump_drv_cfg()
155 RTW_PRINT_SEL(sel, "CONFIG_WOWLAN - "); in dump_drv_cfg()
158 RTW_PRINT_SEL(sel, "CONFIG_GPIO_WAKEUP - WAKEUP_GPIO_IDX:%d\n", WAKEUP_GPIO_IDX); in dump_drv_cfg()
281 /*GEORGIA_TODO_TRX - need get trx buff accroding to IC spec*/ in dump_drv_cfg()
282 RTW_PRINT_SEL(sel, "\n=== XMIT-INFO ===\n"); in dump_drv_cfg()
292 RTW_PRINT_SEL(sel, "\n=== RECV-INFO ===\n"); in dump_drv_cfg()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/core/
H A Drtw_debug.c3 * Copyright(c) 2007 - 2019 Realtek Corporation.
51 char *kernel_version = utsname()->release; in dump_drv_cfg()
63 RTW_PRINT_SEL(sel, "------------------------------------------------\n"); in dump_drv_cfg()
122 RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH=%s\n", REALTEK_CONFIG_PATH); in dump_drv_cfg()
124 RTW_PRINT_SEL(sel, "LOAD_PHY_PARA_FROM_FILE - REALTEK_CONFIG_PATH_WITH_IC_NAME_FOLDER\n"); in dump_drv_cfg()
155 RTW_PRINT_SEL(sel, "CONFIG_WOWLAN - "); in dump_drv_cfg()
158 RTW_PRINT_SEL(sel, "CONFIG_GPIO_WAKEUP - WAKEUP_GPIO_IDX:%d\n", WAKEUP_GPIO_IDX); in dump_drv_cfg()
250 /*GEORGIA_TODO_TRX - need get trx buff accroding to IC spec*/ in dump_drv_cfg()
251 RTW_PRINT_SEL(sel, "\n=== XMIT-INFO ===\n"); in dump_drv_cfg()
262 RTW_PRINT_SEL(sel, "\n=== RECV-INFO ===\n"); in dump_drv_cfg()
[all …]

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