| /optee_os/ |
| H A D | MAINTAINERS | 40 ARM Foundation FVP
43 F: core/arch/arm/plat-vexpress/
45 ARM Juno
48 F: core/arch/arm/plat-vexpress/
50 ARM Corstone1000
51 R: Emekcan.Aras@arm.com <emekcan.aras@arm.com> [@ememarar]
53 F: core/arch/arm/plat-corstone1000/
55 Arm Automotive Reference Design
56 R: Ahmed Tiba <ahmed.tiba@arm
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| /optee_os/core/arch/arm/plat-marvell/ |
| H A D | conf.mk | 4 include core/arch/arm/cpu/cortex-armv8-0.mk
13 platform-debugger-arm := 1
18 include core/arch/arm/cpu/cortex-armv8-0.mk
27 platform-debugger-arm := 1
33 include core/arch/arm/cpu/cortex-armv8-0.mk
52 include core/arch/arm/cpu/cortex-armv8-0.mk
71 include core/arch/arm/cpu/cortex-armv8-0.mk
90 include core/arch/arm/cpu/cortex-armv8-0.mk
107 include core/arch/arm/cpu/cortex-armv8-0.mk
124 include core/arch/arm/cpu/cortex-armv8-0.mk
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| /optee_os/core/drivers/crypto/caam/include/ |
| H A D | caam_common.h | 36 JROWN_ARM_NS = 0x4, /* Non-Secure ARM */
37 JROWN_ARM_S = JROWNER_SECURE | 0x4, /* Secure ARM */
41 JROWN_ARM_NS = 0x7, /* Non-Secure ARM */
42 JROWN_ARM_S = JROWNER_SECURE | 0x7, /* Secure ARM */
46 JROWN_ARM_NS = 0x1, /* Non-Secure ARM */
47 JROWN_ARM_S = JROWNER_SECURE | 0x1, /* Secure ARM */
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| /optee_os/.github/workflows/ |
| H A D | ci.yml | 58 pycodestyle scripts/*.py core/arch/arm/plat-stm32mp1/scripts/stm32image.py
67 - name: arm hikey
71 - name: arm hikey-hikey960
78 - name: arm imx-imx6* 1
93 - name: arm imx-imx6* 2
106 - name: arm imx-mx7*
111 - name: arm imx-mx8*
124 - name: arm imx-mx9*
130 - name: arm k3
144 - name: arm ls
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| /optee_os/core/arch/arm/plat-vexpress/ |
| H A D | conf.mk | 4 include core/arch/arm/cpu/cortex-a15.mk
7 include core/arch/arm/cpu/cortex-armv8-0.mk
8 platform-debugger-arm := 1
11 include core/arch/arm/cpu/cortex-armv8-0.mk
12 platform-debugger-arm := 1
24 include core/arch/arm/cpu/cortex-armv8-0.mk
29 include core/arch/arm/cpu/cortex-armv8-0.mk
34 ifeq ($(platform-debugger-arm),1)
35 # ARM debugger needs this
126 # core/arch/arm/kernel/generic_boot.c to check that we got it right
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| /optee_os/core/arch/arm/plat-ls/ |
| H A D | conf.mk | 17 include core/arch/arm/cpu/cortex-armv8-0.mk
26 include core/arch/arm/cpu/cortex-armv8-0.mk
34 include core/arch/arm/cpu/cortex-armv8-0.mk
42 include core/arch/arm/cpu/cortex-armv8-0.mk
51 include core/arch/arm/cpu/cortex-armv8-0.mk
60 include core/arch/arm/cpu/cortex-armv8-0.mk
78 include core/arch/arm/cpu/cortex-armv8-0.mk
96 include core/arch/arm/cpu/cortex-armv8-0.mk
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| /optee_os/ldelf/ |
| H A D | ldelf.ld.S | 9 OUTPUT_ARCH(arm)
29 /* Workaround for an erratum in ARM's VFP11 coprocessor */
41 /* .ARM.exidx is sorted, so has to go in its own output section. */
42 .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
43 .ARM.extab : { *(.ARM.extab*) }
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| H A D | tlsdesc_rel_a64.S | 12 * See https://www.fsfla.org/~lxoliva/writeups/TLS/RFC-TLSDESC-ARM.txt section
13 * "Resolvers' Calling Convention". The document applies to 32-bit Arm but other
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| /optee_os/core/arch/arm/plat-totalcompute/ |
| H A D | conf.mk | 2 include core/arch/arm/cpu/cortex-armv8-0.mk
3 platform-debugger-arm := 1
20 ifeq ($(platform-debugger-arm),1)
21 # ARM debugger needs this
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| /optee_os/ta/arch/arm/ |
| H A D | ta.ld.S | 3 OUTPUT_ARCH(arm)
24 /* Workaround for an erratum in ARM's VFP11 coprocessor */
41 .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) }
42 /* .ARM.exidx is sorted, so has to go in its own output section. */
44 .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
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| /optee_os/core/arch/arm/plat-rockchip/ |
| H A D | conf.mk | 12 include ./core/arch/arm/cpu/cortex-a7.mk
30 include core/arch/arm/cpu/cortex-armv8-0.mk
48 include core/arch/arm/cpu/cortex-armv8-0.mk
60 include core/arch/arm/cpu/cortex-armv8-0.mk
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| /optee_os/scripts/ |
| H A D | checkpatch_inc.sh | 12 core/arch/arm/include/arm{32,64}.h \
13 core/arch/arm/plat-ti/api_monitor_index_a{9,15}.h \
14 core/arch/arm/dts \
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| /optee_os/core/arch/arm/dts/ |
| H A D | fsl-lx2160a.dtsi | 8 #include <dt-bindings/interrupt-controller/arm-gic.h>
29 compatible = "arm,cortex-a72";
46 compatible = "arm,cortex-a72";
63 compatible = "arm,cortex-a72";
80 compatible = "arm,cortex-a72";
97 compatible = "arm,cortex-a72";
114 compatible = "arm,cortex-a72";
131 compatible = "arm,cortex-a72";
148 compatible = "arm,cortex-a72";
165 compatible = "arm,cortex-a72";
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| /optee_os/core/arch/arm/plat-ti/ |
| H A D | conf.mk | 7 include core/arch/arm/cpu/cortex-a15.mk
14 include core/arch/arm/cpu/cortex-a15.mk
21 include core/arch/arm/cpu/cortex-a9.mk
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| /optee_os/core/arch/arm/plat-automotive_rd/ |
| H A D | conf.mk | 7 include core/arch/arm/cpu/neoverse-v2.mk
17 include core/arch/arm/cpu/cortex-armv9.mk
23 # ARM debugger needs this
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| /optee_os/core/arch/arm/plat-totalcompute/fdts/ |
| H A D | optee_sp_manifest.dts | 3 * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
12 compatible = "arm,ffa-manifest-1.0";
29 compatible = "arm,ffa-manifest-device-regions";
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| /optee_os/core/arch/arm/cpu/ |
| H A D | cortex-a35.mk | 2 include core/arch/arm/cpu/cortex-armv8-0.mk
4 # ARM debugger needs this
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| /optee_os/core/arch/arm/kernel/ |
| H A D | thread_optee_smc_a64.S | 7 #include <arm.h>
140 * Vector table supplied to ARM Trusted Firmware (ARM-TF) at
143 * Note that ARM-TF depends on the layout of this vector table, any change
144 * in layout has to be synced with ARM-TF.
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| H A D | thread_optee_smc_a32.S | 7 #include <arm.h>
150 * Vector table supplied to ARM Trusted Firmware (ARM-TF) at
154 * Note that ARM-TF depends on the layout of this vector table, any change
155 * in layout has to be synced with ARM-TF.
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| /optee_os/lib/libutils/isoc/arch/arm/ |
| H A D | setjmp_a32.S | 56 /* Arm/Thumb interworking support:
65 (We know that we are in ARM mode and returning to an ARM mode caller).
85 just switch into ARM mode and then drop through into the rest of the
177 #else /* Arm */
224 * As ftrace is supported in ARM mode only, so hardcode jmp_buf
248 * As ftrace is supported in ARM mode only, so hardcode jmp_buf
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| /optee_os/core/arch/arm/plat-telechips/ |
| H A D | link.mk | 1 include core/arch/arm/kernel/link.mk
7 $(q)$(PYTHON3) core/arch/arm/plat-telechips/scripts/tcmktool.py $< $@ $(TCMKTOOL_IMGNAME) \
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| /optee_os/core/arch/arm/plat-imx/ |
| H A D | link.mk | 1 include core/arch/arm/kernel/link.mk
9 mkimage -A arm -O linux -C none -a $$ADDR -e $$ADDR -d $< $@
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| /optee_os/core/arch/arm/plat-stm32mp1/nsec-service/ |
| H A D | stm32mp1_smc.h | 28 * like this is defined in SMC calling Convention by ARM
30 * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
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| /optee_os/core/arch/arm/plat-amlogic/ |
| H A D | link.mk | 1 include core/arch/arm/kernel/link.mk
7 $(q)./core/arch/arm/plat-amlogic/scripts/aml_bin2img.py
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| /optee_os/core/arch/arm/ |
| H A D | arm.mk | 50 CFG_KERN_LINKER_ARCH ?= arm
71 # See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf
88 # Adds workarounds against if ARM core is configured with Non-maskable FIQ
179 # Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75
189 # Arm-GIC to notify normal world. This config variable should use a value
236 arm32-platform-cflags-generic-arm ?= -marm -fno-omit-frame-pointer -mapcs \
300 core-platform-cflags += $(arm32-platform-cflags-generic-arm)
334 # rather compile in ARM mode if function tracing is enabled.
336 ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-arm)
370 ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_
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