History log of /optee_os/core/drivers/crypto/caam/include/caam_common.h (Results 1 – 6 of 6)
Revision Date Author Comments
# e62c30da 31-May-2021 Clement Faure <clement.faure@nxp.com>

drivers: caam: add imx8ulp CAAM HAL

Add imx8ulp CAAM HAL functions.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>


# 38923d48 27-Mar-2020 Cedric Neveux <cedric.neveux@nxp.com>

drivers: caam: implement CAAM DMA Object

Implementation of a CAAM DMA object to:
- create a DMA object (SGT/buffer) based on input/output buffers
- reallocate a new buffer accessible from the CA

drivers: caam: implement CAAM DMA Object

Implementation of a CAAM DMA object to:
- create a DMA object (SGT/buffer) based on input/output buffers
- reallocate a new buffer accessible from the CAAM address space
- ensure buffer is cache aligned (for the output)

Implementation of CAAM DMA object functions to:
- cache maintenance
- free CAAM DMA object

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 5c3559dc 03-Apr-2020 Ruchika Gupta <ruchika.gupta@nxp.com>

drivers: caam: Allow platforms to configure num of JR entries

Currently JR entries is fixed to 10 in common file. Allow
this to be over-ridden by platform's conf.mk

Signed-off-by: Ruchika Gupta <r

drivers: caam: Allow platforms to configure num of JR entries

Currently JR entries is fixed to 10 in common file. Allow
this to be over-ridden by platform's conf.mk

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Acked-by: Clement Faure <clement.faure@nxp.com>

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# 971110af 03-Apr-2020 Ruchika Gupta <ruchika.gupta@nxp.com>

drivers: caam: Modify access of 64 bit registers

The Address of Input/output Job ring and scatter gather table are
handled differently depending on platform

1. All BE CAAM platforms (LS1043, LS1012

drivers: caam: Modify access of 64 bit registers

The Address of Input/output Job ring and scatter gather table are
handled differently depending on platform

1. All BE CAAM platforms (LS1043, LS1012, LS1046)
and i.MX platforms (LE CAAM):
base + 0x0000 : most-significant 32 bits
base + 0x0004 : least-significant 32 bits

The 32-bit version of this core therefore has to write to base + 0x0004
to set the 32-bit wide DMA address.

2. All other LE CAAM platforms (LS2088, LS1088, LX2160 etc.)
base + 0x0000 : least-significant 32 bits
base + 0x0004 : most-significant 32 bits

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Acked-by: Clement Faure <clement.faure@nxp.com>

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# 1ba7f0bb 27-Sep-2019 Cedric Neveux <cedric.neveux@nxp.com>

drivers: CAAM driver User Buffer SGT create

CAAM Driver can operate directly with the User Buffer and in this
case, the buffer can be on non-contiguous physical page.

CAAM is using a DMA to load/st

drivers: CAAM driver User Buffer SGT create

CAAM Driver can operate directly with the User Buffer and in this
case, the buffer can be on non-contiguous physical page.

CAAM is using a DMA to load/store data from memory. The DMA is working
with physical address. In case of the User Buffer, if the buffer is
crossing multiple Small Page, a CAAM Scatter Gather Table needs to
be created to rebuild the physical memory chunks used by the User virtual
buffer.

Add a function to check if a buffer is a User buffer crossing mutliple
small page.
Add a function to create a SGT Table of the User buffer.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 2d7a8964 06-Aug-2019 Cedric Neveux <cedric.neveux@nxp.com>

driver: implement CAAM driver

Add the NXP CAAM drivers:
- Random generator (instantiation and random generation)
- Hash

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Etienne Ca

driver: implement CAAM driver

Add the NXP CAAM drivers:
- Random generator (instantiation and random generation)
- Hash

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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