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Searched +full:am3352 +full:- +full:phy +full:- +full:gmii +full:- +full:sel (Results 1 – 11 of 11) sorted by relevance

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dti,phy-gmii-sel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: CPSW Port's Interface Mode Selection PHY Tree Bindings
11 - Kishon Vijay Abraham I <kishon@ti.com>
20 +--------------+
21 +-------------------------------+ |SCM |
22 | CPSW | | +---------+ |
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dcpsw-phy-sel.txt1 TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED)
2 -----------------------------------------------
5 - compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and
6 "ti,dra7xx-cpsw-phy-sel" for dra7xx platform
7 "ti,am43xx-cpsw-phy-sel" for am43xx platform
8 - reg : physical base address and size of the cpsw
10 - reg-names : names of the register map given in "reg" node
13 -rmii-clock-ext : If present, the driver will configure the RMII
18 phy_sel: cpsw-phy-sel@44e10650 {
19 compatible = "ti,am3352-cpsw-phy-sel";
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/OK3568_Linux_fs/kernel/drivers/phy/ti/
H A Dphy-gmii-sel.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments CPSW Port's PHY Interface Mode selection Driver
5 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
7 * Based on cpsw-phy-sel.c driver created by Mugunthan V N <mugunthanvnm@ti.com>
16 #include <linux/phy.h>
17 #include <linux/phy/phy.h>
35 struct phy *if_phy;
58 static int phy_gmii_sel_mode(struct phy *phy, enum phy_mode mode, int submode) in phy_gmii_sel_mode() argument
60 struct phy_gmii_sel_phy_priv *if_phy = phy_get_drvdata(phy); in phy_gmii_sel_mode()
61 const struct phy_gmii_sel_soc_data *soc_data = if_phy->priv->soc_data; in phy_gmii_sel_mode()
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/ti/
H A Dcpsw-phy-sel.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/phy.h>
48 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_am3352()
67 dev_warn(priv->dev, in cpsw_gmii_sel_am3352()
68 "Unsupported PHY mode: \"%s\". Defaulting to MII.\n", in cpsw_gmii_sel_am3352()
80 if (priv->rmii_clock_external) { in cpsw_gmii_sel_am3352()
97 writel(reg, priv->gmii_sel); in cpsw_gmii_sel_am3352()
107 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_dra7xx()
122 dev_warn(priv->dev, in cpsw_gmii_sel_dra7xx()
123 "Unsupported PHY mode: \"%s\". Defaulting to MII.\n", in cpsw_gmii_sel_dra7xx()
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Ddm814x.dtsi7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm814.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/dm814x.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
37 compatible = "arm,cortex-a8";
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H A Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-bus";
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
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H A Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-bus";
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
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H A Ddra7-l4.dtsi2 compatible = "ti,dra7-l4-cfg", "simple-bus";
6 reg-names = "ap", "la", "ia0";
7 #address-cells = <1>;
8 #size-cells = <1>;
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
47 target-module@2000 { /* 0x4a002000, ap 3 08.0 */
48 compatible = "ti,sysc-omap4", "ti,sysc";
50 reg-names = "rev";
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dam33xx.dtsi4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
18 interrupt-parent = <&intc>;
41 #address-cells = <1>;
42 #size-cells = <0>;
44 compatible = "arm,cortex-a8";
53 operating-points = <
60 voltage-tolerance = <2>; /* 2 percentage */
63 clock-names = "cpu";
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H A Dam4372.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&wakeupgen>;
32 #address-cells = <1>;
33 #size-cells = <0>;
35 compatible = "arm,cortex-a9";
40 clock-names = "cpu";
42 clock-latency = <300000>; /* From omap-cpufreq driver */
46 gic: interrupt-controller@48241000 {
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H A Ddra7.dtsi2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
46 compatible = "arm,armv7-timer";
51 interrupt-parent = <&gic>;
54 gic: interrupt-controller@48211000 {
55 compatible = "arm,cortex-a15-gic";
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