Searched +full:100 +full:base +full:- +full:fx (Results 1 – 25 of 96) sorted by relevance
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1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)4 ---6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"11 - $ref: "ethernet-phy.yaml#"14 - Dan Murphy <dmurphy@ti.com>17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and20 100BASE-FX Fiber protocols.23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX[all …]
3 These properties cover the base properties Micrel PHYs.7 - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs.22 - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select29 non-standard, inverted function of this configuration bit.30 Specifically, a clock reference ("rmii-ref" below) is always needed to33 - clocks, clock-names: contains clocks according to the common clock bindings.36 - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference39 - micrel,fiber-mode: If present the PHY is configured to operate in fiber mode46 In fiber mode, auto-negotiation is disabled and the PHY can only work in47 100base-fx (full and half duplex) modes.
1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)4 ---6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"11 - Dan Murphy <dmurphy@ti.com>14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It16 data over standard, twisted-pair cables or to connect to an external,17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to24 - $ref: "ethernet-phy.yaml#"30 ti,link-loss-low:39 ti,fiber-mode:[all …]
1 // SPDX-License-Identifier: GPL-2.0-only8 struct ethnl_req_info base; member12 struct ethnl_reply_data base; member19 container_of(__reply_base, struct linkmodes_reply_data, base)31 struct net_device *dev = reply_base->dev; in linkmodes_prepare_data()34 data->lsettings = &data->ksettings.base; in linkmodes_prepare_data()40 ret = __ethtool_get_link_ksettings(dev, &data->ksettings); in linkmodes_prepare_data()46 data->peer_empty = in linkmodes_prepare_data()47 bitmap_empty(data->ksettings.link_modes.lp_advertising, in linkmodes_prepare_data()59 const struct ethtool_link_ksettings *ksettings = &data->ksettings; in linkmodes_reply_size()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only11 [NETIF_F_SG_BIT] = "tx-scatter-gather",12 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4",13 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic",14 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6",16 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist",17 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert",19 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse",20 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter",21 [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert",[all …]
1 // SPDX-License-Identifier: GPL-2.0+13 #include "bcm-phy-lib.h"21 ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)24 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))37 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()38 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { in bcm54xx_config_clock_delay()39 /* Disable RGMII RXC-RXD skew */ in bcm54xx_config_clock_delay()42 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in bcm54xx_config_clock_delay()43 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { in bcm54xx_config_clock_delay()44 /* Enable RGMII RXC-RXD skew */ in bcm54xx_config_clock_delay()[all …]
1 // SPDX-License-Identifier: GPL-2.016 #include <dt-bindings/net/ti-dp83869.h>69 /* This is the same bit mask as the BMCR so re-use the BMCR default */157 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) { in dp83869_read_status()165 if (phydev->link) { in dp83869_read_status()166 if (dp83869->mode == DP83869_RGMII_100_BASE) in dp83869_read_status()167 phydev->speed = SPEED_100; in dp83869_read_status()169 phydev->speed = SPEED_UNKNOWN; in dp83869_read_status()170 phydev->duplex = DUPLEX_UNKNOWN; in dp83869_read_status()[all …]
16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */[all …]
4 * SPDX-License-Identifier: GPL-2.0+6 * Copyright 2010-2011 Freescale Semiconductor, Inc.13 /* Broadcom BCM54xx -- taken from linux sungem_phy */75 phydev->duplex = DUPLEX_HALF; in bcm54xx_parse_status()76 phydev->speed = SPEED_10; in bcm54xx_parse_status()79 phydev->duplex = DUPLEX_FULL; in bcm54xx_parse_status()80 phydev->speed = SPEED_10; in bcm54xx_parse_status()83 phydev->duplex = DUPLEX_HALF; in bcm54xx_parse_status()84 phydev->speed = SPEED_100; in bcm54xx_parse_status()87 phydev->duplex = DUPLEX_FULL; in bcm54xx_parse_status()[all …]
1 .. SPDX-License-Identifier: GPL-2.020 - Andrew Morton21 - Netdev mailing list <netdev@vger.kernel.org>22 - Linux kernel mailing list <linux-kernel@vger.kernel.org>28 Since kernel 2.3.99-pre6, this driver incorporates the support for the29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c.33 - 3c590 Vortex 10Mbps34 - 3c592 EISA 10Mbps Demon/Vortex35 - 3c597 EISA Fast Demon/Vortex36 - 3c595 Vortex 100baseTx[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */7 /* All Broadcom Ethernet switches have a pseudo-PHY at address 30 which is used110 #define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */202 /* 01010: Auto Power-Down */219 /* 10011: SerDes 100-FX Control Register */221 #define BCM54616S_100FX_MODE BIT(0) /* 100-FX SerDes Enable */229 #define BCM54XX_SHD_MODE_1000BX BIT(0) /* Enable 1000-X registers */253 #define BCM5482_SSD_1000BX_CTL 0x00 /* 1000BASE-X Control */254 #define BCM5482_SSD_1000BX_CTL_PWRDOWN 0x0800 /* Power-down SSD */257 #define BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>41 * init/main.c to make it non-init before enabling DEBUG_FREQ108 /* Switch CPU speed under 750FX CPU control168 udelay(100); in dfs_set_cpu_speed()210 if (++timeout > 100) in gpios_set_cpu_speed()254 * the above didn't re-enable the DEC */ in pmu_set_cpu_speed()270 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()271 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()299 switch_mmu_context(NULL, current->active_mm, NULL); in pmu_set_cpu_speed()[all …]
1 # SPDX-License-Identifier: GPL-2.0-only39 will be called snd-adlib.54 will be called snd-ad1816a.61 CS4248 (Cirrus Logic - Crystal Semiconductors) chips.67 will be called snd-ad1848.70 tristate "Diamond Tech. DT-019x and Avance Logic ALSxxx"78 Diamond Technologies DT-019X or Avance Logic chips: ALS007,82 will be called snd-als100.95 will be called snd-azt1605.108 will be called snd-azt2316.[all …]
3 Written 2002-2004 by David Dillow <dave@thedillows.org>4 Based on code written 1998-2000 by Donald Becker <becker@scyld.com> and21 number Y1-LM-2015-01.29 *) Waiting for a command response takes 8ms due to non-preemptable41 http://oss.sgi.com/cgi-bin/mesg.cgi?a=netdev&i=20031215152211.7003fe8e.rddunlap%40osdl.org44 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.56 /* end user-configurable values */58 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).68 * There are no ill effects from too-large receive rings.89 #define RXENT_ENTRIES (RXFREE_ENTRIES - 1)[all …]
3 Written 1996-1999 by Donald Becker.43 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.48 /* ARM systems perform better by disregarding the bus-master49 transfer capability of these cards. -- rmk */98 This is only in the support-all-kernels source code. */117 The Boomerang size is twice as large as the Vortex -- it has additional124 code size of a per-interface flag is not worthwhile. */137 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs145 II. Board-specific settings151 The EEPROM settings for media type and forced-full-duplex are observed.[all …]
16 #define ICOM_CALL_( xfn, p, args) (p)->lpVtbl->xfn args99 #define DDERR_INVALIDCAPS MAKE_DDHRESULT( 100 )338 /* indicates surface can be re-ordered or retiled on load() */410 DDSCAPS ddsOldCaps; /* old DDSCAPS - superceded for DirectX6+ */420 DWORD dwSVBCaps; /* driver specific capabilities for System->Vmem blts */421 DWORD dwSVBCKeyCaps; /* driver color key capabilities for System->Vmem blts */422 DWORD dwSVBFXCaps; /* driver FX capabilities for System->Vmem blts */423 DWORD dwSVBRops[DD_ROP_SPACE]; /* ROPS supported for System->Vmem blts */424 DWORD dwVSBCaps; /* driver specific capabilities for Vmem->System blts */425 DWORD dwVSBCKeyCaps; /* driver color key capabilities for Vmem->System blts */[all …]
13 // Copyright (C) 2000-2008, Intel Corporation, all rights reserved.54 The functions in this section use a so-called pinhole camera model. In this model, a scene view is76 - \f$(X, Y, Z)\f$ are the coordinates of a 3D point in the world coordinate space77 - \f$(u, v)\f$ are the coordinates of the projection point in pixels78 - \f$A\f$ is a camera matrix, or a matrix of intrinsic parameters79 - \f$(cx, cy)\f$ is a principal point that is usually at the image center80 - \f$fx, fy\f$ are the focal lengths expressed in pixel units.84 depend on the scene viewed. So, once estimated, it can be re-used as long as the focal length is85 fixed (in case of zoom lens). The joint rotation-translation matrix \f$[R|t]\f$ is called a matrix …119 coefficients. Higher-order coefficients are not considered in OpenCV.[all …]
1 # SPDX-License-Identifier: GPL-2.0-only12 x86 platforms, including vendor-specific laptop extension drivers.23 This driver adds support for the ACPI-WMI (Windows Management26 ACPI-WMI is a proprietary extension to ACPI to expose parts of the27 ACPI firmware to userspace - this is done through various vendor38 any ACPI-WMI devices.45 Say Y here if you want to be able to read a firmware-embedded50 be called wmi-bmof.62 USB MCU such as the X51 and X51-R2.76 control, fn-lock, mic-mute LED, and other extra features.[all …]
1 /* SPDX-License-Identifier: GPL-2.0-or-later */4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)9 * Low-level exception handlers and MMU support16 * This file contains the entry point for the 64-bit kernel along17 * with some early initialization code common to all 64-bit powerpc27 #include <asm/head-64.h>28 #include <asm/asm-offsets.h>41 #include <asm/ppc-opcode.h>43 #include <asm/feature-fixups.h>47 * using the layout described in exceptions-64s.S[all …]
3 Written 1999-2000 by Donald Becker.19 [link no longer provides useful info -jgarzik]27 /* The user-configurable values.30 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).34 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.37 need a copy-align. */45 100mbps_hd 100Mbps half duplex.46 100mbps_fd 100Mbps full duplex.50 3 100Mbps half duplex.51 4 100Mbps full duplex.[all …]
... not a power of 2, using %zu printf-buffer-size-not-power-2 Performance
... not a power of 2, using %zu printf-buffer-size-not-power-2 Performance ...
1 // SPDX-License-Identifier: GPL-2.0-only3 * wm5100.c -- WM5100 ALSA SoC Audio driver5 * Copyright 2011-2 Wolfson Microelectronics plc127 dev_err(component->dev, "Unsupported sample rate: %dHz\n", rate); in wm5100_alloc_sr()128 return -EINVAL; in wm5100_alloc_sr()132 if ((wm5100->sysclk % rate) == 0) { in wm5100_alloc_sr()134 sr_free = -1; in wm5100_alloc_sr()136 if (!wm5100->sr_ref[i] && sr_free == -1) { in wm5100_alloc_sr()146 wm5100->sr_ref[i]++; in wm5100_alloc_sr()147 dev_dbg(component->dev, "SR %dHz, slot %d, ref %d\n", in wm5100_alloc_sr()[all …]