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Searched refs:VPU_MIU1BASE_ADDR (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/vpu/
H A DhalVPU.c118 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/vpu/
H A DhalVPU.c118 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/vpu/
H A DhalVPU.c118 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/vpu/
H A DhalVPU.c118 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/vpu/
H A DhalVPU.c118 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/vpu/
H A DhalVPU.c118 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/vpu_ex/
H A DhalVPU_EX.c146 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2328 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/vpu_ex/
H A DhalVPU_EX.c147 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1910 u32BsVpuAddr= (u32BSAddr - HAL_MIU1_BASE) + VPU_MIU1BASE_ADDR; in HAL_VPU_EX_CPUSetting()
2420 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/vpu_ex/
H A DhalVPU_EX.c147 #define VPU_MIU1BASE_ADDR 0x40000000 //Notice: this define must be comfirm with designer macro
1910 u32BsVpuAddr= (u32BSAddr - HAL_MIU1_BASE) + VPU_MIU1BASE_ADDR; in HAL_VPU_EX_CPUSetting()
2420 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/
H A DhalVPU_EX.c164 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
2324 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2325 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2979 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/
H A DhalVPU_EX.c171 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
2465 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2466 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
3130 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DhalVPU_EX.c158 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
3133 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DhalVPU_EX.c173 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
3309 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DhalVPU_EX.c173 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
3260 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DhalVPU_EX.c158 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
3134 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DhalVPU_EX.c165 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
3130 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DhalVPU_EX.c173 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
3407 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DhalVPU_EX.c173 #define VPU_MIU1BASE_ADDR 0x40000000UL //Notice: this define must be comfirm with designer macro
3425 return VPU_MIU1BASE_ADDR; in HAL_VPU_EX_MIU1BASE()

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