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Searched refs:TSP_CLKGEN2_REG (Results 1 – 14 of 14) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c499 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = (TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) & ~REG_CLKGEN2_STC2… in HAL_TSP_Power()
502 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = (TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) & ~REG_CLKGEN2_STC3… in HAL_TSP_Power()
605 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
606 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
2286 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_STC_Init()
2287 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_STC_Init()
2299 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = 0x0000; in HAL_TSP_STC_Init()
2300 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = 0x2800; in HAL_TSP_STC_Init()
2301 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) = 0x0000; in HAL_TSP_STC_Init()
2302 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H) = 0x2800; in HAL_TSP_STC_Init()
[all …]
H A DregTSP.h226 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x1400 + ((addr)<<2)))) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DhalTSP.c268 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL)))) macro
1972 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4) & ~(REG_CLKGEN0_TSN_C… in HAL_TSP_TsOutPadCfg()
2284 …u32data = TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN2_TSN_CL… in HAL_TSP_SelPad_ClkInv()
2286 TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()
3423 …*pu16Clk = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) >> REG_CLKGEN2_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()
3629 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H)); in HAL_TSP_GetSTCSynth()
3631 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H)); in HAL_TSP_GetSTCSynth()
3670 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
3671 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3672 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DhalTSP.c268 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL)))) macro
1972 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4) & ~(REG_CLKGEN0_TSN_C… in HAL_TSP_TsOutPadCfg()
2284 …u32data = TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN2_TSN_CL… in HAL_TSP_SelPad_ClkInv()
2286 TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()
3406 …*pu16Clk = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) >> REG_CLKGEN2_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()
3612 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H)); in HAL_TSP_GetSTCSynth()
3614 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H)); in HAL_TSP_GetSTCSynth()
3653 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
3654 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3655 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DhalTSP.c272 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL)))) macro
2033 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
2355 …u32data = TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN2_TSN_CL… in HAL_TSP_SelPad_ClkInv()
2357 TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()
3502 …*pu16Clk = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) >> REG_CLKGEN2_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()
3708 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H)); in HAL_TSP_GetSTCSynth()
3710 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H)); in HAL_TSP_GetSTCSynth()
3749 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
3750 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3751 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DhalTSP.c272 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL)))) macro
1994 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
2316 …u32data = TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN2_TSN_CL… in HAL_TSP_SelPad_ClkInv()
2318 TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()
3463 …*pu16Clk = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) >> REG_CLKGEN2_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()
3669 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H)); in HAL_TSP_GetSTCSynth()
3671 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H)); in HAL_TSP_GetSTCSynth()
3710 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
3711 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3712 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c616 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = (TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) & ~REG_CLKGEN2_STC2… in HAL_TSP_Power()
619 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = (TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) & ~REG_CLKGEN2_STC3… in HAL_TSP_Power()
714 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
716 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
3950 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_STC_Init()
3951 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_STC_Init()
3959 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = 0x0000; in HAL_TSP_STC_Init()
3960 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = 0x2800; in HAL_TSP_STC_Init()
3961 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) = 0x0000; in HAL_TSP_STC_Init()
3962 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H) = 0x2800; in HAL_TSP_STC_Init()
[all …]
H A DregTSP.h165 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x1400 + ((addr)<<2)))) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DhalTSP.c267 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL)))) macro
1946 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
2231 …u32data = TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN2_TSN_CL… in HAL_TSP_SelPad_ClkInv()
2233 TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()
3237 …*pu16Clk = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) >> REG_CLKGEN2_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()
5495 _u16Clkgen2RegArray[0x0d] = TSP_CLKGEN2_REG(0x0d); in HAL_TSP_SaveRegs()
5496 _u16Clkgen2RegArray[0x10] = TSP_CLKGEN2_REG(0x10); in HAL_TSP_SaveRegs()
5497 _u16Clkgen2RegArray[0x11] = TSP_CLKGEN2_REG(0x11); in HAL_TSP_SaveRegs()
5498 _u16Clkgen2RegArray[0x18] = TSP_CLKGEN2_REG(0x18); in HAL_TSP_SaveRegs()
5499 _u16Clkgen2RegArray[0x19] = TSP_CLKGEN2_REG(0x19); in HAL_TSP_SaveRegs()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DhalTSP.c253 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL)))) macro
1924 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
2209 …u32data = TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN2_TSN_CL… in HAL_TSP_SelPad_ClkInv()
2211 TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()
3211 …*pu16Clk = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) >> REG_CLKGEN2_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h165 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x1400 + ((addr)<<2)))) macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h166 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x1400 + ((addr)<<2)))) macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h166 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x1400 + ((addr)<<2)))) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h166 #define TSP_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x1400 + ((addr)<<2)))) macro