Lines Matching refs:TSP_CLKGEN2_REG

616TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = (TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) & ~REG_CLKGEN2_STC2…  in HAL_TSP_Power()
619TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = (TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) & ~REG_CLKGEN2_STC3… in HAL_TSP_Power()
714TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
716TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
3950 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_STC_Init()
3951 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_STC_Init()
3959 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = 0x0000; in HAL_TSP_STC_Init()
3960 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = 0x2800; in HAL_TSP_STC_Init()
3961 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) = 0x0000; in HAL_TSP_STC_Init()
3962 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H) = 0x2800; in HAL_TSP_STC_Init()
3971 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_STC_Init()
3972 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC2_CW_EN; in HAL_TSP_STC_Init()
3973 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_STC_Init()
3974 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_STC_Init()
3975 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC3_CW_EN; in HAL_TSP_STC_Init()
3976 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_STC_Init()
4013 *u32Sync = TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L); in HAL_TSP_GetSTCSynth()
4014 *u32Sync |= TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
4018 *u32Sync = TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L); in HAL_TSP_GetSTCSynth()
4019 *u32Sync |= TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
4056 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
4059 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = u32Sync & 0xFFFF; in HAL_TSP_SetSTCSynth()
4060 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
4063 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_SetSTCSynth()
4064 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC2_CW_EN; in HAL_TSP_SetSTCSynth()
4065 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_SetSTCSynth()
4069 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_SetSTCSynth()
4072 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) = u32Sync & 0xFFFF; in HAL_TSP_SetSTCSynth()
4073 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
4076 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_SetSTCSynth()
4077 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC3_CW_EN; in HAL_TSP_SetSTCSynth()
4078 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_SetSTCSynth()