Lines Matching refs:TSP_CLKGEN2_REG

272 #define TSP_CLKGEN2_REG(addr)       (*((volatile MS_U16*)(_virtRegBase + 0x1400UL + ((addr)<<2UL))))  macro
1994TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
2316 …u32data = TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN2_TSN_CL… in HAL_TSP_SelPad_ClkInv()
2318 TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()
3463 …*pu16Clk = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_CLKFI) >> REG_CLKGEN2_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()
3669 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H)); in HAL_TSP_GetSTCSynth()
3671 … return (TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) | TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H)); in HAL_TSP_GetSTCSynth()
3710 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
3711 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3712 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC2_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
3713 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC2_CW_EN; in HAL_TSP_SetSTCSynth()
3714 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) |= REG_CLKGEN2_STC2_CW_EN; in HAL_TSP_SetSTCSynth()
3715 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC2_CW_EN; in HAL_TSP_SetSTCSynth()
3716 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) |= REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
3719 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_SetSTCSynth()
3720 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()
3721 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_STC3_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
3722 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC3_CW_EN; in HAL_TSP_SetSTCSynth()
3723 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) |= REG_CLKGEN2_STC3_CW_EN; in HAL_TSP_SetSTCSynth()
3724 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) &= ~REG_CLKGEN2_STC3_CW_EN; in HAL_TSP_SetSTCSynth()
3725 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYNTH) |= REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_SetSTCSynth()
6289 _u16Clkgen2RegArray[0x0d] = TSP_CLKGEN2_REG(0x0d); in HAL_TSP_SaveRegs()
6290 _u16Clkgen2RegArray[0x10] = TSP_CLKGEN2_REG(0x10); in HAL_TSP_SaveRegs()
6291 _u16Clkgen2RegArray[0x11] = TSP_CLKGEN2_REG(0x11); in HAL_TSP_SaveRegs()
6292 _u16Clkgen2RegArray[0x18] = TSP_CLKGEN2_REG(0x18); in HAL_TSP_SaveRegs()
6293 _u16Clkgen2RegArray[0x19] = TSP_CLKGEN2_REG(0x19); in HAL_TSP_SaveRegs()
6341 TSP_CLKGEN2_REG(0x0d) = _u16Clkgen2RegArray[0x0d]; in HAL_TSP_RestoreRegs()
6342 TSP_CLKGEN2_REG(0x10) = _u16Clkgen2RegArray[0x10]; in HAL_TSP_RestoreRegs()
6343 TSP_CLKGEN2_REG(0x11) = _u16Clkgen2RegArray[0x11]; in HAL_TSP_RestoreRegs()
6344 TSP_CLKGEN2_REG(0x18) = _u16Clkgen2RegArray[0x18]; in HAL_TSP_RestoreRegs()
6345 TSP_CLKGEN2_REG(0x19) = _u16Clkgen2RegArray[0x19]; in HAL_TSP_RestoreRegs()