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Searched refs:TSO_CONFIG1 (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c1135 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)); in HAL_TSO_Cfg1_Enable()
1146 _HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), (u16data | TSO_CFG1_PKT_PARAM_LD)); in HAL_TSO_Cfg1_Enable()
1147 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_Cfg1_Enable()
1314 *pbEnable = ((_HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)) & u16data) == u16data); in HAL_TSO_Get_ChIf_Cfg()
1367 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1368 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1386 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1387 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1540 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PK… in HAL_TSO_RW_OutputPktSize()
1541 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), RESET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_… in HAL_TSO_RW_OutputPktSize()
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H A DregTSO.h427 REG16_TSO TSO_CONFIG1; //1d member
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c1135 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)); in HAL_TSO_Cfg1_Enable()
1146 _HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), (u16data | TSO_CFG1_PKT_PARAM_LD)); in HAL_TSO_Cfg1_Enable()
1147 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_Cfg1_Enable()
1314 *pbEnable = ((_HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)) & u16data) == u16data); in HAL_TSO_Get_ChIf_Cfg()
1367 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1368 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1386 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1387 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1540 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PK… in HAL_TSO_RW_OutputPktSize()
1541 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), RESET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_… in HAL_TSO_RW_OutputPktSize()
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H A DregTSO.h427 REG16_TSO TSO_CONFIG1; //1d member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c1167 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)); in HAL_TSO_Cfg1_Enable()
1178 _HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), (u16data | TSO_CFG1_PKT_PARAM_LD)); in HAL_TSO_Cfg1_Enable()
1179 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_Cfg1_Enable()
1348 *pbEnable = ((_HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)) & u16data) == u16data); in HAL_TSO_Get_ChIf_Cfg()
1401 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1402 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1420 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1421 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1574 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PK… in HAL_TSO_RW_OutputPktSize()
1575 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), RESET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_… in HAL_TSO_RW_OutputPktSize()
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H A DregTSO.h427 REG16_TSO TSO_CONFIG1; //1d member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c1173 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)); in HAL_TSO_Cfg1_Enable()
1184 _HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), (u16data | TSO_CFG1_PKT_PARAM_LD)); in HAL_TSO_Cfg1_Enable()
1185 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_Cfg1_Enable()
1354 *pbEnable = ((_HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)) & u16data) == u16data); in HAL_TSO_Get_ChIf_Cfg()
1407 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1408 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1426 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1427 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1580 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PK… in HAL_TSO_RW_OutputPktSize()
1581 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), RESET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_… in HAL_TSO_RW_OutputPktSize()
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H A DregTSO.h442 REG16_TSO TSO_CONFIG1; //1d member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c1176 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)); in HAL_TSO_Cfg1_Enable()
1187 _HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), (u16data | TSO_CFG1_PKT_PARAM_LD)); in HAL_TSO_Cfg1_Enable()
1188 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_Cfg1_Enable()
1357 *pbEnable = ((_HAL_REG16_R(&(_TSOCtrl->TSO_CONFIG1)) & u16data) == u16data); in HAL_TSO_Get_ChIf_Cfg()
1410 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1411 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_ValidBlock_Count()
1429 _REG16_SET(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1430 _REG16_CLR(&(_TSOCtrl[u8Eng].TSO_CONFIG1), TSO_CFG1_PKT_PARAM_LD); in HAL_TSO_RW_InvalidBlock_Count()
1583 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PK… in HAL_TSO_RW_OutputPktSize()
1584 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), RESET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_… in HAL_TSO_RW_OutputPktSize()
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H A DregTSO.h446 REG16_TSO TSO_CONFIG1; //1d member