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Searched refs:REG_CLKGEN0_TSP_SRC_192MHZ (Results 1 – 14 of 14) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h138 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0003 macro
H A DhalTSP.c490 | (REG_CLKGEN0_TSP_SRC_192MHZ << REG_CLKGEN0_TSP_SRC_SHIFT); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h121 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
H A DhalTSP.c446 | (REG_CLKGEN0_TSP_SRC_192MHZ << REG_CLKGEN0_TSP_SRC_SHIFT); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h130 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
H A DhalTSP.c595 | (REG_CLKGEN0_TSP_SRC_192MHZ << REG_CLKGEN0_TSP_SRC_SHIFT); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h130 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h127 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h128 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h128 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h127 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
H A DhalTSP.c606 | (REG_CLKGEN0_TSP_SRC_192MHZ << REG_CLKGEN0_TSP_SRC_SHIFT); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h128 #define REG_CLKGEN0_TSP_SRC_192MHZ 0x0000 macro
H A DhalTSP.c519 | (REG_CLKGEN0_TSP_SRC_192MHZ << REG_CLKGEN0_TSP_SRC_SHIFT); in HAL_TSP_Power()