Searched refs:REG_CLKGEN0_TS1_SHIFT (Results 1 – 14 of 14) sorted by relevance
467 …S1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()501 … = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_TS_DISABLE << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()791 …_TS1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) in HAL_TSP_TSIF_SelPad()792 … | (clk_src<<(REG_CLKGEN0_TS1_SHIFT+REG_CLKGEN0_TS_SRC_SHIFT)); in HAL_TSP_TSIF_SelPad()869 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()886 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()908 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()925 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()5019 …P_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ((REG_CLKGEN0_TS_SRC_MASK)<<(REG_CLKGEN0_TS1_SHIFT+REG_CLKGEN… in HAL_TSP_GetTSIF_Status()5020 u16clk >>= (REG_CLKGEN0_TS1_SHIFT+REG_CLKGEN0_TS_SRC_SHIFT); in HAL_TSP_GetTSIF_Status()[all …]
89 #define REG_CLKGEN0_TS1_SHIFT 8 macro
526 …S1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()620 … = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_TS_DISABLE << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()887 …(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) | (clk_src<<(REG_CLKGEN0_TS… in HAL_TSP_TSIF_SelPad()934 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()963 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1016 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1062 …N0_REG(REG_CLKGEN0_TS1_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) >> (REG_CLKGEN0_TS1_SH… in HAL_TSP_TSIF_SelPad_ClkDis()1099 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
94 #define REG_CLKGEN0_TS1_SHIFT 8 macro
616 …S1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()705 … = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_TS_DISABLE << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()1108 …_TS1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) in HAL_TSP_TSIF_SelPad()1109 … | (clk_src<<(REG_CLKGEN0_TS1_SHIFT+REG_CLKGEN0_TS_SRC_SHIFT)); in HAL_TSP_TSIF_SelPad()1443 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1463 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1513 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1552 …N0_REG(REG_CLKGEN0_TS1_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) >> (REG_CLKGEN0_TS1_SH… in HAL_TSP_TSIF_SelPad_ClkDis()1606 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
100 #define REG_CLKGEN0_TS1_SHIFT 8 macro
540 …S1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()629 … = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_TS_DISABLE << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()1050 …(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) | (clk_src<<(REG_CLKGEN0_TS… in HAL_TSP_TSIF_SelPad()1377 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1397 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1447 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1486 …N0_REG(REG_CLKGEN0_TS1_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) >> (REG_CLKGEN0_TS1_SH… in HAL_TSP_TSIF_SelPad_ClkDis()1540 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
96 #define REG_CLKGEN0_TS1_SHIFT 8 macro
634 …S1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()728 … = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_TS_DISABLE << REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_Power()1139 …_TS1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) in HAL_TSP_TSIF_SelPad()1140 … | (clk_src<<(REG_CLKGEN0_TS1_SHIFT+REG_CLKGEN0_TS_SRC_SHIFT)); in HAL_TSP_TSIF_SelPad()1474 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1494 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1544 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1583 …N0_REG(REG_CLKGEN0_TS1_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) >> (REG_CLKGEN0_TS1_SH… in HAL_TSP_TSIF_SelPad_ClkDis()1637 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()