Searched refs:REG_CLKGEN0_TS0_CLK (Results 1 – 14 of 14) sorted by relevance
464 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MAS… in HAL_TSP_Power()499 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()786 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()866 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()883 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()905 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()922 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()5008 …u16clk = TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ((REG_CLKGEN0_TS_SRC_MASK)<<(REG_CLKGEN0_TS0_SHIFT… in HAL_TSP_GetTSIF_Status()5013 …*pbClkInv =(((TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) >> REG_CLKGEN0_TS0_SHIFT)& REG_CLKGEN0_TS_INVER… in HAL_TSP_GetTSIF_Status()
86 #define REG_CLKGEN0_TS0_CLK 0x28 macro
525 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()619 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()884 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()931 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()960 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1013 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1059 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS0_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()1096 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
91 #define REG_CLKGEN0_TS0_CLK 0x28 macro
613 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MAS… in HAL_TSP_Power()703 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()1098 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()1440 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1460 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1510 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1548 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & REG_CLKGEN0_TS_MASK) >> (REG_CLKGEN0_TS0_SHIFT… in HAL_TSP_TSIF_SelPad_ClkDis()1603 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
97 #define REG_CLKGEN0_TS0_CLK 0x28 macro
537 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MAS… in HAL_TSP_Power()627 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()1040 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()1374 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1394 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1444 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1482 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & REG_CLKGEN0_TS_MASK) >> (REG_CLKGEN0_TS0_SHIFT… in HAL_TSP_TSIF_SelPad_ClkDis()1537 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
93 #define REG_CLKGEN0_TS0_CLK 0x28 macro
631 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MAS… in HAL_TSP_Power()726 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()1129 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()1471 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1491 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1541 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1579 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & REG_CLKGEN0_TS_MASK) >> (REG_CLKGEN0_TS0_SHIFT… in HAL_TSP_TSIF_SelPad_ClkDis()1634 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()