Home
last modified time | relevance | path

Searched refs:REG_CLKGEN0_STC1_SHIFT (Results 1 – 14 of 14) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h150 #define REG_CLKGEN0_STC1_SHIFT 12 macro
H A DhalTSP.c497 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
604 …= _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0_STC_DISABLE << REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h133 #define REG_CLKGEN0_STC1_SHIFT 12 macro
H A DhalTSP.c453 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
489 …= _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0_STC_DISABLE << REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h142 #define REG_CLKGEN0_STC1_SHIFT 12 macro
H A DhalTSP.c602 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
693 …= _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0_STC_DISABLE << REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h142 #define REG_CLKGEN0_STC1_SHIFT 12 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h139 #define REG_CLKGEN0_STC1_SHIFT 12 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h140 #define REG_CLKGEN0_STC1_SHIFT 12 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h140 #define REG_CLKGEN0_STC1_SHIFT 12 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h139 #define REG_CLKGEN0_STC1_SHIFT 12 macro
H A DhalTSP.c614 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
712 …= _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0_STC_DISABLE << REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h140 #define REG_CLKGEN0_STC1_SHIFT 12 macro
H A DhalTSP.c526 | (REG_CLKGEN0_STC_SRC_SYNTH << (REG_CLKGEN0_STC_SRC_SHIFT+REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()
617 …= _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0_STC_DISABLE << REG_CLKGEN0_STC1_SHIFT)); in HAL_TSP_Power()