Home
last modified time | relevance | path

Searched refs:REG_CLKGEN0_STC1_CW_EN (Results 1 – 21 of 21) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c2741 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
2742 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_STC_Init()
2743 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
2807 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
2808 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
2809 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
H A DregTSP.h78 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c2316 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
2317 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_STC_Init()
2318 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
2430 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
2431 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
2432 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
H A DregTSP.h72 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c3645 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
3646 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_STC_Init()
3647 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
3711 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
3712 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3713 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
H A DregTSP.h79 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c3814 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
3815 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_STC_Init()
3816 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
3880 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
3881 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3882 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
H A DregTSP.h75 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c3968 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
3969 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_STC_Init()
3970 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
4050 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
4051 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
4052 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
H A DregTSP.h75 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DhalTSP.c222 #define REG_CLKGEN0_STC1_CW_EN 0x0004UL macro
3416 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH1) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3417 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH1) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3418 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH1) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DhalTSP.c221 #define REG_CLKGEN0_STC1_CW_EN 0x0400UL macro
3664 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3665 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3666 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DhalTSP.c221 #define REG_CLKGEN0_STC1_CW_EN 0x0400UL macro
3647 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3648 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3649 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DhalTSP.c221 #define REG_CLKGEN0_STC1_CW_EN 0x0400UL macro
3743 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3744 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3745 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DhalTSP.c221 #define REG_CLKGEN0_STC1_CW_EN 0x0400UL macro
3704 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3705 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
3706 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h79 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h75 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h75 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h75 #define REG_CLKGEN0_STC1_CW_EN 0x0400 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DhalTSP.c202 #define REG_CLKGEN0_STC1_CW_EN 0x0400UL macro
3399 u32value = ((u32EngId == 0) ? REG_CLKGEN0_STC_CW_EN : REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_Stc_ctrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DhalTSP.c216 #define REG_CLKGEN0_STC1_CW_EN 0x0400UL macro
3425 u32value = ((u32EngId == 0) ? REG_CLKGEN0_STC_CW_EN : REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_Stc_ctrl()