| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 77 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| H A D | halTSP.c | 2298 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = 0x2800; in HAL_TSP_STC_Init()
2369 *u32Sync |= TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
2427 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/ |
| H A D | halTSP.c | 2735 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = 0x2800; in HAL_TSP_STC_Init()
2776 *u32Sync |= TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
2804 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
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| H A D | regTSP.h | 82 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | halTSP.c | 224 #define REG_CLKGEN0_DC0_STC1_CW_H 0x72UL macro
3379 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H)); in HAL_TSP_GetSTCSynth()
3415 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/ |
| H A D | regTSP.h | 83 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| H A D | halTSP.c | 3639 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = 0x2800; in HAL_TSP_STC_Init()
3680 *u32Sync |= TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
3708 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | regTSP.h | 83 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | halTSP.c | 225 #define REG_CLKGEN0_DC0_STC1_CW_H 0x08UL macro
3627 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H)); in HAL_TSP_GetSTCSynth()
3663 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | halTSP.c | 225 #define REG_CLKGEN0_DC0_STC1_CW_H 0x08UL macro
3610 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H)); in HAL_TSP_GetSTCSynth()
3646 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | halTSP.c | 225 #define REG_CLKGEN0_DC0_STC1_CW_H 0x08UL macro
3706 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H)); in HAL_TSP_GetSTCSynth()
3742 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | halTSP.c | 225 #define REG_CLKGEN0_DC0_STC1_CW_H 0x08UL macro
3667 … return (TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) | TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H)); in HAL_TSP_GetSTCSynth()
3703 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | regTSP.h | 80 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | regTSP.h | 80 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | regTSP.h | 80 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/ |
| H A D | regTSP.h | 80 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| H A D | halTSP.c | 3958 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = 0x2800; in HAL_TSP_STC_Init()
4009 *u32Sync |= TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
4047 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/ |
| H A D | halTSP.c | 3808 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = 0x2800; in HAL_TSP_STC_Init()
3849 *u32Sync |= TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
3877 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
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| H A D | regTSP.h | 80 #define REG_CLKGEN0_DC0_STC1_CW_H 0x09 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | halTSP.c | 206 #define REG_CLKGEN0_DC0_STC1_CW_H 0x08UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | halTSP.c | 220 #define REG_CLKGEN0_DC0_STC1_CW_H 0x08UL macro
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