| /utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/ |
| H A D | regCPU.h | 153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/ |
| H A D | regCPU.h | 148 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/ |
| H A D | regCPU.h | 153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/ |
| H A D | regCPU.h | 153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/ |
| H A D | regCPU.h | 148 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC + 0x0026) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/ |
| H A D | regCPU.h | 152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/ |
| H A D | regCPU.h | 152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/ |
| H A D | regCPU.h | 153 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/ |
| H A D | regCPU.h | 152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/ |
| H A D | regCPU.h | 152 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/manhattan/cpu/ |
| H A D | regCPU.h | 181 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/macan/cpu/ |
| H A D | regCPU.h | 181 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/maxim/cpu/ |
| H A D | regCPU.h | 191 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/maserati/cpu/ |
| H A D | regCPU.h | 194 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/M7621/cpu/ |
| H A D | regCPU.h | 191 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/M7821/cpu/ |
| H A D | regCPU.h | 192 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0026UL) macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/ |
| H A D | halTSO.c | 596 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
602 u32Speed = (MS_U32)((volatile MS_U16*)(_u32TSORegBase))[NPM_REG_MIPS_PLLCLK];
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/ |
| H A D | halTSO.c | 596 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
602 u32Speed = (MS_U32)((volatile MS_U16*)(_u32TSORegBase))[NPM_REG_MIPS_PLLCLK];
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/ |
| H A D | halTSO.c | 599 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
605 u32Speed = (MS_U32)((volatile MS_U16*)(_u32TSORegBase))[NPM_REG_MIPS_PLLCLK];
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/ |
| H A D | halTSO.c | 597 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
603 u32Speed = (MS_U32)((volatile MS_U16*)(_u32TSORegBase))[NPM_REG_MIPS_PLLCLK];
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/ |
| H A D | halTSO.c | 600 #define NPM_REG_MIPS_PLLCLK (NPM_REG_ANAMISC+0x0002)
606 u32Speed = (MS_U32)((volatile MS_U16*)(_u32TSORegBase))[NPM_REG_MIPS_PLLCLK];
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