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Searched refs:INTERN_DVBT_DSPREG (Results 1 – 15 of 15) sorted by relevance

/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBT.c284 MS_U8 INTERN_DVBT_DSPREG[] = variable
375 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
376 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBT.c282 MS_U8 INTERN_DVBT_DSPREG[] = variable
373 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
374 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBT.c283 MS_U8 INTERN_DVBT_DSPREG[] = variable
374 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
375 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/
H A DhalDMD_INTERN_DVBT.c282 MS_U8 INTERN_DVBT_DSPREG[] = variable
373 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
374 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_DVBT.c284 MS_U8 INTERN_DVBT_DSPREG[] = variable
384 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
385 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/
H A DhalDMD_INTERN_DVBT.c283 MS_U8 INTERN_DVBT_DSPREG[] = variable
374 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
375 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBT.c285 MS_U8 INTERN_DVBT_DSPREG[] = variable
385 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
386 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/
H A DhalDMD_INTERN_DVBT.c288 MS_U8 INTERN_DVBT_DSPREG[] = variable
379 for (idx = 0; idx<sizeof(INTERN_DVBT_DSPREG); idx++) in INTERN_DVBT_DSPReg_Init()
380 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBT_DSPREG[idx]); in INTERN_DVBT_DSPReg_Init()