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Searched refs:HwInt_Stat (Results 1 – 25 of 36) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DhalTSP.c1964 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
2355 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
2356 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Disable()
2361 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
2362 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Enable()
2381 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
2382 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h736 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DhalTSP.c1988 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
2378 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
2379 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Disable()
2384 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
2385 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Enable()
2404 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
2405 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h732 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DhalTSP.c1965 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
2359 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
2360 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Disable()
2365 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
2366 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Enable()
2385 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
2386 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h736 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DhalTSP.c2762 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
3336 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
3337 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Disable()
3347 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
3348 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8))); in HAL_TSP_Int_Enable()
3375 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
3376 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h856 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DhalTSP.c2973 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
3670 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
3671 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Disable()
3681 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
3682 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00UL, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Enable()
3709 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
3710 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h853 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DhalTSP.c3008 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
3708 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
3709 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Disable()
3719 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
3720 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00UL, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Enable()
3747 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
3748 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h862 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DhalTSP.c2944 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
3733 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
3734 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Disable()
3744 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
3745 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00UL, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Enable()
3772 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
3773 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h884 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DhalTSP.c3164 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
3993 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
3994 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Disable()
4004 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
4005 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00UL, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Enable()
4032 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
4033 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DhalTSP.c3164 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
3976 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
3977 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Disable()
3987 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
3988 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00UL, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Enable()
4015 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
4016 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
H A DregTSP.h888 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DhalTSP.c3240 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
4072 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
4073 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Disable()
4083 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
4084 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00UL, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Enable()
4111 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
4112 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DhalTSP.c3201 return (MS_U32)(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat) & TSP_HWINT_STATUS_MASK); in HAL_TSP_HW_INT_STATUS()
4033 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Disable()
4034 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Disable()
4044 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_Enable()
4045 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xFF00UL, (MS_U16)(u32Mask>>8UL))); in HAL_TSP_Int_Enable()
4072 _HAL_REG16_W(&_TspCtrl[0].HwInt_Stat, in HAL_TSP_Int_ClearHw()
4073 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].HwInt_Stat)|0xff00, (MS_U16)u32Mask)); in HAL_TSP_Int_ClearHw()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c4334 REG16_SET(&_RegCtrl->HwInt_Stat, (TSP_HWINT_EN_MASK & u32Mask)); in HAL_TSP_INT_Enable()
4365 REG16_W(&_RegCtrl->HwInt_Stat, in HAL_TSP_INT_Disable()
4366 (REG16_R(&_RegCtrl->HwInt_Stat) & ~(TSP_HWINT_EN_MASK & (u32Mask)))); in HAL_TSP_INT_Disable()
4379 REG16_SET(&_RegCtrl->HwInt_Stat, ((u32Mask << TSP_HWINT_STATUS_SHIFT) & TSP_HWINT_STATUS_MASK)); in HAL_TSP_INT_ClrHW()
4380 REG16_CLR(&_RegCtrl->HwInt_Stat, ((u32Mask << TSP_HWINT_STATUS_SHIFT) & TSP_HWINT_STATUS_MASK)); in HAL_TSP_INT_ClrHW()
4400 …status |= ((MS_U32)((REG16_R(&_RegCtrl->HwInt_Stat) & TSP_HWINT_STATUS_MASK) >> TSP_HWINT_STATUS_S… in HAL_TSP_INT_GetHW()
H A DregTSP.h845 REG16 HwInt_Stat; // 0xbf802bf8 0x7e member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c6203 REG16_SET(&_RegCtrl->HwInt_Stat, (TSP_HWINT_EN_MASK & u32Mask) | TSP_HWINT_STATUS_MASK); in HAL_TSP_INT_Enable()
6234 REG16_W(&_RegCtrl->HwInt_Stat, in HAL_TSP_INT_Disable()
6235 … (REG16_R(&_RegCtrl->HwInt_Stat) & ~(TSP_HWINT_EN_MASK & (u32Mask))) | TSP_HWINT_STATUS_MASK); in HAL_TSP_INT_Disable()
6251 REG16_W(&_RegCtrl->HwInt_Stat, in HAL_TSP_INT_ClrHW()
6252 (REG16_R(&_RegCtrl->HwInt_Stat) & (~TSP_HWINT_STATUS_MASK)) | in HAL_TSP_INT_ClrHW()
6275 …status |= ((MS_U32)((REG16_R(&_RegCtrl->HwInt_Stat) & TSP_HWINT_STATUS_MASK) >> TSP_HWINT_STATUS_S… in HAL_TSP_INT_GetHW()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c6574 REG16_SET(&_RegCtrl->HwInt_Stat, (TSP_HWINT_EN_MASK & u32Mask) | TSP_HWINT_STATUS_MASK); in HAL_TSP_INT_Enable()
6605 REG16_W(&_RegCtrl->HwInt_Stat, in HAL_TSP_INT_Disable()
6606 (REG16_R(&_RegCtrl->HwInt_Stat) & ~(TSP_HWINT_EN_MASK & (u32Mask))) | in HAL_TSP_INT_Disable()
6625 REG16_W(&_RegCtrl->HwInt_Stat, in HAL_TSP_INT_ClrHW()
6626 (REG16_R(&_RegCtrl->HwInt_Stat) & (~TSP_HWINT_STATUS_MASK)) | in HAL_TSP_INT_ClrHW()
6647 …status |= ((MS_U32)((REG16_R(&_RegCtrl->HwInt_Stat) & TSP_HWINT_STATUS_MASK) >> TSP_HWINT_STATUS_S… in HAL_TSP_INT_GetHW()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c4636 REG16_SET(&_RegCtrl->HwInt_Stat, TSP_INT_EN_MASK & u32Mask); in HAL_TSP_INT_Enable()
4654 REG16_CLR(&_RegCtrl->HwInt_Stat, TSP_INT_EN_MASK & u32Mask); in HAL_TSP_INT_Disable()
4664 REG16_CLR(&_RegCtrl->HwInt_Stat, (u32Mask & 0x00FF) << 8); in HAL_TSP_INT_ClrHW()
4678 …status |= (MS_U32)((REG16_R(&_RegCtrl->HwInt_Stat) & TSP_HWINT_STATUS_MASK) >> TSP_HWINT_STATUS_SH… in HAL_TSP_INT_GetHW()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c6058 REG16_SET(&_RegCtrl->HwInt_Stat, TSP_INT_EN_MASK & u32Mask); in HAL_TSP_INT_Enable()
6076 REG16_CLR(&_RegCtrl->HwInt_Stat, TSP_INT_EN_MASK & u32Mask); in HAL_TSP_INT_Disable()
6086 REG16_CLR(&_RegCtrl->HwInt_Stat, (u32Mask & 0x00FF) << 8); in HAL_TSP_INT_ClrHW()
6100 …status |= ((MS_U32)((REG16_R(&_RegCtrl->HwInt_Stat) & TSP_HWINT_STATUS_MASK) >> TSP_HWINT_STATUS_S… in HAL_TSP_INT_GetHW()

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