| /utopia/UTPA2-700.0.x/mxlib/hal/mustang/ |
| H A D | halIRQTBL.h | 203 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
204 E_FIQ_16 = E_FIQH_START + 0,
205 E_FIQ_17 = E_FIQH_START + 1,
206 E_FIQ_18 = E_FIQH_START + 2,
207 E_FIQ_19 = E_FIQH_START + 3,
208 E_FIQ_20 = E_FIQH_START + 4,
209 E_FIQ_21 = E_FIQH_START + 5,
210 E_FIQ_22 = E_FIQH_START + 6,
211 E_FIQ_23 = E_FIQH_START + 7,
212 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| H A D | regCHIP.h | 171 #define FIQ_VIVALDI_STR (0x01 << (E_FIQ_16 - E_FIQH_START))
172 #define FIQ_VIVALDI_PTS (0x01 << (E_FIQ_17 - E_FIQH_START))
173 #define FIQ_DSP_MIU_PROT (0x01 << (E_FIQ_18 - E_FIQH_START))
174 #define FIQ_XIU_TIMEOUT (0x01 << (E_FIQ_19 - E_FIQH_START))
175 #define FIQ_DMDMCU2HK (0x01 << (E_FIQ_20 - E_FIQH_START))
176 #define FIQ_VSYNC_VE4VBI (0x01 << (E_FIQ_21 - E_FIQH_START))
177 #define FIQ_FIELD_VE4VBI (0x01 << (E_FIQ_22 - E_FIQH_START))
178 #define FIQ_VDMCU2HK (0x01 << (E_FIQ_23 - E_FIQH_START))
179 #define FIQ_VE_DONE_TT (0x01 << (E_FIQ_24 - E_FIQH_START))
180 #define FIQ_CMDQ (0x01 << (E_FIQ_25 - E_FIQH_START))
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/M7621/ |
| H A D | regCHIP.h | 210 #define FIQ_VIVALDI_STR (0x1 << (E_FIQ_VIVALDI_STR - E_FIQH_START) )
211 #define FIQ_VIVALDI_PTS (0x1 << (E_FIQ_VIVALDI_PTS - E_FIQH_START) )
212 #define FIQ_DSP_MIU_PROT (0x1 << (E_FIQ_DSP_MIU_PROT - E_FIQH_START) )
213 #define FIQ_XIU_TIMEOUT (0x1 << (E_FIQ_XIU_TIMEOUT - E_FIQH_START) )
214 #define FIQ_DMDMCU2HK (0x1 << (E_FIQ_DMDMCU2HK - E_FIQH_START) )
215 #define FIQ_VSYNC_VE4VBI (0x1 << (E_FIQ_VSYNC_VE4VBI - E_FIQH_START) )
216 #define FIQ_FIELD_VE4VBI (0x1 << (E_FIQ_FIELD_VE4VBI - E_FIQH_START) )
217 #define FIQ_VDMCU2HK (0x1 << (E_FIQ_VDMCU2HK - E_FIQH_START) )
218 #define FIQ_VE_DONE_TT (0x1 << (E_FIQ_VE_DONE_TT - E_FIQH_START) )
219 #define FIQ_INT_CCFL (0x1 << (E_FIQ_INT_CCFL - E_FIQH_START) )
[all …]
|
| H A D | halIRQTBL.h | 254 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
255 E_FIQ_16 = E_FIQH_START + 0,
256 E_FIQ_17 = E_FIQH_START + 1,
257 E_FIQ_18 = E_FIQH_START + 2,
258 E_FIQ_19 = E_FIQH_START + 3,
259 E_FIQ_20 = E_FIQH_START + 4,
260 E_FIQ_21 = E_FIQH_START + 5,
261 E_FIQ_22 = E_FIQH_START + 6,
262 E_FIQ_23 = E_FIQH_START + 7,
263 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/maxim/ |
| H A D | regCHIP.h | 206 #define FIQ_VIVALDI_STR (0x1 << (E_FIQ_VIVALDI_STR - E_FIQH_START) )
207 #define FIQ_VIVALDI_PTS (0x1 << (E_FIQ_VIVALDI_PTS - E_FIQH_START) )
208 #define FIQ_DSP_MIU_PROT (0x1 << (E_FIQ_DSP_MIU_PROT - E_FIQH_START) )
209 #define FIQ_XIU_TIMEOUT (0x1 << (E_FIQ_XIU_TIMEOUT - E_FIQH_START) )
210 #define FIQ_DMDMCU2HK (0x1 << (E_FIQ_DMDMCU2HK - E_FIQH_START) )
211 #define FIQ_VSYNC_VE4VBI (0x1 << (E_FIQ_VSYNC_VE4VBI - E_FIQH_START) )
212 #define FIQ_FIELD_VE4VBI (0x1 << (E_FIQ_FIELD_VE4VBI - E_FIQH_START) )
213 #define FIQ_VDMCU2HK (0x1 << (E_FIQ_VDMCU2HK - E_FIQH_START) )
214 #define FIQ_VE_DONE_TT (0x1 << (E_FIQ_VE_DONE_TT - E_FIQH_START) )
215 #define FIQ_INT_CCFL (0x1 << (E_FIQ_INT_CCFL - E_FIQH_START) )
[all …]
|
| H A D | halIRQTBL.h | 247 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
248 E_FIQ_16 = E_FIQH_START + 0,
249 E_FIQ_17 = E_FIQH_START + 1,
250 E_FIQ_18 = E_FIQH_START + 2,
251 E_FIQ_19 = E_FIQH_START + 3,
252 E_FIQ_20 = E_FIQH_START + 4,
253 E_FIQ_21 = E_FIQH_START + 5,
254 E_FIQ_22 = E_FIQH_START + 6,
255 E_FIQ_23 = E_FIQH_START + 7,
256 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/messi/ |
| H A D | regCHIP.h | 171 #define FIQ_VIVALDI_STR (0x01 << (E_FIQ_16 - E_FIQH_START))
172 #define FIQ_VIVALDI_PTS (0x01 << (E_FIQ_17 - E_FIQH_START))
173 #define FIQ_DSP_MIU_PROT (0x01 << (E_FIQ_18 - E_FIQH_START))
174 #define FIQ_XIU_TIMEOUT (0x01 << (E_FIQ_19 - E_FIQH_START))
175 #define FIQ_DMDMCU2HK (0x01 << (E_FIQ_20 - E_FIQH_START))
176 #define FIQ_VSYNC_VE4VBI (0x01 << (E_FIQ_21 - E_FIQH_START))
177 #define FIQ_FIELD_VE4VBI (0x01 << (E_FIQ_22 - E_FIQH_START))
178 #define FIQ_VDMCU2HK (0x01 << (E_FIQ_23 - E_FIQH_START))
179 #define FIQ_VE_DONE_TT (0x01 << (E_FIQ_24 - E_FIQH_START))
180 #define FIQ_UHC2 (0x01 << (E_FIQ_25 - E_FIQH_START))
[all …]
|
| H A D | halIRQTBL.h | 237 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
238 E_FIQ_16 = E_FIQH_START + 0,
239 E_FIQ_17 = E_FIQH_START + 1,
240 E_FIQ_18 = E_FIQH_START + 2,
241 E_FIQ_19 = E_FIQH_START + 3,
242 E_FIQ_20 = E_FIQH_START + 4,
243 E_FIQ_21 = E_FIQH_START + 5,
244 E_FIQ_22 = E_FIQH_START + 6,
245 E_FIQ_23 = E_FIQH_START + 7,
246 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/mainz/ |
| H A D | regCHIP.h | 171 #define FIQ_VIVALDI_STR (0x01 << (E_FIQ_16 - E_FIQH_START))
172 #define FIQ_VIVALDI_PTS (0x01 << (E_FIQ_17 - E_FIQH_START))
173 #define FIQ_DSP_MIU_PROT (0x01 << (E_FIQ_18 - E_FIQH_START))
174 #define FIQ_XIU_TIMEOUT (0x01 << (E_FIQ_19 - E_FIQH_START))
175 #define FIQ_DMDMCU2HK (0x01 << (E_FIQ_20 - E_FIQH_START))
176 #define FIQ_VSYNC_VE4VBI (0x01 << (E_FIQ_21 - E_FIQH_START))
177 #define FIQ_FIELD_VE4VBI (0x01 << (E_FIQ_22 - E_FIQH_START))
178 #define FIQ_VDMCU2HK (0x01 << (E_FIQ_23 - E_FIQH_START))
179 #define FIQ_VE_DONE_TT (0x01 << (E_FIQ_24 - E_FIQH_START))
180 #define FIQ_UHC2 (0x01 << (E_FIQ_25 - E_FIQH_START))
[all …]
|
| H A D | halIRQTBL.h | 237 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
238 E_FIQ_16 = E_FIQH_START + 0,
239 E_FIQ_17 = E_FIQH_START + 1,
240 E_FIQ_18 = E_FIQH_START + 2,
241 E_FIQ_19 = E_FIQH_START + 3,
242 E_FIQ_20 = E_FIQH_START + 4,
243 E_FIQ_21 = E_FIQH_START + 5,
244 E_FIQ_22 = E_FIQH_START + 6,
245 E_FIQ_23 = E_FIQH_START + 7,
246 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/manhattan/ |
| H A D | regCHIP.h | 206 #define FIQ_VIVALDI_STR (0x1 << (E_FIQ_VIVALDI_STR - E_FIQH_START) )
207 #define FIQ_VIVALDI_PTS (0x1 << (E_FIQ_VIVALDI_PTS - E_FIQH_START) )
208 #define FIQ_DSP_MIU_PROT (0x1 << (E_FIQ_DSP_MIU_PROT - E_FIQH_START) )
209 #define FIQ_XIU_TIMEOUT (0x1 << (E_FIQ_XIU_TIMEOUT - E_FIQH_START) )
210 #define FIQ_DMDMCU2HK (0x1 << (E_FIQ_DMDMCU2HK - E_FIQH_START) )
211 #define FIQ_VSYNC_VE4VBI (0x1 << (E_FIQ_VSYNC_VE4VBI - E_FIQH_START) )
212 #define FIQ_FIELD_VE4VBI (0x1 << (E_FIQ_FIELD_VE4VBI - E_FIQH_START) )
213 #define FIQ_VDMCU2HK (0x1 << (E_FIQ_VDMCU2HK - E_FIQH_START) )
214 #define FIQ_VE_DONE_TT (0x1 << (E_FIQ_VE_DONE_TT - E_FIQH_START) )
215 #define FIQ_INT_CCFL (0x1 << (E_FIQ_INT_CCFL - E_FIQH_START) )
[all …]
|
| H A D | halIRQTBL.h | 247 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
248 E_FIQ_16 = E_FIQH_START + 0,
249 E_FIQ_17 = E_FIQH_START + 1,
250 E_FIQ_18 = E_FIQH_START + 2,
251 E_FIQ_19 = E_FIQH_START + 3,
252 E_FIQ_20 = E_FIQH_START + 4,
253 E_FIQ_21 = E_FIQH_START + 5,
254 E_FIQ_22 = E_FIQH_START + 6,
255 E_FIQ_23 = E_FIQH_START + 7,
256 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/marcus/ |
| H A D | regCHIP.h | 206 #define FIQ_VIVALDI_STR (0x1 << (E_FIQ_VIVALDI_STR - E_FIQH_START) )
207 #define FIQ_VIVALDI_PTS (0x1 << (E_FIQ_VIVALDI_PTS - E_FIQH_START) )
208 #define FIQ_DSP_MIU_PROT (0x1 << (E_FIQ_DSP_MIU_PROT - E_FIQH_START) )
209 #define FIQ_XIU_TIMEOUT (0x1 << (E_FIQ_XIU_TIMEOUT - E_FIQH_START) )
210 #define FIQ_DMDMCU2HK (0x1 << (E_FIQ_DMDMCU2HK - E_FIQH_START) )
211 #define FIQ_VSYNC_VE4VBI (0x1 << (E_FIQ_VSYNC_VE4VBI - E_FIQH_START) )
212 #define FIQ_FIELD_VE4VBI (0x1 << (E_FIQ_FIELD_VE4VBI - E_FIQH_START) )
213 #define FIQ_VDMCU2HK (0x1 << (E_FIQ_VDMCU2HK - E_FIQH_START) )
214 #define FIQ_VE_DONE_TT (0x1 << (E_FIQ_VE_DONE_TT - E_FIQH_START) )
215 #define FIQ_INT_CCFL (0x1 << (E_FIQ_INT_CCFL - E_FIQH_START) )
[all …]
|
| H A D | halIRQTBL.h | 247 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
248 E_FIQ_16 = E_FIQH_START + 0,
249 E_FIQ_17 = E_FIQH_START + 1,
250 E_FIQ_18 = E_FIQH_START + 2,
251 E_FIQ_19 = E_FIQH_START + 3,
252 E_FIQ_20 = E_FIQH_START + 4,
253 E_FIQ_21 = E_FIQH_START + 5,
254 E_FIQ_22 = E_FIQH_START + 6,
255 E_FIQ_23 = E_FIQH_START + 7,
256 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/M7821/ |
| H A D | regCHIP.h | 210 #define FIQ_VIVALDI_STR (0x1 << (E_FIQ_VIVALDI_STR - E_FIQH_START) )
211 #define FIQ_VIVALDI_PTS (0x1 << (E_FIQ_VIVALDI_PTS - E_FIQH_START) )
212 #define FIQ_DSP_MIU_PROT (0x1 << (E_FIQ_DSP_MIU_PROT - E_FIQH_START) )
213 #define FIQ_XIU_TIMEOUT (0x1 << (E_FIQ_XIU_TIMEOUT - E_FIQH_START) )
214 #define FIQ_DMDMCU2HK (0x1 << (E_FIQ_DMDMCU2HK - E_FIQH_START) )
215 #define FIQ_VSYNC_VE4VBI (0x1 << (E_FIQ_VSYNC_VE4VBI - E_FIQH_START) )
216 #define FIQ_FIELD_VE4VBI (0x1 << (E_FIQ_FIELD_VE4VBI - E_FIQH_START) )
217 #define FIQ_VDMCU2HK (0x1 << (E_FIQ_VDMCU2HK - E_FIQH_START) )
218 #define FIQ_VE_DONE_TT (0x1 << (E_FIQ_VE_DONE_TT - E_FIQH_START) )
219 #define FIQ_INT_CCFL (0x1 << (E_FIQ_INT_CCFL - E_FIQH_START) )
[all …]
|
| H A D | halIRQTBL.h | 254 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
255 E_FIQ_16 = E_FIQH_START + 0,
256 E_FIQ_17 = E_FIQH_START + 1,
257 E_FIQ_18 = E_FIQH_START + 2,
258 E_FIQ_19 = E_FIQH_START + 3,
259 E_FIQ_20 = E_FIQH_START + 4,
260 E_FIQ_21 = E_FIQH_START + 5,
261 E_FIQ_22 = E_FIQH_START + 6,
262 E_FIQ_23 = E_FIQH_START + 7,
263 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/maserati/ |
| H A D | regCHIP.h | 206 #define FIQ_VIVALDI_STR (0x1 << (E_FIQ_VIVALDI_STR - E_FIQH_START) )
207 #define FIQ_VIVALDI_PTS (0x1 << (E_FIQ_VIVALDI_PTS - E_FIQH_START) )
208 #define FIQ_DSP_MIU_PROT (0x1 << (E_FIQ_DSP_MIU_PROT - E_FIQH_START) )
209 #define FIQ_XIU_TIMEOUT (0x1 << (E_FIQ_XIU_TIMEOUT - E_FIQH_START) )
210 #define FIQ_DMDMCU2HK (0x1 << (E_FIQ_DMDMCU2HK - E_FIQH_START) )
211 #define FIQ_VSYNC_VE4VBI (0x1 << (E_FIQ_VSYNC_VE4VBI - E_FIQH_START) )
212 #define FIQ_FIELD_VE4VBI (0x1 << (E_FIQ_FIELD_VE4VBI - E_FIQH_START) )
213 #define FIQ_VDMCU2HK (0x1 << (E_FIQ_VDMCU2HK - E_FIQH_START) )
214 #define FIQ_VE_DONE_TT (0x1 << (E_FIQ_VE_DONE_TT - E_FIQH_START) )
215 #define FIQ_INT_CCFL (0x1 << (E_FIQ_INT_CCFL - E_FIQH_START) )
[all …]
|
| H A D | halIRQTBL.h | 247 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
248 E_FIQ_16 = E_FIQH_START + 0,
249 E_FIQ_17 = E_FIQH_START + 1,
250 E_FIQ_18 = E_FIQH_START + 2,
251 E_FIQ_19 = E_FIQH_START + 3,
252 E_FIQ_20 = E_FIQH_START + 4,
253 E_FIQ_21 = E_FIQH_START + 5,
254 E_FIQ_22 = E_FIQH_START + 6,
255 E_FIQ_23 = E_FIQH_START + 7,
256 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/kano/ |
| H A D | halIRQTBL.h | 266 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
267 E_FIQ_16 = E_FIQH_START + 0,
268 E_FIQ_17 = E_FIQH_START + 1,
269 E_FIQ_18 = E_FIQH_START + 2,
270 E_FIQ_19 = E_FIQH_START + 3,
271 E_FIQ_20 = E_FIQH_START + 4,
272 E_FIQ_21 = E_FIQH_START + 5,
273 E_FIQ_22 = E_FIQH_START + 6,
274 E_FIQ_23 = E_FIQH_START + 7,
275 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/k7u/ |
| H A D | halIRQTBL.h | 266 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
267 E_FIQ_16 = E_FIQH_START + 0,
268 E_FIQ_17 = E_FIQH_START + 1,
269 E_FIQ_18 = E_FIQH_START + 2,
270 E_FIQ_19 = E_FIQH_START + 3,
271 E_FIQ_20 = E_FIQH_START + 4,
272 E_FIQ_21 = E_FIQH_START + 5,
273 E_FIQ_22 = E_FIQH_START + 6,
274 E_FIQ_23 = E_FIQH_START + 7,
275 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| H A D | regCHIP.h | 219 #define FIQ_VIVALDI_STR (0x01 << (E_FIQ_16 - E_FIQH_START))
220 #define FIQ_VIVALDI_PTS (0x01 << (E_FIQ_17 - E_FIQH_START))
221 #define FIQ_DSP_MIU_PROT (0x01 << (E_FIQ_18 - E_FIQH_START))
222 #define FIQ_XIU_TIMEOUT (0x01 << (E_FIQ_19 - E_FIQH_START))
223 #define FIQ_DMDMCU2HK (0x01 << (E_FIQ_20 - E_FIQH_START))
224 #define FIQ_VSYNC_VE4VBI (0x01 << (E_FIQ_21 - E_FIQH_START))
225 #define FIQ_FIELD_VE4VBI (0x01 << (E_FIQ_22 - E_FIQH_START))
226 #define FIQ_VDMCU2HK (0x01 << (E_FIQ_23 - E_FIQH_START))
227 #define FIQ_VE_DONE_TT (0x01 << (E_FIQ_24 - E_FIQH_START))
228 #define FIQ_CMDQ (0x01 << (E_FIQ_25 - E_FIQH_START))
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/k6lite/ |
| H A D | halIRQTBL.h | 266 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
267 E_FIQ_16 = E_FIQH_START + 0,
268 E_FIQ_17 = E_FIQH_START + 1,
269 E_FIQ_18 = E_FIQH_START + 2,
270 E_FIQ_19 = E_FIQH_START + 3,
271 E_FIQ_20 = E_FIQH_START + 4,
272 E_FIQ_21 = E_FIQH_START + 5,
273 E_FIQ_22 = E_FIQH_START + 6,
274 E_FIQ_23 = E_FIQH_START + 7,
275 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/k6/ |
| H A D | halIRQTBL.h | 266 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
267 E_FIQ_16 = E_FIQH_START + 0,
268 E_FIQ_17 = E_FIQH_START + 1,
269 E_FIQ_18 = E_FIQH_START + 2,
270 E_FIQ_19 = E_FIQH_START + 3,
271 E_FIQ_20 = E_FIQH_START + 4,
272 E_FIQ_21 = E_FIQH_START + 5,
273 E_FIQ_22 = E_FIQH_START + 6,
274 E_FIQ_23 = E_FIQH_START + 7,
275 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| /utopia/UTPA2-700.0.x/mxlib/hal/curry/ |
| H A D | halIRQTBL.h | 266 E_FIQH_START = CONFIG_FIQH_BASE_ADDRESS, enumerator
267 E_FIQ_16 = E_FIQH_START + 0,
268 E_FIQ_17 = E_FIQH_START + 1,
269 E_FIQ_18 = E_FIQH_START + 2,
270 E_FIQ_19 = E_FIQH_START + 3,
271 E_FIQ_20 = E_FIQH_START + 4,
272 E_FIQ_21 = E_FIQH_START + 5,
273 E_FIQ_22 = E_FIQH_START + 6,
274 E_FIQ_23 = E_FIQH_START + 7,
275 E_FIQ_24 = E_FIQH_START + 8,
[all …]
|
| H A D | regCHIP.h | 219 #define FIQ_VIVALDI_STR (0x01 << (E_FIQ_16 - E_FIQH_START))
220 #define FIQ_VIVALDI_PTS (0x01 << (E_FIQ_17 - E_FIQH_START))
221 #define FIQ_DSP_MIU_PROT (0x01 << (E_FIQ_18 - E_FIQH_START))
222 #define FIQ_XIU_TIMEOUT (0x01 << (E_FIQ_19 - E_FIQH_START))
223 #define FIQ_DMDMCU2HK (0x01 << (E_FIQ_20 - E_FIQH_START))
224 #define FIQ_VSYNC_VE4VBI (0x01 << (E_FIQ_21 - E_FIQH_START))
225 #define FIQ_FIELD_VE4VBI (0x01 << (E_FIQ_22 - E_FIQH_START))
226 #define FIQ_VDMCU2HK (0x01 << (E_FIQ_23 - E_FIQH_START))
227 #define FIQ_VE_DONE_TT (0x01 << (E_FIQ_24 - E_FIQH_START))
228 #define FIQ_CMDQ (0x01 << (E_FIQ_25 - E_FIQH_START))
[all …]
|