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Searched refs:CHANNEL0_IF5_CONFIG1 (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c1662 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1663 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1666 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1667 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1670 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1671 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
H A DregTSO.h357 REG16_TSO CHANNEL0_IF5_CONFIG1; //15 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c1662 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1663 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1666 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1667 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1670 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1671 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
H A DregTSO.h357 REG16_TSO CHANNEL0_IF5_CONFIG1; //15 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c1696 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1697 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1700 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1701 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1704 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1705 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
H A DregTSO.h357 REG16_TSO CHANNEL0_IF5_CONFIG1; //15 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c1702 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1703 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1706 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1707 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1710 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1711 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
H A DregTSO.h368 REG16_TSO CHANNEL0_IF5_CONFIG1; //15 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c1705 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1706 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_INPUT_MODE_MASK) in HAL_TSO_Livein_Input_Config()
1709 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1710 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_SYNC_BYTE_MASK) in HAL_TSO_Livein_Input_Config()
1713 _HAL_REG16_W(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1), in HAL_TSO_Livein_Input_Config()
1714 … (_HAL_REG16_R(&(_TSOCtrl->CHANNEL0_IF5_CONFIG1)) & ~TSO_CHANNEL0_IF5_CONFIG1_PKT_HEADER_LEN_MASK) in HAL_TSO_Livein_Input_Config()
H A DregTSO.h372 REG16_TSO CHANNEL0_IF5_CONFIG1; //15 member