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Searched refs:val (Results 1 – 25 of 169) sorted by relevance

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/rockchip-linux_mpp/mpp/inc/
H A Dmpp_cfg.h23 MPP_RET mpp_cfg_set_s32(MppCfgInfo *info, void *cfg, RK_S32 val);
24 MPP_RET mpp_cfg_get_s32(MppCfgInfo *info, void *cfg, RK_S32 *val);
25 MPP_RET mpp_cfg_set_u32(MppCfgInfo *info, void *cfg, RK_U32 val);
26 MPP_RET mpp_cfg_get_u32(MppCfgInfo *info, void *cfg, RK_U32 *val);
27 MPP_RET mpp_cfg_set_s64(MppCfgInfo *info, void *cfg, RK_S64 val);
28 MPP_RET mpp_cfg_get_s64(MppCfgInfo *info, void *cfg, RK_S64 *val);
29 MPP_RET mpp_cfg_set_u64(MppCfgInfo *info, void *cfg, RK_U64 val);
30 MPP_RET mpp_cfg_get_u64(MppCfgInfo *info, void *cfg, RK_U64 *val);
31 MPP_RET mpp_cfg_set_st(MppCfgInfo *info, void *cfg, void *val);
32 MPP_RET mpp_cfg_get_st(MppCfgInfo *info, void *cfg, void *val);
[all …]
/rockchip-linux_mpp/kmpp/base/inc/
H A Dkmpp_obj_impl.h11 rk_s32 kmpp_obj_impl_set_s32(KmppEntry *tbl, void *entry, rk_s32 val);
12 rk_s32 kmpp_obj_impl_get_s32(KmppEntry *tbl, void *entry, rk_s32 *val);
13 rk_s32 kmpp_obj_impl_set_u32(KmppEntry *tbl, void *entry, rk_u32 val);
14 rk_s32 kmpp_obj_impl_get_u32(KmppEntry *tbl, void *entry, rk_u32 *val);
15 rk_s32 kmpp_obj_impl_set_s64(KmppEntry *tbl, void *entry, rk_s64 val);
16 rk_s32 kmpp_obj_impl_get_s64(KmppEntry *tbl, void *entry, rk_s64 *val);
17 rk_s32 kmpp_obj_impl_set_u64(KmppEntry *tbl, void *entry, rk_u64 val);
18 rk_s32 kmpp_obj_impl_get_u64(KmppEntry *tbl, void *entry, rk_u64 *val);
19 rk_s32 kmpp_obj_impl_set_st(KmppEntry *tbl, void *entry, void *val);
20 rk_s32 kmpp_obj_impl_get_st(KmppEntry *tbl, void *entry, void *val);
[all …]
H A Dkmpp_obj.h13 typedef rk_s32 (*KmppObjPreset)(void *entry, KmppObj obj, const char *val, const char *caller);
106 rk_s32 kmpp_obj_set_s32(KmppObj obj, const char *name, rk_s32 val);
107 rk_s32 kmpp_obj_get_s32(KmppObj obj, const char *name, rk_s32 *val);
108 rk_s32 kmpp_obj_set_u32(KmppObj obj, const char *name, rk_u32 val);
109 rk_s32 kmpp_obj_get_u32(KmppObj obj, const char *name, rk_u32 *val);
110 rk_s32 kmpp_obj_set_s64(KmppObj obj, const char *name, rk_s64 val);
111 rk_s32 kmpp_obj_get_s64(KmppObj obj, const char *name, rk_s64 *val);
112 rk_s32 kmpp_obj_set_u64(KmppObj obj, const char *name, rk_u64 val);
113 rk_s32 kmpp_obj_get_u64(KmppObj obj, const char *name, rk_u64 *val);
114 rk_s32 kmpp_obj_set_st(KmppObj obj, const char *name, void *val);
[all …]
/rockchip-linux_mpp/mpp/codec/dec/m2v/
H A Dm2vd_com.h52 #define M2VD_ASSERT(val)\ argument
55 { mpp_assert(val); }\
72 #define M2VD_CHK_F(val) \ argument
74 if((val) < 0) { \
75 ret = (val); \
82 #define M2VD_CHK_V(val, ...)\ argument
83 do{ if(!(val)){\
85 M2VD_WARNNING("value error(L%d), val:%d\n", __LINE__, val);\
90 #define M2VD_CHK_M(val, ...)\ argument
91 do{ if(!(val)) {\
[all …]
/rockchip-linux_mpp/mpp/base/
H A Dmpp_bitwrite.c66 void mpp_writer_put_raw_bits(MppWriteCtx *ctx, RK_S32 val, RK_S32 len) in mpp_writer_put_raw_bits() argument
75 mpp_assert(val < (1 << len)); in mpp_writer_put_raw_bits()
79 val <<= (32 - bits); in mpp_writer_put_raw_bits()
80 byte_buffer = byte_buffer | val; in mpp_writer_put_raw_bits()
112 void mpp_writer_put_bits(MppWriteCtx * ctx, RK_S32 val, RK_S32 len) in mpp_writer_put_bits() argument
118 if (val) { in mpp_writer_put_bits()
119 mpp_assert(val < (1 << len)); in mpp_writer_put_bits()
124 byte_buffer = byte_buffer | ((RK_U32) val << (32 - bits)); in mpp_writer_put_bits()
183 void mpp_writer_put_ue(MppWriteCtx *ctx, RK_U32 val) in mpp_writer_put_ue() argument
187 val++; in mpp_writer_put_ue()
[all …]
H A Dmpp_task.c13 MPP_RET mpp_task_meta_set_s32(MppTask task, MppMetaKey key, RK_S32 val) in mpp_task_meta_set_s32() argument
19 return mpp_meta_set_s32(impl->meta, key, val); in mpp_task_meta_set_s32()
22 MPP_RET mpp_task_meta_set_s64(MppTask task, MppMetaKey key, RK_S64 val) in mpp_task_meta_set_s64() argument
28 return mpp_meta_set_s64(impl->meta, key, val); in mpp_task_meta_set_s64()
31 MPP_RET mpp_task_meta_set_ptr(MppTask task, MppMetaKey key, void *val) in mpp_task_meta_set_ptr() argument
37 return mpp_meta_set_ptr(impl->meta, key, val); in mpp_task_meta_set_ptr()
67 MPP_RET mpp_task_meta_get_s32(MppTask task, MppMetaKey key, RK_S32 *val, RK_S32 default_val) in mpp_task_meta_get_s32() argument
73 MPP_RET ret = mpp_meta_get_s32(impl->meta, key, val); in mpp_task_meta_get_s32()
75 *val = default_val; in mpp_task_meta_get_s32()
79 MPP_RET mpp_task_meta_get_s64(MppTask task, MppMetaKey key, RK_S64 *val, RK_S64 default_val) in mpp_task_meta_get_s64() argument
[all …]
H A Dmpp_cfg.c63 static MPP_RET mpp_cfg_set(MppCfgInfo *info, void *cfg, void *val) in mpp_cfg_set() argument
65 if (memcmp((char *)cfg + info->data_offset, val, info->data_size)) { in mpp_cfg_set()
66 memcpy((char *)cfg + info->data_offset, val, info->data_size); in mpp_cfg_set()
72 static MPP_RET mpp_cfg_get(MppCfgInfo *info, void *cfg, void *val) in mpp_cfg_get() argument
74 memcpy(val, (char *)cfg + info->data_offset, info->data_size); in mpp_cfg_get()
79 MPP_RET mpp_cfg_set_##type(MppCfgInfo *info, void *cfg, base_type val) \
83 dst[0] = val; \
85 … mpp_cfg_dbg_set("%p + %d set " #type " change %d -> %d\n", cfg, info->data_offset, old, val); \
87 if (old != val) { \
89 cfg, info->data_offset, old, val, info->flag_offset); \
[all …]
/rockchip-linux_mpp/mpp/codec/enc/h265/
H A Dh265e_stream.c73 RK_U32 val, RK_S32 i_count, char *name) in h265e_stream_write_with_log() argument
77 name, i_count, val); in h265e_stream_write_with_log()
79 mpp_writer_put_bits(&s->enc_stream, val, i_count); in h265e_stream_write_with_log()
84 RK_U32 val, char *name) in h265e_stream_write1_with_log() argument
86 h265e_dbg(H265E_DBG_HEADER, "write 1 bit name %s, val %d", name, val); in h265e_stream_write1_with_log()
88 mpp_writer_put_bits(&s->enc_stream, val, 1); in h265e_stream_write1_with_log()
94 RK_U32 val, char *name) in h265e_stream_write_ue_with_log() argument
99 name, val); in h265e_stream_write_ue_with_log()
102 RK_S32 tmp = ++val; in h265e_stream_write_ue_with_log()
106 name, val); in h265e_stream_write_ue_with_log()
[all …]
/rockchip-linux_mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu2_v2.c293 RK_U32 *reg = ctx->regs_set.val; in setup_intra_refresh()
294 RK_U32 val = 0; in setup_intra_refresh() local
324 val = VEPU_REG_INTRA_AREA_TOP(top) in setup_intra_refresh()
328 H264E_HAL_SET_REG(reg, VEPU_REG_INTRA_AREA_CTRL, val); in setup_intra_refresh()
349 RK_U32 *reg = ctx->regs_set.val; in hal_h264e_vepu2_gen_regs_v2()
354 RK_U32 val = 0; in hal_h264e_vepu2_gen_regs_v2() local
389 val = VEPU_REG_AXI_CTRL_READ_ID(0); in hal_h264e_vepu2_gen_regs_v2()
390 val |= VEPU_REG_AXI_CTRL_WRITE_ID(0); in hal_h264e_vepu2_gen_regs_v2()
391 val |= VEPU_REG_AXI_CTRL_BURST_LEN(16); in hal_h264e_vepu2_gen_regs_v2()
392 val |= VEPU_REG_AXI_CTRL_INCREMENT_MODE(0); in hal_h264e_vepu2_gen_regs_v2()
[all …]
H A Dhal_h264e_vepu1_v2.c299 RK_U32 *reg = ctx->regs_set.val; in hal_h264e_vepu1_gen_regs_v2()
304 RK_U32 val = 0; in hal_h264e_vepu1_gen_regs_v2() local
337 val = VEPU_REG_INTRA_AREA_TOP(mb_h) in hal_h264e_vepu1_gen_regs_v2()
341 H264E_HAL_SET_REG(reg, VEPU_REG_INTRA_AREA_CTRL, val); //FIXED in hal_h264e_vepu1_gen_regs_v2()
343 val = VEPU_REG_AXI_CTRL_WRITE_ID(0) in hal_h264e_vepu1_gen_regs_v2()
352 H264E_HAL_SET_REG(reg, VEPU_REG_AXI_CTRL, val); in hal_h264e_vepu1_gen_regs_v2()
354 val = VEPU_REG_MAD_QP_ADJUSTMENT (hw_mbrc->mad_qp_change) in hal_h264e_vepu1_gen_regs_v2()
356 H264E_HAL_SET_REG(reg, VEPU_REG_MAD_CTRL, val); in hal_h264e_vepu1_gen_regs_v2()
358 val = 0; in hal_h264e_vepu1_gen_regs_v2()
360 val = VEPU_REG_DISABLE_QUARTER_PIXEL_MV; in hal_h264e_vepu1_gen_regs_v2()
[all …]
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu1.c43 RK_U16 val) in vdpu1_set_refer_pic_idx() argument
47 p_regs->SwReg30.sw_refer0_nbr = val; in vdpu1_set_refer_pic_idx()
50 p_regs->SwReg30.sw_refer1_nbr = val; in vdpu1_set_refer_pic_idx()
53 p_regs->SwReg31.sw_refer2_nbr = val; in vdpu1_set_refer_pic_idx()
56 p_regs->SwReg31.sw_refer3_nbr = val; in vdpu1_set_refer_pic_idx()
59 p_regs->SwReg32.sw_refer4_nbr = val; in vdpu1_set_refer_pic_idx()
62 p_regs->SwReg32.sw_refer5_nbr = val; in vdpu1_set_refer_pic_idx()
65 p_regs->SwReg33.sw_refer6_nbr = val; in vdpu1_set_refer_pic_idx()
68 p_regs->SwReg33.sw_refer7_nbr = val; in vdpu1_set_refer_pic_idx()
71 p_regs->SwReg34.sw_refer8_nbr = val; in vdpu1_set_refer_pic_idx()
[all …]
H A Dhal_h264d_vdpu2.c69 RK_U32 val = 0; in set_device_regs() local
71 val = (RK_U32)(-5); in set_device_regs()
72 p_reg->sw59.pflt_set0_tap1 = val; in set_device_regs()
87 static MPP_RET set_refer_pic_idx(H264dVdpuRegs_t *p_regs, RK_U32 i, RK_U16 val) in set_refer_pic_idx() argument
91 p_regs->sw76.num_ref_idx0 = val; in set_refer_pic_idx()
94 p_regs->sw76.num_ref_idx1 = val; in set_refer_pic_idx()
97 p_regs->sw77.num_ref_idx2 = val; in set_refer_pic_idx()
100 p_regs->sw77.num_ref_idx3 = val; in set_refer_pic_idx()
103 p_regs->sw78.num_ref_idx4 = val; in set_refer_pic_idx()
106 p_regs->sw78.num_ref_idx5 = val; in set_refer_pic_idx()
[all …]
H A Dhal_h264d_global.h40 #define ASSERT(val)\ argument
43 { mpp_assert(val); }\
60 #define VAL_CHECK(ret, val, ...)\ argument
62 if (!(val)){\
68 #define MEM_CHECK(ret, val, ...)\ argument
70 if (!(val)) {\
78 #define INP_CHECK(ret, val, ...)\ argument
80 if ((val)) {\
86 #define FUN_CHECK(val)\ argument
88 if ((val) < 0) {\
/rockchip-linux_mpp/mpp/hal/common/av1/
H A Dhal_av1d_common.h50 #define ASSERT(val)\ argument
53 { mpp_assert(val); }\
70 #define VAL_CHECK(ret, val, ...)\ argument
72 if (!(val)){\
78 #define MEM_CHECK(ret, val, ...)\ argument
80 if (!(val)) {\
86 #define BUF_CHECK(ret, val, ...)\ argument
88 if (val) {\
94 #define BUF_PUT(val, ...)\ argument
96 if (val) {\
[all …]
/rockchip-linux_mpp/osal/
H A Dmpp_common.c101 RK_U32 mpp_align_16(RK_U32 val) in mpp_align_16() argument
103 return MPP_ALIGN(val, 16); in mpp_align_16()
106 RK_U32 mpp_align_64(RK_U32 val) in mpp_align_64() argument
108 return MPP_ALIGN(val, 64); in mpp_align_64()
111 RK_U32 mpp_align_128(RK_U32 val) in mpp_align_128() argument
113 return MPP_ALIGN(val, 128); in mpp_align_128()
116 RK_U32 mpp_align_256_odd(RK_U32 val) in mpp_align_256_odd() argument
118 return MPP_ALIGN(val, 256) | 256; in mpp_align_256_odd()
121 RK_U32 mpp_align_128_odd_plus_64(RK_U32 val) in mpp_align_128_odd_plus_64() argument
123 val = MPP_ALIGN(val, 64); in mpp_align_128_odd_plus_64()
[all …]
/rockchip-linux_mpp/inc/
H A Drk_venc_kcfg.h32 MPP_RET mpp_venc_kcfg_set_s32(MppVencKcfg cfg, const char *name, RK_S32 val);
33 MPP_RET mpp_venc_kcfg_set_u32(MppVencKcfg cfg, const char *name, RK_U32 val);
34 MPP_RET mpp_venc_kcfg_set_s64(MppVencKcfg cfg, const char *name, RK_S64 val);
35 MPP_RET mpp_venc_kcfg_set_u64(MppVencKcfg cfg, const char *name, RK_U64 val);
36 MPP_RET mpp_venc_kcfg_set_ptr(MppVencKcfg cfg, const char *name, void *val);
37 MPP_RET mpp_venc_kcfg_set_st(MppVencKcfg cfg, const char *name, void *val);
39 MPP_RET mpp_venc_kcfg_get_s32(MppVencKcfg cfg, const char *name, RK_S32 *val);
40 MPP_RET mpp_venc_kcfg_get_u32(MppVencKcfg cfg, const char *name, RK_U32 *val);
41 MPP_RET mpp_venc_kcfg_get_s64(MppVencKcfg cfg, const char *name, RK_S64 *val);
42 MPP_RET mpp_venc_kcfg_get_u64(MppVencKcfg cfg, const char *name, RK_U64 *val);
[all …]
H A Drk_vdec_kcfg.h31 MPP_RET mpp_vdec_kcfg_set_s32(MppVdecKcfg cfg, const char *name, RK_S32 val);
32 MPP_RET mpp_vdec_kcfg_set_u32(MppVdecKcfg cfg, const char *name, RK_U32 val);
33 MPP_RET mpp_vdec_kcfg_set_s64(MppVdecKcfg cfg, const char *name, RK_S64 val);
34 MPP_RET mpp_vdec_kcfg_set_u64(MppVdecKcfg cfg, const char *name, RK_U64 val);
35 MPP_RET mpp_vdec_kcfg_set_ptr(MppVdecKcfg cfg, const char *name, void *val);
36 MPP_RET mpp_vdec_kcfg_set_st(MppVdecKcfg cfg, const char *name, void *val);
38 MPP_RET mpp_vdec_kcfg_get_s32(MppVdecKcfg cfg, const char *name, RK_S32 *val);
39 MPP_RET mpp_vdec_kcfg_get_u32(MppVdecKcfg cfg, const char *name, RK_U32 *val);
40 MPP_RET mpp_vdec_kcfg_get_s64(MppVdecKcfg cfg, const char *name, RK_S64 *val);
41 MPP_RET mpp_vdec_kcfg_get_u64(MppVdecKcfg cfg, const char *name, RK_U64 *val);
[all …]
H A Drk_venc_cfg.h24 MPP_RET mpp_enc_cfg_set_s32(MppEncCfg cfg, const char *name, RK_S32 val);
25 MPP_RET mpp_enc_cfg_set_u32(MppEncCfg cfg, const char *name, RK_U32 val);
26 MPP_RET mpp_enc_cfg_set_s64(MppEncCfg cfg, const char *name, RK_S64 val);
27 MPP_RET mpp_enc_cfg_set_u64(MppEncCfg cfg, const char *name, RK_U64 val);
28 MPP_RET mpp_enc_cfg_set_ptr(MppEncCfg cfg, const char *name, void *val);
29 MPP_RET mpp_enc_cfg_set_st(MppEncCfg cfg, const char *name, void *val);
31 MPP_RET mpp_enc_cfg_get_s32(MppEncCfg cfg, const char *name, RK_S32 *val);
32 MPP_RET mpp_enc_cfg_get_u32(MppEncCfg cfg, const char *name, RK_U32 *val);
33 MPP_RET mpp_enc_cfg_get_s64(MppEncCfg cfg, const char *name, RK_S64 *val);
34 MPP_RET mpp_enc_cfg_get_u64(MppEncCfg cfg, const char *name, RK_U64 *val);
[all …]
H A Drk_vdec_cfg.h32 MPP_RET mpp_dec_cfg_set_s32(MppDecCfg cfg, const char *name, RK_S32 val);
33 MPP_RET mpp_dec_cfg_set_u32(MppDecCfg cfg, const char *name, RK_U32 val);
34 MPP_RET mpp_dec_cfg_set_s64(MppDecCfg cfg, const char *name, RK_S64 val);
35 MPP_RET mpp_dec_cfg_set_u64(MppDecCfg cfg, const char *name, RK_U64 val);
36 MPP_RET mpp_dec_cfg_set_ptr(MppDecCfg cfg, const char *name, void *val);
38 MPP_RET mpp_dec_cfg_get_s32(MppDecCfg cfg, const char *name, RK_S32 *val);
39 MPP_RET mpp_dec_cfg_get_u32(MppDecCfg cfg, const char *name, RK_U32 *val);
40 MPP_RET mpp_dec_cfg_get_s64(MppDecCfg cfg, const char *name, RK_S64 *val);
41 MPP_RET mpp_dec_cfg_get_u64(MppDecCfg cfg, const char *name, RK_U64 *val);
42 MPP_RET mpp_dec_cfg_get_ptr(MppDecCfg cfg, const char *name, void **val);
H A Drk_mpp_cfg.h29 MPP_RET mpp_sys_cfg_set_s32(MppSysCfg cfg, const char *name, RK_S32 val);
30 MPP_RET mpp_sys_cfg_set_u32(MppSysCfg cfg, const char *name, RK_U32 val);
31 MPP_RET mpp_sys_cfg_set_s64(MppSysCfg cfg, const char *name, RK_S64 val);
32 MPP_RET mpp_sys_cfg_set_u64(MppSysCfg cfg, const char *name, RK_U64 val);
33 MPP_RET mpp_sys_cfg_set_ptr(MppSysCfg cfg, const char *name, void *val);
35 MPP_RET mpp_sys_cfg_get_s32(MppSysCfg cfg, const char *name, RK_S32 *val);
36 MPP_RET mpp_sys_cfg_get_u32(MppSysCfg cfg, const char *name, RK_U32 *val);
37 MPP_RET mpp_sys_cfg_get_s64(MppSysCfg cfg, const char *name, RK_S64 *val);
38 MPP_RET mpp_sys_cfg_get_u64(MppSysCfg cfg, const char *name, RK_U64 *val);
39 MPP_RET mpp_sys_cfg_get_ptr(MppSysCfg cfg, const char *name, void **val);
/rockchip-linux_mpp/utils/
H A Ddictionary.c74 new_val = (char**) calloc(d->size * 2, sizeof * d->val); in dictionary_grow()
88 memcpy(new_val, d->val, d->size * sizeof(char *)); in dictionary_grow()
92 free(d->val); in dictionary_grow()
97 d->val = new_val; in dictionary_grow()
161 d->val = (char**) calloc(size, sizeof * d->val); in dictionary_new()
185 if (d->val[i] != NULL) in dictionary_del()
186 free(d->val[i]); in dictionary_del()
188 free(d->val); in dictionary_del()
222 return d->val[i] ; in dictionary_get()
255 int dictionary_set(dictionary * d, const char * key, const char * val) in dictionary_set() argument
[all …]
/rockchip-linux_mpp/mpp/codec/rc/
H A Drc_base.c69 void mpp_data_reset_v2(MppDataV2 *p, RK_S32 val) in mpp_data_reset_v2() argument
71 RK_S32 *data = p->val; in mpp_data_reset_v2()
77 p->sum = val * p->size; in mpp_data_reset_v2()
80 *data++ = val; in mpp_data_reset_v2()
83 void mpp_data_preset_v2(MppDataV2 *p, RK_S32 val) in mpp_data_preset_v2() argument
88 p->sum -= p->val[p->pos_pw]; in mpp_data_preset_v2()
91 p->val[p->pos_pw] = val; in mpp_data_preset_v2()
92 p->sum += p->val[p->pos_pw]; in mpp_data_preset_v2()
101 void mpp_data_update_v2(MppDataV2 *p, RK_S32 val) in mpp_data_update_v2() argument
104 p->sum += val - p->val[p->pos_w]; in mpp_data_update_v2()
[all …]
/rockchip-linux_mpp/osal/inc/
H A Dmpp_hash.h22 #define hash_long(val, bits) hash_32(val, bits) argument
25 #define hash_long(val, bits) hash_64(val, bits)
45 #define WRITE_ONCE(var, val) \ argument
46 (*((volatile typeof(val) *)(&(var))) = (val))
257 #define hash_min(val, bits) \ argument
258 (sizeof(val) <= 4 ? hash_32(val, bits) : hash_long(val, bits))
301 static inline RK_U32 hash_32(RK_U32 val, unsigned int bits) in hash_32() argument
304 RK_U32 hash = val * GOLDEN_RATIO_32; in hash_32()
310 static inline RK_U32 __hash_32(RK_U32 val) in __hash_32() argument
312 return val * GOLDEN_RATIO_32; in __hash_32()
[all …]
/rockchip-linux_mpp/mpp/hal/rkdec/avsd/
H A Dhal_avsd_base.h52 #define INP_CHECK(ret, val, ...)\ argument
54 if ((val)) { \
62 #define FUN_CHECK(val)\ argument
64 if ((val) < 0) {\
72 #define MEM_CHECK(ret, val, ...)\ argument
74 if (!(val)) {\
137 RK_U32 avsd_ver_align(RK_U32 val);
138 RK_U32 avsd_hor_align(RK_U32 val);
139 RK_U32 avsd_len_align(RK_U32 val);
/rockchip-linux_mpp/kmpp/base/
H A Dkmpp_meta.c191 rk_u64 val = META_KEY_TO_U64(key, type); in meta_key_to_addr() local
194 kmpp_objdef_get_entry(srv->def, (const char *)&val, &tbl); in meta_key_to_addr()
202 static rk_s32 meta_inc_size(KmppObj meta, rk_s32 val, const char *caller) in meta_inc_size() argument
213 ret = MPP_FETCH_ADD(p, val); in meta_inc_size()
222 static rk_s32 meta_dec_size(KmppObj meta, rk_s32 val, const char *caller) in meta_dec_size() argument
233 ret = MPP_FETCH_SUB(p, val); in meta_dec_size()
293 rk_s32 kmpp_meta_set_##func_type(KmppMeta meta, KmppMetaKey key, arg_type val) \
300 meta_val->key_field = val; \
304 rk_s32 kmpp_meta_get_##func_type(KmppMeta meta, KmppMetaKey key, arg_type *val) \
310 if (val) *val = meta_val->key_field; \
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