1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2020 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka 18*437bfbebSnyanmisaka #ifndef __HAL_AV1D_GLOBAL_H__ 19*437bfbebSnyanmisaka #define __HAL_AV1D_GLOBAL_H__ 20*437bfbebSnyanmisaka 21*437bfbebSnyanmisaka #include "mpp_hal.h" 22*437bfbebSnyanmisaka #include "mpp_debug.h" 23*437bfbebSnyanmisaka #include "mpp_device.h" 24*437bfbebSnyanmisaka #include "hal_bufs.h" 25*437bfbebSnyanmisaka 26*437bfbebSnyanmisaka #include "dxva_syntax.h" 27*437bfbebSnyanmisaka 28*437bfbebSnyanmisaka #define AV1D_DBG_ERROR (0x00000001) 29*437bfbebSnyanmisaka #define AV1D_DBG_ASSERT (0x00000002) 30*437bfbebSnyanmisaka #define AV1D_DBG_WARNNING (0x00000004) 31*437bfbebSnyanmisaka #define AV1D_DBG_LOG (0x00000008) 32*437bfbebSnyanmisaka 33*437bfbebSnyanmisaka #define AV1D_DBG_HARD_MODE (0x00000010) 34*437bfbebSnyanmisaka 35*437bfbebSnyanmisaka extern RK_U32 hal_av1d_debug; 36*437bfbebSnyanmisaka 37*437bfbebSnyanmisaka #define AV1D_DBG(level, fmt, ...)\ 38*437bfbebSnyanmisaka do {\ 39*437bfbebSnyanmisaka if (level & hal_av1d_debug)\ 40*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 41*437bfbebSnyanmisaka } while (0) 42*437bfbebSnyanmisaka 43*437bfbebSnyanmisaka 44*437bfbebSnyanmisaka #define AV1D_ERR(fmt, ...)\ 45*437bfbebSnyanmisaka do {\ 46*437bfbebSnyanmisaka if (AV1D_DBG_ERROR & hal_av1d_debug)\ 47*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 48*437bfbebSnyanmisaka } while (0) 49*437bfbebSnyanmisaka 50*437bfbebSnyanmisaka #define ASSERT(val)\ 51*437bfbebSnyanmisaka do {\ 52*437bfbebSnyanmisaka if (AV1D_DBG_ASSERT & hal_av1d_debug)\ 53*437bfbebSnyanmisaka { mpp_assert(val); }\ 54*437bfbebSnyanmisaka } while (0) 55*437bfbebSnyanmisaka 56*437bfbebSnyanmisaka #define AV1D_WARNNING(fmt, ...)\ 57*437bfbebSnyanmisaka do {\ 58*437bfbebSnyanmisaka if (AV1D_DBG_WARNNING & hal_av1d_debug)\ 59*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 60*437bfbebSnyanmisaka } while (0) 61*437bfbebSnyanmisaka 62*437bfbebSnyanmisaka #define AV1D_LOG(fmt, ...)\ 63*437bfbebSnyanmisaka do {\ 64*437bfbebSnyanmisaka if (AV1D_DBG_LOG & hal_av1d_debug)\ 65*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 66*437bfbebSnyanmisaka } while (0) 67*437bfbebSnyanmisaka 68*437bfbebSnyanmisaka 69*437bfbebSnyanmisaka //!< vaule check 70*437bfbebSnyanmisaka #define VAL_CHECK(ret, val, ...)\ 71*437bfbebSnyanmisaka do{\ 72*437bfbebSnyanmisaka if (!(val)){\ 73*437bfbebSnyanmisaka ret = MPP_ERR_VALUE; \ 74*437bfbebSnyanmisaka AV1D_WARNNING("value error(%d).\n", __LINE__); \ 75*437bfbebSnyanmisaka goto __FAILED; \ 76*437bfbebSnyanmisaka }} while (0) 77*437bfbebSnyanmisaka //!< memory malloc check 78*437bfbebSnyanmisaka #define MEM_CHECK(ret, val, ...)\ 79*437bfbebSnyanmisaka do{\ 80*437bfbebSnyanmisaka if (!(val)) {\ 81*437bfbebSnyanmisaka ret = MPP_ERR_MALLOC; \ 82*437bfbebSnyanmisaka AV1D_ERR("malloc buffer error(%d).\n", __LINE__); \ 83*437bfbebSnyanmisaka ASSERT(0); goto __FAILED; \ 84*437bfbebSnyanmisaka }} while (0) 85*437bfbebSnyanmisaka 86*437bfbebSnyanmisaka #define BUF_CHECK(ret, val, ...)\ 87*437bfbebSnyanmisaka do{\ 88*437bfbebSnyanmisaka if (val) {\ 89*437bfbebSnyanmisaka ret = MPP_ERR_BUFFER_FULL; \ 90*437bfbebSnyanmisaka AV1D_ERR("buffer get error(%d).\n", __LINE__); \ 91*437bfbebSnyanmisaka ASSERT(0); goto __FAILED; \ 92*437bfbebSnyanmisaka }} while (0) 93*437bfbebSnyanmisaka 94*437bfbebSnyanmisaka #define BUF_PUT(val, ...)\ 95*437bfbebSnyanmisaka do{\ 96*437bfbebSnyanmisaka if (val) {\ 97*437bfbebSnyanmisaka if (mpp_buffer_put(val)) {\ 98*437bfbebSnyanmisaka AV1D_ERR("buffer put error(%d).\n", __LINE__); \ 99*437bfbebSnyanmisaka ASSERT(0); \ 100*437bfbebSnyanmisaka }\ 101*437bfbebSnyanmisaka }} while (0) 102*437bfbebSnyanmisaka 103*437bfbebSnyanmisaka //!< input check 104*437bfbebSnyanmisaka #define INP_CHECK(ret, val, ...)\ 105*437bfbebSnyanmisaka do{\ 106*437bfbebSnyanmisaka if ((val)) {\ 107*437bfbebSnyanmisaka ret = MPP_ERR_INIT; \ 108*437bfbebSnyanmisaka AV1D_WARNNING("input empty(%d).\n", __LINE__); \ 109*437bfbebSnyanmisaka goto __RETURN; \ 110*437bfbebSnyanmisaka }} while (0) 111*437bfbebSnyanmisaka //!< function return check 112*437bfbebSnyanmisaka #define FUN_CHECK(val)\ 113*437bfbebSnyanmisaka do{\ 114*437bfbebSnyanmisaka if ((val) < 0) {\ 115*437bfbebSnyanmisaka AV1D_WARNNING("Function error(%d).\n", __LINE__); \ 116*437bfbebSnyanmisaka goto __FAILED; \ 117*437bfbebSnyanmisaka }} while (0) 118*437bfbebSnyanmisaka 119*437bfbebSnyanmisaka #define MAX_MB_SEGMENTS 8 120*437bfbebSnyanmisaka 121*437bfbebSnyanmisaka enum Av1SegLevelFeatures { 122*437bfbebSnyanmisaka SEG_AV1_LVL_ALT_Q, // Use alternate Quantizer .... 123*437bfbebSnyanmisaka SEG_AV1_LVL_ALT_LF_Y_V, // Use alternate loop filter value on y plane 124*437bfbebSnyanmisaka // vertical 125*437bfbebSnyanmisaka SEG_AV1_LVL_ALT_LF_Y_H, // Use alternate loop filter value on y plane 126*437bfbebSnyanmisaka // horizontal 127*437bfbebSnyanmisaka SEG_AV1_LVL_ALT_LF_U, // Use alternate loop filter value on u plane 128*437bfbebSnyanmisaka SEG_AV1_LVL_ALT_LF_V, // Use alternate loop filter value on v plane 129*437bfbebSnyanmisaka SEG_AV1_LVL_REF_FRAME, // Optional Segment reference frame 130*437bfbebSnyanmisaka SEG_AV1_LVL_SKIP, // Optional Segment (0,0) + skip mode 131*437bfbebSnyanmisaka SEG_AV1_LVL_GLOBALMV, 132*437bfbebSnyanmisaka SEG_AV1_LVL_MAX 133*437bfbebSnyanmisaka }; 134*437bfbebSnyanmisaka 135*437bfbebSnyanmisaka #define AV1_ACTIVE_REFS 3 136*437bfbebSnyanmisaka #define AV1_ACTIVE_REFS_EX 7 137*437bfbebSnyanmisaka #define AV1_REF_LIST_SIZE 8 138*437bfbebSnyanmisaka #define AV1_REF_SCALE_SHIFT 14 139*437bfbebSnyanmisaka 140*437bfbebSnyanmisaka enum MvReferenceFrame { 141*437bfbebSnyanmisaka NONE = -1, 142*437bfbebSnyanmisaka INTRA_FRAME = 0, 143*437bfbebSnyanmisaka LAST_FRAME = 1, 144*437bfbebSnyanmisaka LAST2_FRAME_EX = 2, 145*437bfbebSnyanmisaka LAST3_FRAME_EX = 3, 146*437bfbebSnyanmisaka GOLDEN_FRAME_EX = 4, 147*437bfbebSnyanmisaka BWDREF_FRAME_EX = 5, 148*437bfbebSnyanmisaka ALTREF2_FRAME_EX = 6, 149*437bfbebSnyanmisaka ALTREF_FRAME_EX = 7, 150*437bfbebSnyanmisaka MAX_REF_FRAMES_EX = 8, 151*437bfbebSnyanmisaka GOLDEN_FRAME = 2, 152*437bfbebSnyanmisaka ALTREF_FRAME = 3, 153*437bfbebSnyanmisaka 154*437bfbebSnyanmisaka MAX_REF_FRAMES = 4 155*437bfbebSnyanmisaka }; 156*437bfbebSnyanmisaka 157*437bfbebSnyanmisaka enum { 158*437bfbebSnyanmisaka AV1_FRAME_KEY = 0, 159*437bfbebSnyanmisaka AV1_FRAME_INTER = 1, 160*437bfbebSnyanmisaka AV1_FRAME_INTRA_ONLY = 2, 161*437bfbebSnyanmisaka AV1_FRAME_SWITCH = 3, 162*437bfbebSnyanmisaka }; 163*437bfbebSnyanmisaka 164*437bfbebSnyanmisaka #define AV1DEC_MAX_PIC_BUFFERS 24 165*437bfbebSnyanmisaka #define AV1DEC_DYNAMIC_PIC_LIMIT 10 166*437bfbebSnyanmisaka #define ALLOWED_REFS_PER_FRAME_EX 7 167*437bfbebSnyanmisaka 168*437bfbebSnyanmisaka typedef struct FilmGrainMemory_t { 169*437bfbebSnyanmisaka RK_U8 scaling_lut_y[256]; 170*437bfbebSnyanmisaka RK_U8 scaling_lut_cb[256]; 171*437bfbebSnyanmisaka RK_U8 scaling_lut_cr[256]; 172*437bfbebSnyanmisaka RK_S16 cropped_luma_grain_block[4096]; 173*437bfbebSnyanmisaka RK_S16 cropped_chroma_grain_block[1024 * 2]; 174*437bfbebSnyanmisaka } FilmGrainMemory; 175*437bfbebSnyanmisaka 176*437bfbebSnyanmisaka typedef struct av1d_hal_ctx_t { 177*437bfbebSnyanmisaka const MppHalApi *api; 178*437bfbebSnyanmisaka RK_U8 *bitstream; 179*437bfbebSnyanmisaka RK_U32 strm_len; 180*437bfbebSnyanmisaka 181*437bfbebSnyanmisaka HalDecTask *in_task; 182*437bfbebSnyanmisaka MppBufSlots slots; 183*437bfbebSnyanmisaka MppBufSlots packet_slots; 184*437bfbebSnyanmisaka MppDecCfgSet *cfg; 185*437bfbebSnyanmisaka MppBufferGroup buf_group; 186*437bfbebSnyanmisaka 187*437bfbebSnyanmisaka MppCbCtx *dec_cb; 188*437bfbebSnyanmisaka MppDev dev; 189*437bfbebSnyanmisaka void *reg_ctx; 190*437bfbebSnyanmisaka RK_U32 fast_mode; 191*437bfbebSnyanmisaka const MppDecHwCap *hw_info; 192*437bfbebSnyanmisaka } Av1dHalCtx; 193*437bfbebSnyanmisaka 194*437bfbebSnyanmisaka #endif /* __HAL_AV1D_GLOBAL_H__ */ 195