1*437bfbebSnyanmisaka /* SPDX-License-Identifier: Apache-2.0 OR MIT */ 2*437bfbebSnyanmisaka /* 3*437bfbebSnyanmisaka * Copyright (c) 2015 Rockchip Electronics Co., Ltd. 4*437bfbebSnyanmisaka */ 5*437bfbebSnyanmisaka 6*437bfbebSnyanmisaka #ifndef __HAL_H264D_GLOBAL_H__ 7*437bfbebSnyanmisaka #define __HAL_H264D_GLOBAL_H__ 8*437bfbebSnyanmisaka 9*437bfbebSnyanmisaka #include "mpp_hal.h" 10*437bfbebSnyanmisaka #include "mpp_debug.h" 11*437bfbebSnyanmisaka #include "mpp_device.h" 12*437bfbebSnyanmisaka #include "hal_bufs.h" 13*437bfbebSnyanmisaka 14*437bfbebSnyanmisaka #include "dxva_syntax.h" 15*437bfbebSnyanmisaka #include "h264d_syntax.h" 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #define H264D_DBG_ERROR (0x00000001) 18*437bfbebSnyanmisaka #define H264D_DBG_ASSERT (0x00000002) 19*437bfbebSnyanmisaka #define H264D_DBG_WARNNING (0x00000004) 20*437bfbebSnyanmisaka #define H264D_DBG_LOG (0x00000008) 21*437bfbebSnyanmisaka 22*437bfbebSnyanmisaka #define H264D_DBG_HARD_MODE (0x00000010) 23*437bfbebSnyanmisaka 24*437bfbebSnyanmisaka extern RK_U32 hal_h264d_debug; 25*437bfbebSnyanmisaka 26*437bfbebSnyanmisaka 27*437bfbebSnyanmisaka #define H264D_DBG(level, fmt, ...)\ 28*437bfbebSnyanmisaka do {\ 29*437bfbebSnyanmisaka if (level & hal_h264d_debug)\ 30*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 31*437bfbebSnyanmisaka } while (0) 32*437bfbebSnyanmisaka 33*437bfbebSnyanmisaka 34*437bfbebSnyanmisaka #define H264D_ERR(fmt, ...)\ 35*437bfbebSnyanmisaka do {\ 36*437bfbebSnyanmisaka if (H264D_DBG_ERROR & hal_h264d_debug)\ 37*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 38*437bfbebSnyanmisaka } while (0) 39*437bfbebSnyanmisaka 40*437bfbebSnyanmisaka #define ASSERT(val)\ 41*437bfbebSnyanmisaka do {\ 42*437bfbebSnyanmisaka if (H264D_DBG_ASSERT & hal_h264d_debug)\ 43*437bfbebSnyanmisaka { mpp_assert(val); }\ 44*437bfbebSnyanmisaka } while (0) 45*437bfbebSnyanmisaka 46*437bfbebSnyanmisaka #define H264D_WARNNING(fmt, ...)\ 47*437bfbebSnyanmisaka do {\ 48*437bfbebSnyanmisaka if (H264D_DBG_WARNNING & hal_h264d_debug)\ 49*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 50*437bfbebSnyanmisaka } while (0) 51*437bfbebSnyanmisaka 52*437bfbebSnyanmisaka #define H264D_LOG(fmt, ...)\ 53*437bfbebSnyanmisaka do {\ 54*437bfbebSnyanmisaka if (H264D_DBG_LOG & hal_h264d_debug)\ 55*437bfbebSnyanmisaka { mpp_log(fmt, ## __VA_ARGS__); }\ 56*437bfbebSnyanmisaka } while (0) 57*437bfbebSnyanmisaka 58*437bfbebSnyanmisaka 59*437bfbebSnyanmisaka //!< vaule check 60*437bfbebSnyanmisaka #define VAL_CHECK(ret, val, ...)\ 61*437bfbebSnyanmisaka do{\ 62*437bfbebSnyanmisaka if (!(val)){\ 63*437bfbebSnyanmisaka ret = MPP_ERR_VALUE; \ 64*437bfbebSnyanmisaka H264D_WARNNING("value error(%d).\n", __LINE__); \ 65*437bfbebSnyanmisaka goto __FAILED; \ 66*437bfbebSnyanmisaka }} while (0) 67*437bfbebSnyanmisaka //!< memory malloc check 68*437bfbebSnyanmisaka #define MEM_CHECK(ret, val, ...)\ 69*437bfbebSnyanmisaka do{\ 70*437bfbebSnyanmisaka if (!(val)) {\ 71*437bfbebSnyanmisaka ret = MPP_ERR_MALLOC; \ 72*437bfbebSnyanmisaka H264D_ERR("malloc buffer error(%d).\n", __LINE__); \ 73*437bfbebSnyanmisaka ASSERT(0); goto __FAILED; \ 74*437bfbebSnyanmisaka }} while (0) 75*437bfbebSnyanmisaka 76*437bfbebSnyanmisaka 77*437bfbebSnyanmisaka //!< input check 78*437bfbebSnyanmisaka #define INP_CHECK(ret, val, ...)\ 79*437bfbebSnyanmisaka do{\ 80*437bfbebSnyanmisaka if ((val)) {\ 81*437bfbebSnyanmisaka ret = MPP_ERR_INIT; \ 82*437bfbebSnyanmisaka H264D_WARNNING("input empty(%d).\n", __LINE__); \ 83*437bfbebSnyanmisaka goto __RETURN; \ 84*437bfbebSnyanmisaka }} while (0) 85*437bfbebSnyanmisaka //!< function return check 86*437bfbebSnyanmisaka #define FUN_CHECK(val)\ 87*437bfbebSnyanmisaka do{\ 88*437bfbebSnyanmisaka if ((val) < 0) {\ 89*437bfbebSnyanmisaka H264D_WARNNING("Function error(%d).\n", __LINE__); \ 90*437bfbebSnyanmisaka goto __FAILED; \ 91*437bfbebSnyanmisaka }} while (0) 92*437bfbebSnyanmisaka 93*437bfbebSnyanmisaka 94*437bfbebSnyanmisaka typedef struct h264d_hal_ctx_t { 95*437bfbebSnyanmisaka const MppHalApi *hal_api; 96*437bfbebSnyanmisaka 97*437bfbebSnyanmisaka DXVA_PicParams_H264_MVC *pp; 98*437bfbebSnyanmisaka DXVA_Qmatrix_H264 *qm; 99*437bfbebSnyanmisaka RK_U32 slice_num; 100*437bfbebSnyanmisaka DXVA_Slice_H264_Short *slice_short; //!< MAX_SLICES 101*437bfbebSnyanmisaka DXVA_Slice_H264_Long *slice_long; //!< MAX_SLICES 102*437bfbebSnyanmisaka RK_U8 *bitstream; 103*437bfbebSnyanmisaka RK_U32 strm_len; 104*437bfbebSnyanmisaka 105*437bfbebSnyanmisaka void *priv; //!< resert data for extent 106*437bfbebSnyanmisaka //!< add 107*437bfbebSnyanmisaka HalDecTask *in_task; 108*437bfbebSnyanmisaka MppBufSlots frame_slots; 109*437bfbebSnyanmisaka MppBufSlots packet_slots; 110*437bfbebSnyanmisaka MppDecCfgSet *cfg; 111*437bfbebSnyanmisaka MppBufferGroup buf_group; 112*437bfbebSnyanmisaka HalBufs cmv_bufs; 113*437bfbebSnyanmisaka RK_S32 mv_size; 114*437bfbebSnyanmisaka RK_S32 mv_count; 115*437bfbebSnyanmisaka 116*437bfbebSnyanmisaka MppCbCtx *dec_cb; 117*437bfbebSnyanmisaka MppDev dev; 118*437bfbebSnyanmisaka void *reg_ctx; 119*437bfbebSnyanmisaka RK_U32 fast_mode; 120*437bfbebSnyanmisaka 121*437bfbebSnyanmisaka const MppDecHwCap *hw_info; 122*437bfbebSnyanmisaka } H264dHalCtx_t; 123*437bfbebSnyanmisaka 124*437bfbebSnyanmisaka extern const RK_U32 h264_cabac_table[928]; 125*437bfbebSnyanmisaka 126*437bfbebSnyanmisaka #endif /*__HAL_H264D_GLOBAL_H__*/ 127