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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx5/
H A Dcrm_regs.h81 #define MXC_CCM_CCR_OSCNT(v) ((v) & 0xFF) argument
93 #define MXC_CCM_CCSR_STEP_SEL(v) (((v) & 0x3) << 7) argument
97 #define MXC_CCM_CCSR_PLL2_DIV_PODF(v) (((v) & 0x3) << 5) argument
101 #define MXC_CCM_CCSR_PLL3_DIV_PODF(v) (((v) & 0x3) << 3) argument
110 #define MXC_CCM_CACRR_ARM_PODF(v) ((v) & 0x7) argument
117 #define MXC_CCM_CBCDR_DDR_PODF(v) (((v) & 0x7) << 27) argument
123 #define MXC_CCM_CBCDR_EMI_PODF(v) (((v) & 0x7) << 22) argument
127 #define MXC_CCM_CBCDR_AXI_B_PODF(v) (((v) & 0x7) << 19) argument
131 #define MXC_CCM_CBCDR_AXI_A_PODF(v) (((v) & 0x7) << 16) argument
135 #define MXC_CCM_CBCDR_NFC_PODF(v) (((v) & 0x7) << 13) argument
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-vf610/
H A Dimx-regs.h132 #define DDRMC_CR02_DRAM_TINIT(v) ((v) & 0xffffff) argument
133 #define DDRMC_CR10_TRST_PWRON(v) (v) argument
134 #define DDRMC_CR11_CKE_INACTIVE(v) (v) argument
135 #define DDRMC_CR12_WRLAT(v) (((v) & 0x1f) << 8) argument
136 #define DDRMC_CR12_CASLAT_LIN(v) ((v) & 0x3f) argument
137 #define DDRMC_CR13_TRC(v) (((v) & 0xff) << 24) argument
138 #define DDRMC_CR13_TRRD(v) (((v) & 0xff) << 16) argument
139 #define DDRMC_CR13_TCCD(v) (((v) & 0x1f) << 8) argument
140 #define DDRMC_CR13_TBST_INT_INTERVAL(v) ((v) & 0x7) argument
141 #define DDRMC_CR14_TFAW(v) (((v) & 0x3f) << 24) argument
[all …]
H A Dcrm_regs.h119 #define CCM_CCR_OSCNT(v) ((v) & 0xff) argument
123 #define CCM_CCSR_PLL2_PFD_CLK_SEL(v) (((v) & 0x7) << 19) argument
127 #define CCM_CCSR_PLL1_PFD_CLK_SEL(v) (((v) & 0x7) << 16) argument
138 #define CCM_CCSR_DDRC_CLK_SEL(v) ((v) << 6) argument
139 #define CCM_CCSR_FAST_CLK_SEL(v) ((v) << 5) argument
143 #define CCM_CCSR_SYS_CLK_SEL(v) ((v) & 0x7) argument
147 #define CCM_CACRR_IPG_CLK_DIV(v) (((v) & 0x3) << 11) argument
150 #define CCM_CACRR_BUS_CLK_DIV(v) (((v) & 0x7) << 3) argument
153 #define CCM_CACRR_ARM_CLK_DIV(v) ((v) & 0x7) argument
160 #define CCM_CSCMR1_QSPI0_CLK_SEL(v) (((v) & 0x3) << 22) argument
[all …]
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Datomic.h16 #define atomic_read(v) ((v)->counter) argument
17 #define atomic_set(v,i) (((v)->counter) = (i)) argument
22 static __inline__ int atomic_add_return(int a, atomic_t *v) in atomic_add_return() argument
31 : "=&r" (t), "=m" (*v) in atomic_add_return()
32 : "r" (a), "r" (v), "m" (*v) in atomic_add_return()
38 static __inline__ int atomic_sub_return(int a, atomic_t *v) in atomic_sub_return() argument
47 : "=&r" (t), "=m" (*v) in atomic_sub_return()
48 : "r" (a), "r" (v), "m" (*v) in atomic_sub_return()
54 static __inline__ int atomic_inc_return(atomic_t *v) in atomic_inc_return() argument
63 : "=&r" (t), "=m" (*v) in atomic_inc_return()
[all …]
/rk3399_rockchip-uboot/include/asm-generic/
H A Datomic-long.h29 atomic64_t *v = (atomic64_t *)l; in atomic_long_read() local
31 return (long)atomic64_read(v); in atomic_long_read()
36 atomic64_t *v = (atomic64_t *)l; in atomic_long_set() local
38 atomic64_set(v, i); in atomic_long_set()
43 atomic64_t *v = (atomic64_t *)l; in atomic_long_inc() local
45 atomic64_inc(v); in atomic_long_inc()
50 atomic64_t *v = (atomic64_t *)l; in atomic_long_dec() local
52 atomic64_dec(v); in atomic_long_dec()
57 atomic64_t *v = (atomic64_t *)l; in atomic_long_add() local
59 atomic64_add(i, v); in atomic_long_add()
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-s32v234/
H A Dsiul.h51 #define SIUL2_MSCR_DDR_DO_TRIM(v) ((v) & 0xC0000000) argument
57 #define SIUL2_MSCR_DDR_INPUT(v) ((v) & 0x20000000) argument
61 #define SIUL2_MSCR_DDR_SEL(v) ((v) & 0x18000000) argument
65 #define SIUL2_MSCR_DDR_ODT(v) ((v) & 0x07000000) argument
74 #define SIUL2_MSCR_DCYCLE_TRIM(v) ((v) & 0x00C00000) argument
79 #define SIUL2_MSCR_OBE(v) ((v) & 0x00200000) argument
82 #define SIUL2_MSCR_ODE(v) ((v) & 0x00100000) argument
85 #define SIUL2_MSCR_IBE(v) ((v) & 0x00010000) argument
88 #define SIUL2_MSCR_HYS(v) ((v) & 0x00400000) argument
91 #define SIUL2_MSCR_INV(v) ((v) & 0x00020000) argument
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/
H A Datomic.h37 #define atomic_read(v) ((v)->counter) argument
38 #define atomic_set(v, i) (((v)->counter) = (i)) argument
39 #define atomic64_read(v) atomic_read(v) argument
40 #define atomic64_set(v, i) atomic_set(v, i) argument
42 static inline void atomic_add(int i, volatile atomic_t *v) in atomic_add() argument
47 v->counter += i; in atomic_add()
51 static inline void atomic_sub(int i, volatile atomic_t *v) in atomic_sub() argument
56 v->counter -= i; in atomic_sub()
60 static inline void atomic_inc(volatile atomic_t *v) in atomic_inc() argument
65 v->counter += 1; in atomic_inc()
[all …]
H A Dio.h47 #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) argument
48 #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) argument
49 #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) argument
50 #define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v)) argument
97 #define __raw_writeb(v,a) __arch_putb(v,a) argument
98 #define __raw_writew(v,a) __arch_putw(v,a) argument
99 #define __raw_writel(v,a) __arch_putl(v,a) argument
100 #define __raw_writeq(v,a) __arch_putq(v,a) argument
115 #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; }) argument
116 #define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; }) argument
[all …]
/rk3399_rockchip-uboot/drivers/usb/host/
H A Dehci-mxc.c67 unsigned int v; in mxc_set_usbcontrol() local
69 v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET); in mxc_set_usbcontrol()
73 v &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PM_BIT | MX25_OTG_PP_BIT | in mxc_set_usbcontrol()
75 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT; in mxc_set_usbcontrol()
78 v |= MX25_OTG_PM_BIT; in mxc_set_usbcontrol()
81 v |= MX25_OTG_PP_BIT; in mxc_set_usbcontrol()
84 v |= MX25_OTG_OCPOL_BIT; in mxc_set_usbcontrol()
88 v &= ~(MX25_H1_SIC_MASK | MX25_H1_PM_BIT | MX25_H1_PP_BIT | in mxc_set_usbcontrol()
92 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT; in mxc_set_usbcontrol()
95 v |= MX25_H1_PM_BIT; in mxc_set_usbcontrol()
[all …]
H A Dehci-mx5.c84 unsigned int v; in mxc_set_usbcontrol() local
94 v = __raw_readl(usbother_base + in mxc_set_usbcontrol()
97 v |= MXC_OTG_PHYCTRL_OC_POL_BIT; in mxc_set_usbcontrol()
99 v &= ~MXC_OTG_PHYCTRL_OC_POL_BIT; in mxc_set_usbcontrol()
102 v &= ~MXC_OTG_PHYCTRL_OC_DIS_BIT; in mxc_set_usbcontrol()
105 v |= MXC_OTG_PHYCTRL_OC_DIS_BIT; in mxc_set_usbcontrol()
108 v |= MXC_OTG_PHYCTRL_PWR_POL_BIT; in mxc_set_usbcontrol()
110 v &= ~MXC_OTG_PHYCTRL_PWR_POL_BIT; in mxc_set_usbcontrol()
112 __raw_writel(v, usbother_base + in mxc_set_usbcontrol()
115 v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); in mxc_set_usbcontrol()
[all …]
/rk3399_rockchip-uboot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S26 #define SET_FIELD(name, v) (((v) & QCA953X_##name##_MASK) << \ argument
29 #define DPLL2_KI(v) SET_FIELD(SRIF_DPLL2_KI, v) argument
30 #define DPLL2_KD(v) SET_FIELD(SRIF_DPLL2_KD, v) argument
34 #define PLL_CPU_NFRAC(v) SET_FIELD(PLL_CPU_CONFIG_NFRAC, v) argument
35 #define PLL_CPU_NINT(v) SET_FIELD(PLL_CPU_CONFIG_NINT, v) argument
36 #define PLL_CPU_REFDIV(v) SET_FIELD(PLL_CPU_CONFIG_REFDIV, v) argument
37 #define PLL_CPU_OUTDIV(v) SET_FIELD(PLL_CPU_CONFIG_OUTDIV, v) argument
44 #define PLL_DDR_NFRAC(v) SET_FIELD(PLL_DDR_CONFIG_NFRAC, v) argument
45 #define PLL_DDR_NINT(v) SET_FIELD(PLL_DDR_CONFIG_NINT, v) argument
46 #define PLL_DDR_REFDIV(v) SET_FIELD(PLL_DDR_CONFIG_REFDIV, v) argument
[all …]
/rk3399_rockchip-uboot/common/
H A Ds_record.c17 int v; /* conversion buffer */ in srec_decode() local
37 v = *input++; /* record type */ in srec_decode()
46 switch (v) { /* record type */ in srec_decode()
89 switch (v) { in srec_decode()
92 if ((v = hex2_bin(input)) < 0) { in srec_decode()
95 *addr += v; in srec_decode()
96 chksum += v; in srec_decode()
101 if ((v = hex2_bin(input)) < 0) { in srec_decode()
105 *addr += v; in srec_decode()
106 chksum += v; in srec_decode()
[all …]
/rk3399_rockchip-uboot/arch/x86/include/asm/
H A Datomic.h23 static inline int atomic_read(const atomic_t *v) in atomic_read() argument
25 return ACCESS_ONCE((v)->counter); in atomic_read()
35 static inline void atomic_set(atomic_t *v, int i) in atomic_set() argument
37 v->counter = i; in atomic_set()
47 static inline void atomic_add(int i, atomic_t *v) in atomic_add() argument
50 : "+m" (v->counter) in atomic_add()
61 static inline void atomic_sub(int i, atomic_t *v) in atomic_sub() argument
64 : "+m" (v->counter) in atomic_sub()
74 static inline void atomic_inc(atomic_t *v) in atomic_inc() argument
77 : "+m" (v->counter)); in atomic_inc()
[all …]
/rk3399_rockchip-uboot/drivers/memory/
H A Dti-aemif.c19 #define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0) argument
20 #define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0) argument
21 #define AEMIF_CFG_WR_SETUP(v) (((v) & 0x0f) << 26) argument
22 #define AEMIF_CFG_WR_STROBE(v) (((v) & 0x3f) << 20) argument
23 #define AEMIF_CFG_WR_HOLD(v) (((v) & 0x07) << 17) argument
24 #define AEMIF_CFG_RD_SETUP(v) (((v) & 0x0f) << 13) argument
25 #define AEMIF_CFG_RD_STROBE(v) (((v) & 0x3f) << 7) argument
26 #define AEMIF_CFG_RD_HOLD(v) (((v) & 0x07) << 4) argument
27 #define AEMIF_CFG_TURN_AROUND(v) (((v) & 0x03) << 2) argument
28 #define AEMIF_CFG_WIDTH(v) (((v) & 0x03) << 0) argument
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h412 #define MXC_CCM_CS2CDR_QSPI2_CLK_PODF(v) (((v) & 0x3f) << 21) argument
415 #define MXC_CCM_CS2CDR_QSPI2_CLK_PRED(v) (((v) & 0x7) << 18) argument
418 #define MXC_CCM_CS2CDR_QSPI2_CLK_SEL(v) (((v) & 0x7) << 15) argument
422 #define MXC_CCM_CS2CDR_ENFC_CLK_PODF(v) (((v) & 0x3f) << 21) argument
425 #define MXC_CCM_CS2CDR_ENFC_CLK_PRED(v) (((v) & 0x7) << 18) argument
429 #define MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQP(v) (((v) & 0x7) << 15) argument
432 #define MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQ(v) (((v) & 0x3) << 16) argument
442 #define MXC_CCM_CS2CDR_ENFC_CLK_SEL(v) \ argument
444 MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQP(v) : \
445 MXC_CCM_CS2CDR_ENFC_CLK_SEL_DQ(v))
[all …]
/rk3399_rockchip-uboot/arch/xtensa/include/asm/
H A Datomic.h16 #define atomic_read(v) ((v)->counter) argument
17 #define atomic_set(v, i) ((v)->counter = (i)) argument
19 static inline void atomic_add(int i, atomic_t *v) in atomic_add() argument
24 v->counter += i; in atomic_add()
28 static inline void atomic_sub(int i, atomic_t *v) in atomic_sub() argument
33 v->counter -= i; in atomic_sub()
37 static inline void atomic_inc(atomic_t *v) in atomic_inc() argument
42 ++v->counter; in atomic_inc()
46 static inline void atomic_dec(atomic_t *v) in atomic_dec() argument
51 --v->counter; in atomic_dec()
/rk3399_rockchip-uboot/drivers/clk/
H A Dclk_pic32.c95 ulong plliclk, v; in pic32_get_pll_rate() local
97 v = readl(priv->iobase + SPLLCON); in pic32_get_pll_rate()
98 iclk = (v & ICLK_MASK); in pic32_get_pll_rate()
99 idiv = ((v >> 8) & PLLIDIV_MASK) + 1; in pic32_get_pll_rate()
100 odiv = ((v >> 24) & PLLODIV_MASK); in pic32_get_pll_rate()
101 mult = ((v >> 16) & PLLMUL_MASK) + 1; in pic32_get_pll_rate()
117 ulong v; in pic32_get_sysclk() local
123 v = readl(priv->iobase + OSCCON); in pic32_get_sysclk()
124 curr_osc = (v >> 12) & CUROSC_MASK; in pic32_get_sysclk()
128 frcdiv = ((v >> 24) & FRCDIV_MASK); in pic32_get_sysclk()
[all …]
/rk3399_rockchip-uboot/include/
H A Dfsl_sec.h17 #define sec_out32(a, v) out_le32(a, v) argument
23 #define sec_out32(a, v) out_be32(a, v) argument
236 #define CAAM_SMCJR(v, jr) (JR_BASE_ADDR(jr) + SM_OFFSET(v) + SM_CMD(v)) argument
238 #define CAAM_SMCSJR(v, jr) (JR_BASE_ADDR(jr) + SM_OFFSET(v) + SM_STATUS(v)) argument
240 #define CAAM_SMAPJR(v, jr, y) \ argument
241 (JR_BASE_ADDR(jr) + SM_OFFSET(v) + SM_PERM(v) + y * 16)
243 #define CAAM_SMAG2JR(v, jr, y) \ argument
244 (JR_BASE_ADDR(jr) + SM_OFFSET(v) + SM_GROUP2(v) + y * 16)
246 #define CAAM_SMAG1JR(v, jr, y) \ argument
247 (JR_BASE_ADDR(jr) + SM_OFFSET(v) + SM_GROUP1(v) + y * 16)
[all …]
/rk3399_rockchip-uboot/arch/sh/cpu/sh4/
H A Dcache.c59 u32 v; in flush_dcache_range() local
62 for (v = start; v < end; v += L1_CACHE_BYTES) { in flush_dcache_range()
64 : "m" (__m(v))); in flush_dcache_range()
70 u32 v; in invalidate_dcache_range() local
73 for (v = start; v < end; v += L1_CACHE_BYTES) { in invalidate_dcache_range()
75 : "m" (__m(v))); in invalidate_dcache_range()
/rk3399_rockchip-uboot/arch/sh/include/asm/
H A Dio.h37 #define __arch_putb(v, a) (*(volatile unsigned char *)(a) = (v)) argument
38 #define __arch_putw(v, a) (*(volatile unsigned short *)(a) = (v)) argument
39 #define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v)) argument
49 #define __raw_writeb(v, a) __arch_putb(v, a) argument
50 #define __raw_writew(v, a) __arch_putw(v, a) argument
51 #define __raw_writel(v, a) __arch_putl(v, a) argument
84 #define outb(v, p) __raw_writeb(v, p) argument
85 #define outw(v, p) __raw_writew(cpu_to_le16(v), p) argument
86 #define outl(v, p) __raw_writel(cpu_to_le32(v), p) argument
152 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) argument
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dsoc.h23 #define gur_out32(a, v) out_le32(a, v) argument
26 #define gur_out32(a, v) out_be32(a, v) argument
31 #define scfg_out32(a, v) out_le32(a, v) argument
34 #define scfg_out32(a, v) out_be32(a, v) argument
39 #define pex_lut_out32(a, v) out_le32(a, v) argument
42 #define pex_lut_out32(a, v) out_be32(a, v) argument
51 #define CPU_TYPE_ENTRY(n, v, nc) \ argument
52 { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)}
/rk3399_rockchip-uboot/drivers/bios_emulator/
H A Dbiosemui.h71 #define writeb_le(base, v) *((u8*)(base)) = (v) argument
72 #define writew_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \ argument
73 writeb_le(base + 1, (v >> 8) & 0xff)
74 #define writel_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \ argument
75 writeb_le(base + 1, (v >> 8) & 0xff), \
76 writeb_le(base + 2, (v >> 16) & 0xff), \
77 writeb_le(base + 3, (v >> 24) & 0xff)
82 #define writeb_le(base, v) *((u8*)(base)) = (v) argument
83 #define writew_le(base, v) *((u16*)(base)) = (v) argument
84 #define writel_le(base, v) *((u32*)(base)) = (v) argument
/rk3399_rockchip-uboot/tools/kermit/
H A Ddot.kermrc13 define sz !sz \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line)
14 define rz !rz \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line)
15 define sx !sx \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line)
16 define rx !rx \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line)
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-omap3/
H A Dmem.h58 #define ACTIM_CTRLA_TRFC(v) (((v) & 0x1F) << 27) /* 31:27 */ argument
59 #define ACTIM_CTRLA_TRC(v) (((v) & 0x1F) << 22) /* 26:22 */ argument
60 #define ACTIM_CTRLA_TRAS(v) (((v) & 0x0F) << 18) /* 21:18 */ argument
61 #define ACTIM_CTRLA_TRP(v) (((v) & 0x07) << 15) /* 17:15 */ argument
62 #define ACTIM_CTRLA_TRCD(v) (((v) & 0x07) << 12) /* 14:12 */ argument
63 #define ACTIM_CTRLA_TRRD(v) (((v) & 0x07) << 9) /* 11:9 */ argument
64 #define ACTIM_CTRLA_TDPL(v) (((v) & 0x07) << 6) /* 8:6 */ argument
65 #define ACTIM_CTRLA_TDAL(v) (v & 0x1F) /* 4:0 */ argument
78 #define ACTIM_CTRLB_TWTR(v) (((v) & 0x03) << 16) /* 17:16 */ argument
79 #define ACTIM_CTRLB_TCKE(v) (((v) & 0x07) << 12) /* 14:12 */ argument
[all …]
/rk3399_rockchip-uboot/arch/arc/include/asm/
H A Dio.h227 #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) argument
228 #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) argument
229 #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) argument
246 #define writeb_relaxed(v,c) __raw_writeb(v,c) argument
247 #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c) argument
248 #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c) argument
250 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) argument
253 #define out_le32(a, v) out_arch(l, le32, a, v) argument
254 #define out_le16(a, v) out_arch(w, le16, a, v) argument
259 #define out_be32(a, v) out_arch(l, be32, a, v) argument
[all …]

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