| #
3fea9536 |
| 15-Apr-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-video
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| #
80b9c3bb |
| 11-Apr-2017 |
Stefan Agner <stefan.agner@toradex.com> |
board: toradex: colibri_vf: Add DCU support for Colibri Vybrid
The Vybrid SoC family has the same display controller unit (DCU) like the LS1021A SoC. This patch adds platform data, pinmux defines an
board: toradex: colibri_vf: Add DCU support for Colibri Vybrid
The Vybrid SoC family has the same display controller unit (DCU) like the LS1021A SoC. This patch adds platform data, pinmux defines and clock control to enable the driver for Toradex Colibri Vybrid module.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
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| #
02ccab19 |
| 19-Mar-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts: configs/bk4r1_defconfig configs/colibri_vf_defconfig configs/pcm052_defconfig i
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts: configs/bk4r1_defconfig configs/colibri_vf_defconfig configs/pcm052_defconfig include/configs/colibri_vf.h include/configs/pcm052.h
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| #
c40d612b |
| 22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
serial: lpuart: restructure lpuart driver
Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg
serial: lpuart: restructure lpuart driver
Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg base and flags. For 32Bit register access, use lpuart_read32/lpuart_write32 which handles big/little endian. For 8Bit register access, still use the orignal code.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
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| #
13a39725 |
| 14-Oct-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master'
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| #
b8d24212 |
| 02-Oct-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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| #
3f353cec |
| 21-Sep-2015 |
Albert ARIBAUD \\(3ADEV\\) <albert.aribaud@3adev.fr> |
vf610: refactor DDRMC code
The VF610 DDRMC driver code contains settings which are board-specific. Move these out to boards so that new boards can define their own without having to modify the drive
vf610: refactor DDRMC code
The VF610 DDRMC driver code contains settings which are board-specific. Move these out to boards so that new boards can define their own without having to modify the driver.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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| #
7a1af7a7 |
| 02-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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| #
b44e60ac |
| 19-Jun-2015 |
Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> |
i2c: fix vf610 support
Add support in mxc_i2c driver, iomux_v3 and vf610 architecture for the four I2C instances available in VF610.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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| #
6f43ba70 |
| 07-Jul-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
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| #
4d80051b |
| 08-Jun-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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| #
d348a943 |
| 01-Jun-2015 |
Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> |
dm: gpio: vf610: Add GPIO driver support
Add GPIO driver support to Freescale VF610
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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| #
9bea236b |
| 26-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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| #
e6c8b716 |
| 18-May-2015 |
Heiko Schocher <hs@denx.de> |
i2c, mxc: rework i2c base address names for different SoCs
rework and unify i2c address names for different SoCs, which use the mxc_i2c driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
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| #
b939689c |
| 05-May-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
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| #
a94bb7a4 |
| 15-Apr-2015 |
Sanchayan Maity <maitysanchayan@gmail.com> |
usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
This driver adds support for the USB peripheral on Freescale Vybrid SoC's.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
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| #
e7b860fa |
| 15-Apr-2015 |
Sanchayan Maity <maitysanchayan@gmail.com> |
ARM: vf610: Initial integration for Colibri VF50/VF61
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC.
- CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use
ARM: vf610: Initial integration for Colibri VF50/VF61
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC.
- CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
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| #
1db503c4 |
| 15-Apr-2015 |
Sanchayan Maity <maitysanchayan@gmail.com> |
ARM: vf610: Add SoC and CPU type detection
Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Li
ARM: vf610: Add SoC and CPU type detection
Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
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| #
8b4f9afa |
| 15-Apr-2015 |
Stefan Agner <stefan@agner.ch> |
ARM: vf610: Enable external 32KHz oscillator
Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC.
Signed-off-by: Sanchayan
ARM: vf610: Enable external 32KHz oscillator
Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
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| #
c7ea243c |
| 15-Apr-2015 |
Sanchayan Maity <maitysanchayan@gmail.com> |
ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently ROW_DIFF and COL_DIFF can be chose
ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently ROW_DIFF and COL_DIFF can be chosen from the board file. The JEDEC timings are specified using a common ddr3_jedec_timings structure.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
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| #
9b416a9f |
| 10-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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| #
9e89a64f |
| 27-Nov-2014 |
Stefan Agner <stefan@agner.ch> |
arm: vf610: improve evaluation of reset source
Improve the evaluation of the reset source. Bit description according to latest reference manual rev. 7.
Signed-off-by: Stefan Agner <stefan@agner.ch>
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| #
dd0204e4 |
| 07-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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| #
c19a8bc5 |
| 06-Sep-2014 |
Anthony Felice <tony.felice@timesys.com> |
vf610twr: Tune DDR initialization settings
Removed settings in unsupported register fields. They didn’t do anything, and in most cases, were not documented in the reference manual.
Changed register
vf610twr: Tune DDR initialization settings
Removed settings in unsupported register fields. They didn’t do anything, and in most cases, were not documented in the reference manual.
Changed register settings to comply with JEDEC required values.
Changed timing parameters because they included full clock periods that were doing nothing.
Signed-off-by: Anthony Felice <tony.felice@timesys.com> [rebased on v2014.10-rc2] Signed-off-by: Stefan Agner <stefan@agner.ch>
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| #
b0e31c7b |
| 06-Aug-2014 |
Stefan Agner <stefan@agner.ch> |
arm: vf610: add NFC clock support
Add NFC (NAND Flash Controller) clock support and enable them at board initialization time.
Signed-off-by: Stefan Agner <stefan@agner.ch>
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