Merge branch 'master' of git://www.denx.de/git/u-boot-imx

Migrate CONFIG_ARCH_USE_MEMSET/MEMCPY with this merge.

Signed-off-by: Tom Rini <trini@konsulko.com>

imx: mx6sl: add lcdif clock support

Add lcdif clock support for i.MX6SL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

imx: mx6ull: update the REFTOP_VBGADJ setting

According to design team, we need to set REFTOP_VBGADJ
in PMU MISC0 according to the REFTOP_TRIM[2:0] fuse. the
actually table is as below:

'000" - s

imx: mx6ull: update the REFTOP_VBGADJ setting

According to design team, we need to set REFTOP_VBGADJ
in PMU MISC0 according to the REFTOP_TRIM[2:0] fuse. the
actually table is as below:

'000" - set REFTOP_VBGADJ[2:0] to 3'b000
'001" - set REFTOP_VBGADJ[2:0] to 3'b001
'010" - set REFTOP_VBGADJ[2:0] to 3'b010
'011" - set REFTOP_VBGADJ[2:0] to 3'b011
'100" - set REFTOP_VBGADJ[2:0] to 3'b100
'101" - set REFTOP_VBGADJ[2:0] to 3'b101
'110" - set REFTOP_VBGADJ[2:0] to 3'b110
'111" - set REFTOP_VBGADJ[2:0] to 3'b111

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

imx: imx6ull: adjust the ldo 1.2v bandgap voltage

Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage
is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop
MISC0 bit[6:4]) setting t

imx: imx6ull: adjust the ldo 1.2v bandgap voltage

Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage
is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop
MISC0 bit[6:4]) setting to 2b'110.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

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imx: mx6ull: update clock settings and CCM register map

Update Clock settings and CCM register map for i.MX6ULL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc:

imx: mx6ull: update clock settings and CCM register map

Update Clock settings and CCM register map for i.MX6ULL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

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Merge branch 'master' of git://git.denx.de/u-boot-imx

imx: mx6ul/sx: fix mmdc_ch0 clk calculation

Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications
Processor Reference Manual and "Figure 18-5. BUS clock generation" of
i.MX 6UltraLit

imx: mx6ul/sx: fix mmdc_ch0 clk calculation

Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications
Processor Reference Manual and "Figure 18-5. BUS clock generation" of
i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk
sources from pll4_main_clk(pll_audio), the calculation is wrong.

Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support
for decode_pll.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

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imx: mx6: add more entry for mxc_ccm_reg

Add more entries for structure mxc_ccm_reg.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Cc: Stefano Babic <sbabic@

imx: mx6: add more entry for mxc_ccm_reg

Add more entries for structure mxc_ccm_reg.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Cc: Stefano Babic <sbabic@denx.de>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

imx: mx6: crm_reg: add LCDIF related macros

Add i.MX6UL/SX LCDIF related macros. Discard uneccessary
'#ifdef xxx'.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de

imx: mx6: crm_reg: add LCDIF related macros

Add i.MX6UL/SX LCDIF related macros. Discard uneccessary
'#ifdef xxx'.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

imx: clock support enet2 anatop clock support

To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.

imx: clock support enet2 anatop clock support

To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

imx:mx6ul add clock support

1. Add enet, uart, i2c, ipg clock support for i.MX6UL.
2. Correct get_periph_clk, it should account for
MXC_CCM_CBCDR_PERIPH_CLK2_PODF_MASK.
3. Refactor get_mmdc_ch0_c

imx:mx6ul add clock support

1. Add enet, uart, i2c, ipg clock support for i.MX6UL.
2. Correct get_periph_clk, it should account for
MXC_CCM_CBCDR_PERIPH_CLK2_PODF_MASK.
3. Refactor get_mmdc_ch0_clk to make all i.MX6 share one function,
but not use 'ifdef'.
4. Use CONFIG_FSL_QSPI for enable_qspi_clk, but not #ifdef CONFIG_MX6SX.
5. Use CONFIG_PCIE_IMX for pcie clock settings, use CONFIG_CMD_SATA for
sata clock settings. In this way, we not need "#if defined(CONFIG_MX6Q)
|| defined....", only need one CONFIG_PCIE_IMX in header file.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>

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imx: mx6: ccm: Change the clock settings for i.MX6QP

Since i.MX6QP changes some CCM registers, so modify the clocks settings to
follow the hardware changes.

In c files, use runtime check and discar

imx: mx6: ccm: Change the clock settings for i.MX6QP

Since i.MX6QP changes some CCM registers, so modify the clocks settings to
follow the hardware changes.

In c files, use runtime check and discard #ifdef.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

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imx: mx6 add i2c4 clock support for i.MX6SX

Add I2C4 clock support for i.MX6SX. Since we use runtime check,
but not macro, we need to remove `#ifdef ..` in crm_regs.h, or
gcc will fail to compile th

imx: mx6 add i2c4 clock support for i.MX6SX

Add I2C4 clock support for i.MX6SX. Since we use runtime check,
but not macro, we need to remove `#ifdef ..` in crm_regs.h, or
gcc will fail to compile the code succesfully.

Making the macros only for i.MX6SX open to other i.MX6x maybe not
a good choice, but we have runtime check.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

arm, imx6, i2c: add I2C4 for MX6DL

add I2C4 modul for MX6DL based boards.

Signed-off-by: Heiko Schocher <hs@denx.de>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

ARM: imx6: disable bandgap self-bias after boot

The self-bias circuit is used by the bandgap during startup.
Once the bandgap has stabilized, the self-bias circuit should
be disabled for best noise

ARM: imx6: disable bandgap self-bias after boot

The self-bias circuit is used by the bandgap during startup.
Once the bandgap has stabilized, the self-bias circuit should
be disabled for best noise performance of analog blocks.
Also this bit should be disabled before the chip enters STOP mode or
when ever the regular bandgap is disabled.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

imx: mx6sl: Add perclk_clk_sel bit define in CCM

The MX6SL has the perclk_clk_sel to select the perclk source. Add
its define in CCM

Signed-off-by: Ye.Li <B37916@freescale.com>

arm: arch-mx6: typo fixes in crm_regs.h

fix typos in video pll related register names and bit defines

Signed-off-by: Soeren Moch <smoch@web.de>