| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx6/ |
| H A D | mxc_hdmi.h | 22 u8 design_id; /* 0x000 */ 23 u8 revision_id; /* 0x001 */ 24 u8 product_id0; /* 0x002 */ 25 u8 product_id1; /* 0x003 */ 26 u8 config0_id; /* 0x004 */ 27 u8 config1_id; /* 0x005 */ 28 u8 config2_id; /* 0x006 */ 29 u8 config3_id; /* 0x007 */ 30 u8 reserved1[0xf8]; 32 u8 ih_fc_stat0; /* 0x100 */ [all …]
|
| /rk3399_rockchip-uboot/board/freescale/common/ |
| H A D | pixis.h | 12 u8 id; 13 u8 ver; 14 u8 pver; 15 u8 csr; 16 u8 rst; 17 u8 rst2; 18 u8 aux1; 19 u8 spd; 20 u8 aux2; 21 u8 csr2; [all …]
|
| H A D | qixis.h | 14 u8 id; /* ID value uniquely identifying each QDS board type */ 15 u8 arch; /* Board version information */ 16 u8 scver; /* QIXIS Version Register */ 17 u8 model; /* Information of software programming model version */ 18 u8 tagdata; 19 u8 ctl_sys; 20 u8 aux; /* Auxiliary Register,0x06 */ 21 u8 clk_spd; 22 u8 stat_dut; 23 u8 stat_sys; [all …]
|
| H A D | ngpixis.h | 15 u8 id; 16 u8 arch; 17 u8 scver; 18 u8 csr; 19 u8 rst; 20 u8 serclk; 21 u8 aux; 22 u8 spd; 23 u8 brdcfg0; 24 u8 brdcfg1; /* On some boards, this register is called 'dma' */ [all …]
|
| /rk3399_rockchip-uboot/arch/m68k/include/asm/ |
| H A D | immap_5301x.h | 79 u8 rsvd1[19]; /* 0x00 - 0x12 */ 80 u8 wcr; /* 0x13 */ 83 u8 rsvd3[3]; /* 0x18 - 0x1A */ 84 u8 cwsr; /* 0x1B */ 85 u8 rsvd4[3]; /* 0x1C - 0x1E */ 86 u8 scmisr; /* 0x1F */ 88 u8 bcr; /* 0x24 */ 89 u8 rsvd6[74]; /* 0x25 - 0x6F */ 91 u8 rsvd7; /* 0x74 */ 92 u8 cfier; /* 0x75 */ [all …]
|
| H A D | immap_5445x.h | 75 u8 resv0[0x18]; 77 u8 resv1[0x6]; 83 u8 rcr; 84 u8 rsr; 89 u8 ccm_resv0[0x4]; 91 u8 resv1[0x2]; 94 u8 resv2[0x4]; 102 u8 podr_fec0h; /* FEC0 High Port Output Data Register */ 103 u8 podr_fec0l; /* FEC0 Low Port Output Data Register */ 104 u8 podr_ssi; /* SSI Port Output Data Register */ [all …]
|
| H A D | immap_5235.h | 65 u8 crsr; /* 0x10 Core Reset Status Register */ 66 u8 cwcr; /* 0x11 Core Watchdog Control Register */ 67 u8 lpicr; /* 0x12 Low-Power Interrupt Control Register */ 68 u8 cwsr; /* 0x13 Core Watchdog Service Register */ 72 u8 mpr; /* 0x20 */ 73 u8 res4[3]; /* 0x21 - 0x23 */ 74 u8 pacr0; /* 0x24 */ 75 u8 pacr1; /* 0x25 */ 76 u8 pacr2; /* 0x26 */ 77 u8 pacr3; /* 0x27 */ [all …]
|
| H A D | immap_5329.h | 95 u8 res1[19]; /* 0x00 - 0x12 */ 96 u8 wcr; /* 0x13 wakeup control register */ 99 u8 res3[3]; /* 0x18 - 0x1A */ 100 u8 cwsr; /* 0x1B Core Watchdog Service Register */ 101 u8 res4[2]; /* 0x1C - 0x1D */ 102 u8 scmisr; /* 0x1F Interrupt Status Register */ 107 u8 res7[4]; /* 0x71 - 0x74 */ 108 u8 cfier; /* 0x75 Core Fault Interrupt Enable Register */ 109 u8 cfloc; /* 0x76 Core Fault Location Register */ 110 u8 cfatr; /* 0x77 Core Fault Attributes Register */ [all …]
|
| H A D | immap_5275.h | 69 u8 crsr; 70 u8 cwcr; 71 u8 lpicr; 72 u8 cwsr; 73 u8 res3[8]; 75 u8 mpr; 76 u8 res4[3]; 77 u8 pacr0; 78 u8 pacr1; 79 u8 pacr2; [all …]
|
| H A D | immap_520x.h | 63 u8 rsvd1[19]; /* 0x00 - 0x12 */ 64 u8 wcr; /* 0x13 */ 67 u8 rsvd3[3]; /* 0x18 - 0x1A */ 68 u8 cwsr; /* 0x1B */ 69 u8 rsvd4[3]; /* 0x1C - 0x1E */ 70 u8 scmisr; /* 0x1F */ 71 u8 rsvd5[79]; /* 0x20 - 0x6F */ 73 u8 rsvd7; /* 0x74 */ 74 u8 cfier; /* 0x75 */ 75 u8 cfloc; /* 0x76 */ [all …]
|
| H A D | immap_5227x.h | 66 u8 rcr; 67 u8 rsr; 94 u8 podr_be; /* 0x00 */ 95 u8 podr_cs; /* 0x01 */ 96 u8 podr_fbctl; /* 0x02 */ 97 u8 podr_i2c; /* 0x03 */ 98 u8 rsvd1; /* 0x04 */ 99 u8 podr_uart; /* 0x05 */ 100 u8 podr_dspi; /* 0x06 */ 101 u8 podr_timer; /* 0x07 */ [all …]
|
| H A D | immap_5441x.h | 91 u8 resv0[0x18]; 93 u8 resv1[0x6]; 99 u8 rcr; 100 u8 rsr; 105 u8 ccm_resv0[0x4]; /* 0x00 */ 107 u8 resv1[0x2]; /* 0x06 */ 110 u8 resv2[0x2]; /* 0x0C */ 127 u8 podr_a; /* 0x00 */ 128 u8 podr_b; /* 0x01 */ 129 u8 podr_c; /* 0x02 */ [all …]
|
| H A D | immap_547x_8x.h | 90 u8 ocpw; 91 u8 octict; 92 u8 ctrl; 93 u8 mode; 99 u8 pwmop; /* Output Polarity */ 100 u8 pwmld; /* Immediate Update */ 103 u8 ovfpin; /* Ovf and Pin */ 104 u8 intr; /* Interrupts */ 121 u8 podr_fbctl; /*0x00 */ 122 u8 podr_fbcs; /*0x01 */ [all …]
|
| /rk3399_rockchip-uboot/include/rockchip/ |
| H A D | crypto_fix_test_data.h | 8 const u8 foo_data[] = { 33 const u8 ad_data[] = { 58 const u8 des_key[] = { 62 const u8 des_iv[] = { 66 const u8 des_ecb_cipher[] = { 89 const u8 des_cbc_cipher[] = { 112 const u8 des_cfb_cipher[] = { 135 const u8 des_ofb_cipher[] = { 158 const u8 tdes_key[] = { 164 const u8 tdes_iv[] = { [all …]
|
| /rk3399_rockchip-uboot/include/ |
| H A D | fis.h | 14 u8 fis_type; 15 u8 pm_port_c; 16 u8 command; 17 u8 features; 18 u8 lba_low; 19 u8 lba_mid; 20 u8 lba_high; 21 u8 device; 22 u8 lba_low_exp; 23 u8 lba_mid_exp; [all …]
|
| H A D | usbdescriptors.h | 183 u8 bLength; 184 u8 bDescriptorType; /* 0x5 */ 185 u8 bEndpointAddress; 186 u8 bmAttributes; 188 u8 bInterval; 192 u8 bLength; 193 u8 bDescriptorType; /* 0x04 */ 194 u8 bInterfaceNumber; 195 u8 bAlternateSetting; 196 u8 bNumEndpoints; [all …]
|
| H A D | smbios.h | 36 u8 anchor[4]; 37 u8 checksum; 38 u8 length; 39 u8 major_ver; 40 u8 minor_ver; 42 u8 entry_point_rev; 43 u8 formatted_area[5]; 44 u8 intermediate_anchor[5]; 45 u8 intermediate_checksum; 49 u8 bcd_rev; [all …]
|
| /rk3399_rockchip-uboot/board/keymile/common/ |
| H A D | common.h | 52 u8 xi_ena; /* General defect enable */ 53 u8 pack1[3]; 54 u8 en_csn; 55 u8 pack2; 56 u8 safe_mem; 57 u8 pack3; 58 u8 id; 59 u8 pack4; 60 u8 rev; 61 u8 build; [all …]
|
| /rk3399_rockchip-uboot/arch/m68k/include/asm/coldfire/ |
| H A D | ata.h | 16 u8 toff; /* 0x00 */ 17 u8 ton; /* 0x01 */ 18 u8 t1; /* 0x02 */ 19 u8 t2w; /* 0x03 */ 20 u8 t2r; /* 0x04 */ 21 u8 ta; /* 0x05 */ 22 u8 trd; /* 0x06 */ 23 u8 t4; /* 0x07 */ 24 u8 t9; /* 0x08 */ 27 u8 tm; /* 0x09 */ [all …]
|
| H A D | intctrl.h | 28 u8 irlr; /* 0x18 */ 29 u8 iacklpr; /* 0x19 */ 34 u8 simr0; /* 0x1C Set Interrupt Mask */ 35 u8 cimr0; /* 0x1D Clear Interrupt Mask */ 36 u8 clmask0; /* 0x1E Current Level Mask */ 37 u8 slmask; /* 0x1F Saved Level Mask */ 40 u8 icr0[64]; /* 0x40 - 0x7F Control registers */ 42 u8 swiack0; /* 0xE0 Software Interrupt ack */ 43 u8 res4[3]; /* 0xE1 - 0xE3 */ 44 u8 L1iack0; /* 0xE4 Level n interrupt ack */ [all …]
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-vf610/ |
| H A D | ddrmc-vf610.h | 15 u8 tinit; 18 u8 wrlat; 19 u8 caslat_lin; 20 u8 trc; 21 u8 trrd; 22 u8 tccd; 23 u8 tbst_int_interval; 24 u8 tfaw; 25 u8 trp; 26 u8 twtr; [all …]
|
| /rk3399_rockchip-uboot/drivers/bios_emulator/include/x86emu/ |
| H A D | prim_ops.h | 49 u16 aam_word (u8 d); 50 u8 adc_byte (u8 d, u8 s); 53 u8 add_byte (u8 d, u8 s); 56 u8 and_byte (u8 d, u8 s); 59 u8 cmp_byte (u8 d, u8 s); 62 u8 daa_byte (u8 d); 63 u8 das_byte (u8 d); 64 u8 dec_byte (u8 d); 67 u8 inc_byte (u8 d); 70 u8 or_byte (u8 d, u8 s); [all …]
|
| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 37 u8 res0[0x04]; 39 u8 res1[0x14]; 41 u8 res2[0x20]; 43 u8 res3[0x10]; 45 u8 res4[0x10]; 47 u8 res5[0x50]; 51 u8 res6[0x04]; 55 u8 res7[0x04]; 61 u8 res8[0xC]; 72 u8 res9b[0xAC]; [all …]
|
| H A D | immap_85xx.h | 30 u8 res1[4]; 34 u8 res2[4]; 38 u8 res3[0xbd4]; 43 u8 res4[4]; 45 u8 res35[0x204]; 51 u8 res1[4]; 53 u8 res2[4]; 55 u8 res3[12]; 57 u8 res4[3044]; 59 u8 res5[4]; [all …]
|
| /rk3399_rockchip-uboot/include/usb/ |
| H A D | ulpi.h | 131 int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value); 140 u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg); 166 u8 vendor_id_low; 167 u8 vendor_id_high; 168 u8 product_id_low; 169 u8 product_id_high; 171 u8 function_ctrl; /* 0x04 Write */ 172 u8 function_ctrl_set; /* 0x05 Set */ 173 u8 function_ctrl_clear; /* 0x06 Clear */ 175 u8 iface_ctrl; /* 0x07 Write */ [all …]
|