145370e18SAlison Wang /* 245370e18SAlison Wang * MCF5441x Internal Memory Map 345370e18SAlison Wang * 445370e18SAlison Wang * Copyright 2010-2012 Freescale Semiconductor, Inc. 545370e18SAlison Wang * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 645370e18SAlison Wang * 7*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 845370e18SAlison Wang */ 945370e18SAlison Wang 1045370e18SAlison Wang #ifndef __IMMAP_5441X__ 1145370e18SAlison Wang #define __IMMAP_5441X__ 1245370e18SAlison Wang 1345370e18SAlison Wang /* Module Base Addresses */ 1445370e18SAlison Wang #define MMAP_XBS 0xFC004000 1545370e18SAlison Wang #define MMAP_FBCS 0xFC008000 1645370e18SAlison Wang #define MMAP_CAN0 0xFC020000 1745370e18SAlison Wang #define MMAP_CAN1 0xFC024000 1845370e18SAlison Wang #define MMAP_I2C1 0xFC038000 1945370e18SAlison Wang #define MMAP_DSPI1 0xFC03C000 2045370e18SAlison Wang #define MMAP_SCM 0xFC040000 2145370e18SAlison Wang #define MMAP_PM 0xFC04002C 2245370e18SAlison Wang #define MMAP_EDMA 0xFC044000 2345370e18SAlison Wang #define MMAP_INTC0 0xFC048000 2445370e18SAlison Wang #define MMAP_INTC1 0xFC04C000 2545370e18SAlison Wang #define MMAP_INTC2 0xFC050000 2645370e18SAlison Wang #define MMAP_IACK 0xFC054000 2745370e18SAlison Wang #define MMAP_I2C0 0xFC058000 2845370e18SAlison Wang #define MMAP_DSPI0 0xFC05C000 2945370e18SAlison Wang #define MMAP_UART0 0xFC060000 3045370e18SAlison Wang #define MMAP_UART1 0xFC064000 3145370e18SAlison Wang #define MMAP_UART2 0xFC068000 3245370e18SAlison Wang #define MMAP_UART3 0xFC06C000 3345370e18SAlison Wang #define MMAP_DTMR0 0xFC070000 3445370e18SAlison Wang #define MMAP_DTMR1 0xFC074000 3545370e18SAlison Wang #define MMAP_DTMR2 0xFC078000 3645370e18SAlison Wang #define MMAP_DTMR3 0xFC07C000 3745370e18SAlison Wang #define MMAP_PIT0 0xFC080000 3845370e18SAlison Wang #define MMAP_PIT1 0xFC084000 3945370e18SAlison Wang #define MMAP_PIT2 0xFC088000 4045370e18SAlison Wang #define MMAP_PIT3 0xFC08C000 4145370e18SAlison Wang #define MMAP_EPORT0 0xFC090000 4245370e18SAlison Wang #define MMAP_ADC 0xFC094000 4345370e18SAlison Wang #define MMAP_DAC0 0xFC098000 4445370e18SAlison Wang #define MMAP_DAC1 0xFC09C000 4545370e18SAlison Wang #define MMAP_RRTC 0xFC0A8000 4645370e18SAlison Wang #define MMAP_SIM 0xFC0AC000 4745370e18SAlison Wang #define MMAP_USBOTG 0xFC0B0000 4845370e18SAlison Wang #define MMAP_USBEHCI 0xFC0B4000 4945370e18SAlison Wang #define MMAP_SDRAM 0xFC0B8000 5045370e18SAlison Wang #define MMAP_SSI0 0xFC0BC000 5145370e18SAlison Wang #define MMAP_PLL 0xFC0C0000 5245370e18SAlison Wang #define MMAP_RNG 0xFC0C4000 5345370e18SAlison Wang #define MMAP_SSI1 0xFC0C8000 5445370e18SAlison Wang #define MMAP_ESDHC 0xFC0CC000 5545370e18SAlison Wang #define MMAP_FEC0 0xFC0D4000 5645370e18SAlison Wang #define MMAP_FEC1 0xFC0D8000 5745370e18SAlison Wang #define MMAP_L2_SW0 0xFC0DC000 5845370e18SAlison Wang #define MMAP_L2_SW1 0xFC0E0000 5945370e18SAlison Wang 6045370e18SAlison Wang #define MMAP_NFC_RAM 0xFC0FC000 6145370e18SAlison Wang #define MMAP_NFC 0xFC0FF000 6245370e18SAlison Wang 6345370e18SAlison Wang #define MMAP_1WIRE 0xEC008000 6445370e18SAlison Wang #define MMAP_I2C2 0xEC010000 6545370e18SAlison Wang #define MMAP_I2C3 0xEC014000 6645370e18SAlison Wang #define MMAP_I2C4 0xEC018000 6745370e18SAlison Wang #define MMAP_I2C5 0xEC01C000 6845370e18SAlison Wang #define MMAP_DSPI2 0xEC038000 6945370e18SAlison Wang #define MMAP_DSPI3 0xEC03C000 7045370e18SAlison Wang #define MMAP_UART4 0xEC060000 7145370e18SAlison Wang #define MMAP_UART5 0xEC064000 7245370e18SAlison Wang #define MMAP_UART6 0xEC068000 7345370e18SAlison Wang #define MMAP_UART7 0xEC06C000 7445370e18SAlison Wang #define MMAP_UART8 0xEC070000 7545370e18SAlison Wang #define MMAP_UART9 0xEC074000 7645370e18SAlison Wang #define MMAP_RCM 0xEC090000 7745370e18SAlison Wang #define MMAP_CCM 0xEC090000 7845370e18SAlison Wang #define MMAP_GPIO 0xEC094000 7945370e18SAlison Wang 8045370e18SAlison Wang #include <asm/coldfire/crossbar.h> 8145370e18SAlison Wang #include <asm/coldfire/dspi.h> 8245370e18SAlison Wang #include <asm/coldfire/edma.h> 8345370e18SAlison Wang #include <asm/coldfire/eport.h> 8445370e18SAlison Wang #include <asm/coldfire/flexbus.h> 8545370e18SAlison Wang #include <asm/coldfire/flexcan.h> 8645370e18SAlison Wang #include <asm/coldfire/intctrl.h> 8745370e18SAlison Wang #include <asm/coldfire/ssi.h> 8845370e18SAlison Wang 8945370e18SAlison Wang /* Serial Boot Facility (SBF) */ 9045370e18SAlison Wang typedef struct sbf { 9145370e18SAlison Wang u8 resv0[0x18]; 9245370e18SAlison Wang u16 sbfsr; /* Serial Boot Facility Status */ 9345370e18SAlison Wang u8 resv1[0x6]; 9445370e18SAlison Wang u16 sbfcr; /* Serial Boot Facility Control */ 9545370e18SAlison Wang } sbf_t; 9645370e18SAlison Wang 9745370e18SAlison Wang /* Reset Controller Module (RCM) */ 9845370e18SAlison Wang typedef struct rcm { 9945370e18SAlison Wang u8 rcr; 10045370e18SAlison Wang u8 rsr; 10145370e18SAlison Wang } rcm_t; 10245370e18SAlison Wang 10345370e18SAlison Wang /* Chip Configuration Module (CCM) */ 10445370e18SAlison Wang typedef struct ccm { 10545370e18SAlison Wang u8 ccm_resv0[0x4]; /* 0x00 */ 10645370e18SAlison Wang u16 ccr; /* 0x04 Chip Configuration */ 10745370e18SAlison Wang u8 resv1[0x2]; /* 0x06 */ 10845370e18SAlison Wang u16 rcon; /* 0x08 Reset Configuration */ 10945370e18SAlison Wang u16 cir; /* 0x0A Chip Identification */ 11045370e18SAlison Wang u8 resv2[0x2]; /* 0x0C */ 11145370e18SAlison Wang u16 misccr; /* 0x0E Miscellaneous Control */ 11245370e18SAlison Wang u16 cdrh; /* 0x10 Clock Divider */ 11345370e18SAlison Wang u16 cdrl; /* 0x12 Clock Divider */ 11445370e18SAlison Wang u16 uocsr; /* 0x14 USB On-the-Go Controller Status */ 11545370e18SAlison Wang u16 uhcsr; /* 0x16 */ 11645370e18SAlison Wang u16 misccr3; /* 0x18 */ 11745370e18SAlison Wang u16 misccr2; /* 0x1A */ 11845370e18SAlison Wang u16 adctsr; /* 0x1C */ 11945370e18SAlison Wang u16 dactsr; /* 0x1E */ 12045370e18SAlison Wang u16 sbfsr; /* 0x20 */ 12145370e18SAlison Wang u16 sbfcr; /* 0x22 */ 12245370e18SAlison Wang u32 fnacr; /* 0x24 */ 12345370e18SAlison Wang } ccm_t; 12445370e18SAlison Wang 12545370e18SAlison Wang /* General Purpose I/O Module (GPIO) */ 12645370e18SAlison Wang typedef struct gpio { 12745370e18SAlison Wang u8 podr_a; /* 0x00 */ 12845370e18SAlison Wang u8 podr_b; /* 0x01 */ 12945370e18SAlison Wang u8 podr_c; /* 0x02 */ 13045370e18SAlison Wang u8 podr_d; /* 0x03 */ 13145370e18SAlison Wang u8 podr_e; /* 0x04 */ 13245370e18SAlison Wang u8 podr_f; /* 0x05 */ 13345370e18SAlison Wang u8 podr_g; /* 0x06 */ 13445370e18SAlison Wang u8 podr_h; /* 0x07 */ 13545370e18SAlison Wang u8 podr_i; /* 0x08 */ 13645370e18SAlison Wang u8 podr_j; /* 0x09 */ 13745370e18SAlison Wang u8 podr_k; /* 0x0A */ 13845370e18SAlison Wang u8 rsvd0; /* 0x0B */ 13945370e18SAlison Wang 14045370e18SAlison Wang u8 pddr_a; /* 0x0C */ 14145370e18SAlison Wang u8 pddr_b; /* 0x0D */ 14245370e18SAlison Wang u8 pddr_c; /* 0x0E */ 14345370e18SAlison Wang u8 pddr_d; /* 0x0F */ 14445370e18SAlison Wang u8 pddr_e; /* 0x10 */ 14545370e18SAlison Wang u8 pddr_f; /* 0x11 */ 14645370e18SAlison Wang u8 pddr_g; /* 0x12 */ 14745370e18SAlison Wang u8 pddr_h; /* 0x13 */ 14845370e18SAlison Wang u8 pddr_i; /* 0x14 */ 14945370e18SAlison Wang u8 pddr_j; /* 0x15 */ 15045370e18SAlison Wang u8 pddr_k; /* 0x16 */ 15145370e18SAlison Wang u8 rsvd1; /* 0x17 */ 15245370e18SAlison Wang 15345370e18SAlison Wang u8 ppdsdr_a; /* 0x18 */ 15445370e18SAlison Wang u8 ppdsdr_b; /* 0x19 */ 15545370e18SAlison Wang u8 ppdsdr_c; /* 0x1A */ 15645370e18SAlison Wang u8 ppdsdr_d; /* 0x1B */ 15745370e18SAlison Wang u8 ppdsdr_e; /* 0x1C */ 15845370e18SAlison Wang u8 ppdsdr_f; /* 0x1D */ 15945370e18SAlison Wang u8 ppdsdr_g; /* 0x1E */ 16045370e18SAlison Wang u8 ppdsdr_h; /* 0x1F */ 16145370e18SAlison Wang u8 ppdsdr_i; /* 0x20 */ 16245370e18SAlison Wang u8 ppdsdr_j; /* 0x21 */ 16345370e18SAlison Wang u8 ppdsdr_k; /* 0x22 */ 16445370e18SAlison Wang u8 rsvd2; /* 0x23 */ 16545370e18SAlison Wang 16645370e18SAlison Wang u8 pclrr_a; /* 0x24 */ 16745370e18SAlison Wang u8 pclrr_b; /* 0x25 */ 16845370e18SAlison Wang u8 pclrr_c; /* 0x26 */ 16945370e18SAlison Wang u8 pclrr_d; /* 0x27 */ 17045370e18SAlison Wang u8 pclrr_e; /* 0x28 */ 17145370e18SAlison Wang u8 pclrr_f; /* 0x29 */ 17245370e18SAlison Wang u8 pclrr_g; /* 0x2A */ 17345370e18SAlison Wang u8 pclrr_h; /* 0x2B */ 17445370e18SAlison Wang u8 pclrr_i; /* 0x2C */ 17545370e18SAlison Wang u8 pclrr_j; /* 0x2D */ 17645370e18SAlison Wang u8 pclrr_k; /* 0x2E */ 17745370e18SAlison Wang u8 rsvd3; /* 0x2F */ 17845370e18SAlison Wang 17945370e18SAlison Wang u16 pcr_a; /* 0x30 */ 18045370e18SAlison Wang u16 pcr_b; /* 0x32 */ 18145370e18SAlison Wang u16 pcr_c; /* 0x34 */ 18245370e18SAlison Wang u16 pcr_d; /* 0x36 */ 18345370e18SAlison Wang u16 pcr_e; /* 0x38 */ 18445370e18SAlison Wang u16 pcr_f; /* 0x3A */ 18545370e18SAlison Wang u16 pcr_g; /* 0x3C */ 18645370e18SAlison Wang u16 pcr_h; /* 0x3E */ 18745370e18SAlison Wang u16 pcr_i; /* 0x40 */ 18845370e18SAlison Wang u16 pcr_j; /* 0x42 */ 18945370e18SAlison Wang u16 pcr_k; /* 0x44 */ 19045370e18SAlison Wang u16 rsvd4; /* 0x46 */ 19145370e18SAlison Wang 19245370e18SAlison Wang u8 par_fbctl; /* 0x48 */ 19345370e18SAlison Wang u8 par_be; /* 0x49 */ 19445370e18SAlison Wang u8 par_cs; /* 0x4A */ 19545370e18SAlison Wang u8 par_cani2c; /* 0x4B */ 19645370e18SAlison Wang u8 par_irqh; /* 0x4C */ 19745370e18SAlison Wang u8 par_irql; /* 0x4D */ 19845370e18SAlison Wang u8 par_dspi0; /* 0x4E */ 19945370e18SAlison Wang u8 par_dspiow; /* 0x4F */ 20045370e18SAlison Wang u8 par_timer; /* 0x50 */ 20145370e18SAlison Wang u8 par_uart2; /* 0x51 */ 20245370e18SAlison Wang u8 par_uart1; /* 0x52 */ 20345370e18SAlison Wang u8 par_uart0; /* 0x53 */ 20445370e18SAlison Wang u8 par_sdhch; /* 0x54 */ 20545370e18SAlison Wang u8 par_sdhcl; /* 0x55 */ 20645370e18SAlison Wang u8 par_simp0h; /* 0x56 */ 20745370e18SAlison Wang u8 par_simp1h; /* 0x57 */ 20845370e18SAlison Wang u8 par_ssi0h; /* 0x58 */ 20945370e18SAlison Wang u8 par_ssi0l; /* 0x59 */ 21045370e18SAlison Wang u8 par_dbg1h; /* 0x5A */ 21145370e18SAlison Wang u8 par_dbg0h; /* 0x5B */ 21245370e18SAlison Wang u8 par_dbgl; /* 0x5C */ 21345370e18SAlison Wang u8 rsvd5; /* 0x5D */ 21445370e18SAlison Wang u8 par_fec; /* 0x5E */ 21545370e18SAlison Wang u8 rsvd6; /* 0x5F */ 21645370e18SAlison Wang 21745370e18SAlison Wang u8 mscr_sdram; /* 0x60 */ 21845370e18SAlison Wang u8 rsvd7[3]; /* 0x61-0x63 */ 21945370e18SAlison Wang 22045370e18SAlison Wang u8 srcr_fb1; /* 0x64 */ 22145370e18SAlison Wang u8 srcr_fb2; /* 0x65 */ 22245370e18SAlison Wang u8 srcr_fb3; /* 0x66 */ 22345370e18SAlison Wang u8 srcr_fb4; /* 0x67 */ 22445370e18SAlison Wang u8 srcr_dspiow; /* 0x68 */ 22545370e18SAlison Wang u8 srcr_cani2c; /* 0x69 */ 22645370e18SAlison Wang u8 srcr_irq; /* 0x6A */ 22745370e18SAlison Wang u8 srcr_timer; /* 0x6B */ 22845370e18SAlison Wang u8 srcr_uart; /* 0x6C */ 22945370e18SAlison Wang u8 srcr_fec; /* 0x6D */ 23045370e18SAlison Wang u8 srcr_sdhc; /* 0x6E */ 23145370e18SAlison Wang u8 srcr_simp0; /* 0x6F */ 23245370e18SAlison Wang u8 srcr_ssi0; /* 0x70 */ 23345370e18SAlison Wang u8 rsvd8[3]; /* 0x71-0x73 */ 23445370e18SAlison Wang 23545370e18SAlison Wang u16 urts_pol; /* 0x74 */ 23645370e18SAlison Wang u16 ucts_pol; /* 0x76 */ 23745370e18SAlison Wang u16 utxd_wom; /* 0x78 */ 23845370e18SAlison Wang u32 urxd_wom; /* 0x7c */ 23945370e18SAlison Wang 24045370e18SAlison Wang u32 hcr1; /* 0x80 */ 24145370e18SAlison Wang u32 hcr0; /* 0x84 */ 24245370e18SAlison Wang } gpio_t; 24345370e18SAlison Wang 24445370e18SAlison Wang /* SDRAM Controller (SDRAMC) */ 24545370e18SAlison Wang typedef struct sdramc { 24645370e18SAlison Wang u32 cr00; /* 0x00 */ 24745370e18SAlison Wang u32 cr01; /* 0x04 */ 24845370e18SAlison Wang u32 cr02; /* 0x08 */ 24945370e18SAlison Wang u32 cr03; /* 0x0C */ 25045370e18SAlison Wang u32 cr04; /* 0x10 */ 25145370e18SAlison Wang u32 cr05; /* 0x14 */ 25245370e18SAlison Wang u32 cr06; /* 0x18 */ 25345370e18SAlison Wang u32 cr07; /* 0x1C */ 25445370e18SAlison Wang 25545370e18SAlison Wang u32 cr08; /* 0x20 */ 25645370e18SAlison Wang u32 cr09; /* 0x24 */ 25745370e18SAlison Wang u32 cr10; /* 0x28 */ 25845370e18SAlison Wang u32 cr11; /* 0x2C */ 25945370e18SAlison Wang u32 cr12; /* 0x30 */ 26045370e18SAlison Wang u32 cr13; /* 0x34 */ 26145370e18SAlison Wang u32 cr14; /* 0x38 */ 26245370e18SAlison Wang u32 cr15; /* 0x3C */ 26345370e18SAlison Wang 26445370e18SAlison Wang u32 cr16; /* 0x40 */ 26545370e18SAlison Wang u32 cr17; /* 0x44 */ 26645370e18SAlison Wang u32 cr18; /* 0x48 */ 26745370e18SAlison Wang u32 cr19; /* 0x4C */ 26845370e18SAlison Wang u32 cr20; /* 0x50 */ 26945370e18SAlison Wang u32 cr21; /* 0x54 */ 27045370e18SAlison Wang u32 cr22; /* 0x58 */ 27145370e18SAlison Wang u32 cr23; /* 0x5C */ 27245370e18SAlison Wang 27345370e18SAlison Wang u32 cr24; /* 0x60 */ 27445370e18SAlison Wang u32 cr25; /* 0x64 */ 27545370e18SAlison Wang u32 cr26; /* 0x68 */ 27645370e18SAlison Wang u32 cr27; /* 0x6C */ 27745370e18SAlison Wang u32 cr28; /* 0x70 */ 27845370e18SAlison Wang u32 cr29; /* 0x74 */ 27945370e18SAlison Wang u32 cr30; /* 0x78 */ 28045370e18SAlison Wang u32 cr31; /* 0x7C */ 28145370e18SAlison Wang 28245370e18SAlison Wang u32 cr32; /* 0x80 */ 28345370e18SAlison Wang u32 cr33; /* 0x84 */ 28445370e18SAlison Wang u32 cr34; /* 0x88 */ 28545370e18SAlison Wang u32 cr35; /* 0x8C */ 28645370e18SAlison Wang u32 cr36; /* 0x90 */ 28745370e18SAlison Wang u32 cr37; /* 0x94 */ 28845370e18SAlison Wang u32 cr38; /* 0x98 */ 28945370e18SAlison Wang u32 cr39; /* 0x9C */ 29045370e18SAlison Wang 29145370e18SAlison Wang u32 cr40; /* 0xA0 */ 29245370e18SAlison Wang u32 cr41; /* 0xA4 */ 29345370e18SAlison Wang u32 cr42; /* 0xA8 */ 29445370e18SAlison Wang u32 cr43; /* 0xAC */ 29545370e18SAlison Wang u32 cr44; /* 0xB0 */ 29645370e18SAlison Wang u32 cr45; /* 0xB4 */ 29745370e18SAlison Wang u32 cr46; /* 0xB8 */ 29845370e18SAlison Wang u32 cr47; /* 0xBC */ 29945370e18SAlison Wang u32 cr48; /* 0xC0 */ 30045370e18SAlison Wang u32 cr49; /* 0xC4 */ 30145370e18SAlison Wang u32 cr50; /* 0xC8 */ 30245370e18SAlison Wang u32 cr51; /* 0xCC */ 30345370e18SAlison Wang u32 cr52; /* 0xD0 */ 30445370e18SAlison Wang u32 cr53; /* 0xD4 */ 30545370e18SAlison Wang u32 cr54; /* 0xD8 */ 30645370e18SAlison Wang u32 cr55; /* 0xDC */ 30745370e18SAlison Wang u32 cr56; /* 0xE0 */ 30845370e18SAlison Wang u32 cr57; /* 0xE4 */ 30945370e18SAlison Wang u32 cr58; /* 0xE8 */ 31045370e18SAlison Wang u32 cr59; /* 0xEC */ 31145370e18SAlison Wang u32 cr60; /* 0xF0 */ 31245370e18SAlison Wang u32 cr61; /* 0xF4 */ 31345370e18SAlison Wang u32 cr62; /* 0xF8 */ 31445370e18SAlison Wang u32 cr63; /* 0xFC */ 31545370e18SAlison Wang 31645370e18SAlison Wang u32 rsvd3[32]; /* 0xF4-0x1A8 */ 31745370e18SAlison Wang 31845370e18SAlison Wang u32 rcrcr; /* 0x180 */ 31945370e18SAlison Wang u32 swrcr; /* 0x184 */ 32045370e18SAlison Wang u32 rcr; /* 0x188 */ 32145370e18SAlison Wang u32 msovr; /* 0x18C */ 32245370e18SAlison Wang u32 rcrdbg; /* 0x190 */ 32345370e18SAlison Wang u32 sl0adj; /* 0x194 */ 32445370e18SAlison Wang u32 sl1adj; /* 0x198 */ 32545370e18SAlison Wang u32 sl2adj; /* 0x19C */ 32645370e18SAlison Wang u32 sl3adj; /* 0x1A0 */ 32745370e18SAlison Wang u32 sl4adj; /* 0x1A4 */ 32845370e18SAlison Wang u32 flight_tm; /* 0x1A8 */ 32945370e18SAlison Wang u32 padcr; /* 0x1AC */ 33045370e18SAlison Wang } sdramc_t; 33145370e18SAlison Wang 33245370e18SAlison Wang /* Phase Locked Loop (PLL) */ 33345370e18SAlison Wang typedef struct pll { 33445370e18SAlison Wang u32 pcr; /* Control */ 33545370e18SAlison Wang u32 pdr; /* Divider */ 33645370e18SAlison Wang u32 psr; /* Status */ 33745370e18SAlison Wang } pll_t; 33845370e18SAlison Wang 33945370e18SAlison Wang typedef struct scm { 34045370e18SAlison Wang u8 rsvd1[19]; /* 0x00 - 0x12 */ 34145370e18SAlison Wang u8 wcr; /* 0x13 */ 34245370e18SAlison Wang u16 rsvd2; /* 0x14 - 0x15 */ 34345370e18SAlison Wang u16 cwcr; /* 0x16 */ 34445370e18SAlison Wang u8 rsvd3[3]; /* 0x18 - 0x1A */ 34545370e18SAlison Wang u8 cwsr; /* 0x1B */ 34645370e18SAlison Wang u8 rsvd4[3]; /* 0x1C - 0x1E */ 34745370e18SAlison Wang u8 scmisr; /* 0x1F */ 34845370e18SAlison Wang u32 rsvd5; /* 0x20 - 0x23 */ 34945370e18SAlison Wang u32 bcr; /* 0x24 */ 35045370e18SAlison Wang u8 rsvd6[72]; /* 0x28 - 0x6F */ 35145370e18SAlison Wang u32 cfadr; /* 0x70 */ 35245370e18SAlison Wang u8 rsvd7; /* 0x74 */ 35345370e18SAlison Wang u8 cfier; /* 0x75 */ 35445370e18SAlison Wang u8 cfloc; /* 0x76 */ 35545370e18SAlison Wang u8 cfatr; /* 0x77 */ 35645370e18SAlison Wang u32 rsvd8; /* 0x78 - 0x7B */ 35745370e18SAlison Wang u32 cfdtr; /* 0x7C */ 35845370e18SAlison Wang } scm_t; 35945370e18SAlison Wang 36045370e18SAlison Wang typedef struct pm { 36145370e18SAlison Wang u8 pmsr0; /* */ 36245370e18SAlison Wang u8 pmcr0; 36345370e18SAlison Wang u8 pmsr1; 36445370e18SAlison Wang u8 pmcr1; 36545370e18SAlison Wang u32 pmhr0; 36645370e18SAlison Wang u32 pmlr0; 36745370e18SAlison Wang u32 pmhr1; 36845370e18SAlison Wang u32 pmlr1; 36945370e18SAlison Wang } pm_t; 37045370e18SAlison Wang 37145370e18SAlison Wang #endif /* __IMMAP_5441X__ */ 372