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Searched refs:rx_desc (Results 1 – 17 of 17) sorted by relevance

/rk3399_rockchip-uboot/drivers/net/
H A Darmada100_fec.h116 (((sizeof(struct rx_desc) / PKTALIGN) + 1) * PKTALIGN)
143 struct rx_desc { struct
148 struct rx_desc *nxtdesc_p; /* Next descriptor pointer */ argument
188 struct rx_desc *rxfdp[4]; /* Ethernet First Rx Descriptor
191 struct rx_desc *rxcdp[4]; /* Ethernet Current Rx Descriptor
202 struct rx_desc *p_rxdesc;
203 struct rx_desc *p_rxdesc_curr;
H A Dpch_gbe.c115 struct pch_gbe_rx_desc *rx_desc = &priv->rx_desc[0]; in pch_gbe_rx_descs_init() local
118 memset(rx_desc, 0, sizeof(struct pch_gbe_rx_desc) * PCH_GBE_DESC_NUM); in pch_gbe_rx_descs_init()
120 rx_desc[i].buffer_addr = dm_pci_virt_to_mem(priv->dev, in pch_gbe_rx_descs_init()
123 flush_dcache_range((ulong)rx_desc, (ulong)&rx_desc[PCH_GBE_DESC_NUM]); in pch_gbe_rx_descs_init()
125 writel(dm_pci_virt_to_mem(priv->dev, rx_desc), in pch_gbe_rx_descs_init()
130 writel(dm_pci_virt_to_mem(priv->dev, rx_desc + 1), in pch_gbe_rx_descs_init()
293 struct pch_gbe_rx_desc *rx_desc; in pch_gbe_recv() local
297 rx_desc = &priv->rx_desc[priv->rx_idx]; in pch_gbe_recv()
303 if (virt_to_phys(rx_desc) == hw_desc) in pch_gbe_recv()
307 invalidate_dcache_range((ulong)rx_desc, (ulong)&rx_desc[1]); in pch_gbe_recv()
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H A Dravb.c117 struct ravb_rxdesc rx_desc[RAVB_NUM_RX_DESC]; member
175 struct ravb_rxdesc *desc = &eth->rx_desc[eth->rx_desc_idx]; in ravb_recv()
201 struct ravb_rxdesc *desc = &eth->rx_desc[eth->rx_desc_idx]; in ravb_free_pkt()
209 desc = &eth->rx_desc[eth->rx_desc_idx]; in ravb_free_pkt()
274 memset(eth->rx_desc, 0x0, desc_size); in ravb_rx_desc_init()
278 eth->rx_desc[i].data.ctrl = RAVB_DESC_DT_EEMPTY | in ravb_rx_desc_init()
280 eth->rx_desc[i].data.dptr = (uintptr_t)eth->rx_desc[i].packet; in ravb_rx_desc_init()
282 eth->rx_desc[i].link.ctrl = RAVB_DESC_DT_LINKFIX; in ravb_rx_desc_init()
283 eth->rx_desc[i].link.dptr = (uintptr_t)&eth->rx_desc[i + 1]; in ravb_rx_desc_init()
287 eth->rx_desc[RAVB_NUM_RX_DESC - 1].link.ctrl = RAVB_DESC_DT_LINKFIX; in ravb_rx_desc_init()
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H A Daltera_tse.c183 struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; in altera_tse_recv_sgdma() local
186 if (rx_desc->descriptor_status & in altera_tse_recv_sgdma()
189 packet_length = rx_desc->actual_bytes_transferred; in altera_tse_recv_sgdma()
203 struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; in altera_tse_free_pkt_sgdma() local
206 rx_desc, in altera_tse_free_pkt_sgdma()
207 rx_desc + 1, in altera_tse_free_pkt_sgdma()
217 alt_sgdma_start_transfer(priv->sgdma_rx, rx_desc); in altera_tse_free_pkt_sgdma()
248 struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; in altera_tse_stop_sgdma() local
252 rx_desc->descriptor_control = 0; in altera_tse_stop_sgdma()
357 struct msgdma_extended_desc *desc = priv->rx_desc; in altera_tse_free_pkt_msgdma()
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H A Ddavinci_emac.c420 volatile emac_desc *rx_desc; in davinci_eth_open() local
446 rx_desc = emac_rx_desc; in davinci_eth_open()
474 rx_desc->next = BD_TO_HW((u_int32_t)(rx_desc + 1)); in davinci_eth_open()
475 rx_desc->buffer = &emac_rx_buffers[cnt * EMAC_RXBUF_SIZE]; in davinci_eth_open()
476 rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; in davinci_eth_open()
477 rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; in davinci_eth_open()
478 rx_desc++; in davinci_eth_open()
482 rx_desc--; in davinci_eth_open()
483 rx_desc->next = 0; in davinci_eth_open()
484 emac_rx_active_tail = rx_desc; in davinci_eth_open()
H A Dmvneta.c527 int rx_desc = rxq->next_desc_to_proc; in mvneta_rxq_next_desc_get() local
529 rxq->next_desc_to_proc = MVNETA_QUEUE_NEXT_DESC(rxq, rx_desc); in mvneta_rxq_next_desc_get()
530 return rxq->descs + rx_desc; in mvneta_rxq_next_desc_get()
894 static void mvneta_rx_desc_fill(struct mvneta_rx_desc *rx_desc, in mvneta_rx_desc_fill() argument
897 rx_desc->buf_cookie = cookie; in mvneta_rx_desc_fill()
898 rx_desc->buf_phys_addr = phys_addr; in mvneta_rx_desc_fill()
935 struct mvneta_rx_desc *rx_desc) in mvneta_rx_error() argument
937 u32 status = rx_desc->status; in mvneta_rx_error()
942 status, rx_desc->data_size); in mvneta_rx_error()
949 status, rx_desc->data_size); in mvneta_rx_error()
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H A Duli526x.c98 struct rx_desc { struct
101 struct rx_desc *next_rx_desc; argument
129 struct rx_desc *first_rx_desc;
130 struct rx_desc *rx_ready_ptr; /* packet come pointer */
182 static void uli526x_reuse_buf(struct rx_desc *);
542 struct rx_desc *rxptr; in uli526x_rx_packet()
611 static void uli526x_reuse_buf(struct rx_desc *rxptr) in uli526x_reuse_buf()
628 struct rx_desc *tmp_rx; in uli526x_descriptor_init()
677 tmp_rx_dma += sizeof(struct rx_desc); in uli526x_descriptor_init()
707 struct rx_desc *rxptr; in allocate_rx_buffer()
H A Ddwc_eth_qos.c1456 struct eqos_desc *rx_desc = &(eqos->rx_descs[i]); in eqos_enable() local
1457 rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf + in eqos_enable()
1459 rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V; in eqos_enable()
1461 eqos->config->ops->eqos_flush_desc(rx_desc); in eqos_enable()
1610 struct eqos_desc *rx_desc; in eqos_recv() local
1615 rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]); in eqos_recv()
1616 eqos->config->ops->eqos_inval_desc(rx_desc); in eqos_recv()
1617 if (rx_desc->des3 & EQOS_DESC3_OWN) { in eqos_recv()
1624 length = rx_desc->des3 & 0x7fff; in eqos_recv()
1636 struct eqos_desc *rx_desc; in eqos_free_pkt() local
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H A Dlpc32xx_eth.c195 ATTRS(4) struct lpc32xx_eth_rxdesc rx_desc[RX_BUF_COUNT]; member
504 bufs->rx_desc[index].packet = in lpc32xx_eth_init()
506 bufs->rx_desc[index].control = PKTSIZE_ALIGN - 1; in lpc32xx_eth_init()
510 writel((u32)(&bufs->rx_desc), &regs->rxdescriptor); in lpc32xx_eth_init()
H A Dmvpp2.c1362 struct mvpp2_rx_desc *rx_desc) in mvpp2_rxdesc_dma_addr_get() argument
1365 return rx_desc->pp21.buf_dma_addr; in mvpp2_rxdesc_dma_addr_get()
1367 return rx_desc->pp22.buf_dma_addr_key_hash & GENMASK_ULL(40, 0); in mvpp2_rxdesc_dma_addr_get()
1371 struct mvpp2_rx_desc *rx_desc) in mvpp2_rxdesc_cookie_get() argument
1374 return rx_desc->pp21.buf_cookie; in mvpp2_rxdesc_cookie_get()
1376 return rx_desc->pp22.buf_cookie_misc & GENMASK_ULL(40, 0); in mvpp2_rxdesc_cookie_get()
1380 struct mvpp2_rx_desc *rx_desc) in mvpp2_rxdesc_size_get() argument
1383 return rx_desc->pp21.data_size; in mvpp2_rxdesc_size_get()
1385 return rx_desc->pp22.data_size; in mvpp2_rxdesc_size_get()
1389 struct mvpp2_rx_desc *rx_desc) in mvpp2_rxdesc_status_get() argument
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H A Darmada100_fec.c402 struct rx_desc *p_rx_desc; in armdfec_init_rx_desc_ring()
415 p_rx_desc->nxtdesc_p = (struct rx_desc *) in armdfec_init_rx_desc_ring()
603 struct rx_desc *p_rxdesc_curr = darmdfec->p_rxdesc_curr; in armdfec_recv()
H A Daltera_tse.h219 void *rx_desc; member
H A Dpch_gbe.h287 struct pch_gbe_rx_desc rx_desc[PCH_GBE_DESC_NUM]; member
/rk3399_rockchip-uboot/drivers/usb/eth/
H A Dr8152.c1276 struct rx_desc *rx_desc; in r8152_recv() local
1298 rx_desc = (struct rx_desc *)(recv_buf + bytes_process); in r8152_recv()
1299 pkt_ptr = recv_buf + sizeof(struct rx_desc) + bytes_process; in r8152_recv()
1301 packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK; in r8152_recv()
1307 (packet_len + sizeof(struct rx_desc) + CRC_SIZE); in r8152_recv()
1510 struct rx_desc *rx_desc; in r8152_eth_recv() local
1526 rx_desc = (struct rx_desc *)ptr; in r8152_eth_recv()
1527 packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK; in r8152_eth_recv()
1530 if (packet_len > len - (sizeof(struct rx_desc) + CRC_SIZE)) { in r8152_eth_recv()
1535 *packetp = ptr + sizeof(struct rx_desc); in r8152_eth_recv()
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H A Dr8152.h514 struct rx_desc { struct
/rk3399_rockchip-uboot/doc/device-tree-bindings/net/
H A Daltera_tse.txt13 "rx_desc": MSGDMA Rx dispatcher descriptor space region
61 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
99 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
/rk3399_rockchip-uboot/arch/nios2/dts/
H A D10m50_devboard.dts109 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp",