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Searched refs:prcm (Results 1 – 25 of 34) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c22 struct prcm_regs const **prcm = variable
350 (*prcm)->cm_l4per_clkstctrl, in enable_basic_clocks()
351 (*prcm)->cm_l3init_clkstctrl, in enable_basic_clocks()
352 (*prcm)->cm_memif_clkstctrl, in enable_basic_clocks()
353 (*prcm)->cm_l4cfg_clkstctrl, in enable_basic_clocks()
355 (*prcm)->cm_gmac_clkstctrl, in enable_basic_clocks()
361 (*prcm)->cm_l3_gpmc_clkctrl, in enable_basic_clocks()
362 (*prcm)->cm_memif_emif_1_clkctrl, in enable_basic_clocks()
363 (*prcm)->cm_memif_emif_2_clkctrl, in enable_basic_clocks()
364 (*prcm)->cm_l4cfg_l4_cfg_clkctrl, in enable_basic_clocks()
[all …]
H A Dhwinit.c222 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
224 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
276 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
278 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
280 clk_val = readl((*prcm)->cm_wkupaon_io_srcomp_clkctrl); in srcomp_enable()
282 writel(clk_val, (*prcm)->cm_wkupaon_io_srcomp_clkctrl); in srcomp_enable()
403 writel(PRM_RSTCTRL_RESET << 0x1, (*prcm)->prm_rstctrl); in reset_cpu()
405 writel(PRM_RSTCTRL_RESET, (*prcm)->prm_rstctrl); in reset_cpu()
410 return readl((*prcm)->prm_rstst) & PRM_RSTST_WARM_RESET_MASK; in warm_reset()
428 rst_val = readl((*prcm)->prm_rsttime) & ~RSTTIME1_MASK; in setup_warmreset_time()
[all …]
H A Ddra7xx_iodelay.c29 clrsetbits_le32((*prcm)->prm_io_pmctrl, PMCTRL_ISOCLK_OVERRIDE_MASK, in isolate_io()
32 (u32 *)(*prcm)->prm_io_pmctrl, LDELAY)) in isolate_io()
42 clrsetbits_le32((*prcm)->prm_io_pmctrl, PMCTRL_ISOCLK_OVERRIDE_MASK, in isolate_io()
46 (u32 *)(*prcm)->prm_io_pmctrl, LDELAY)) in isolate_io()
H A DMakefile12 obj-y += prcm-regs.o
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap4/
H A Dhw_data.c20 struct prcm_regs const **prcm = variable
332 (*prcm)->cm_l4per_clkstctrl, in enable_basic_clocks()
333 (*prcm)->cm_l3init_clkstctrl, in enable_basic_clocks()
334 (*prcm)->cm_memif_clkstctrl, in enable_basic_clocks()
335 (*prcm)->cm_l4cfg_clkstctrl, in enable_basic_clocks()
340 (*prcm)->cm_l3_gpmc_clkctrl, in enable_basic_clocks()
341 (*prcm)->cm_memif_emif_1_clkctrl, in enable_basic_clocks()
342 (*prcm)->cm_memif_emif_2_clkctrl, in enable_basic_clocks()
343 (*prcm)->cm_l4cfg_l4_cfg_clkctrl, in enable_basic_clocks()
344 (*prcm)->cm_wkup_gpio1_clkctrl, in enable_basic_clocks()
[all …]
H A DMakefile12 obj-y += prcm-regs.o
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Dprcm.c27 struct sunxi_prcm_reg *prcm = in prcm_apb0_enable() local
31 setbits_le32(&prcm->apb0_gate, flags); in prcm_apb0_enable()
34 setbits_le32(&prcm->apb0_reset, flags); in prcm_apb0_enable()
39 struct sunxi_prcm_reg *prcm = in prcm_apb0_disable() local
43 clrbits_le32(&prcm->apb0_reset, flags); in prcm_apb0_disable()
46 clrbits_le32(&prcm->apb0_gate, flags); in prcm_apb0_disable()
H A DMakefile19 obj-$(CONFIG_MACH_SUN6I) += prcm.o
20 obj-$(CONFIG_MACH_SUN8I) += prcm.o
21 obj-$(CONFIG_MACH_SUN9I) += prcm.o
H A Dclock_sun6i.c26 struct sunxi_prcm_reg * const prcm = in clock_init_safe() local
30 clrsetbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK, in clock_init_safe()
32 clrsetbits_le32(&prcm->pll_ctrl1, ~PRCM_PLL_CTRL_LDO_KEY_MASK, in clock_init_safe()
35 clrbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK); in clock_init_safe()
69 struct sunxi_prcm_reg * const prcm = in clock_init_sec() local
76 setbits_le32(&prcm->prcm_sec_switch, in clock_init_sec()
/rk3399_rockchip-uboot/arch/arm/mach-omap2/
H A Dclocks-common.c59 ind = (readl((*prcm)->cm_sys_clksel) & in __get_sys_clk_index()
328 (struct dpll_regs *)((*prcm)->cm_clkmode_dpll_mpu); in configure_mpu_dpll()
329 bypass_dpll((*prcm)->cm_clkmode_dpll_mpu); in configure_mpu_dpll()
330 clrbits_le32((*prcm)->cm_mpu_mpu_clkctrl, in configure_mpu_dpll()
332 setbits_le32((*prcm)->cm_mpu_mpu_clkctrl, in configure_mpu_dpll()
340 do_setup_dpll((*prcm)->cm_clkmode_dpll_mpu, params, DPLL_LOCK, "mpu"); in configure_mpu_dpll()
365 clrsetbits_le32((*prcm)->cm_clksel_dpll_usb, in setup_usb_dpll()
370 do_setup_dpll((*prcm)->cm_clkmode_dpll_usb, params, DPLL_LOCK, "usb"); in setup_usb_dpll()
391 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params, in setup_dplls()
394 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params, in setup_dplls()
[all …]
H A Dvc.c77 writel(val, (*prcm)->prm_vc_cfg_i2c_clk); in omap_vc_init()
85 writel(val, (*prcm)->prm_vc_cfg_i2c_mode); in omap_vc_init()
111 writel(reg_val, (*prcm)->prm_vc_val_bypass); in omap_vc_bypass_send_value()
115 (*prcm)->prm_vc_val_bypass); in omap_vc_bypass_send_value()
119 reg_val = readl((*prcm)->prm_vc_val_bypass) & in omap_vc_bypass_send_value()
H A Demif-common.c1384 clkctrl = __raw_readl((*prcm)->cm_memif_clkstctrl); in do_bug0039_workaround()
1385 __raw_writel(0x0, (*prcm)->cm_memif_clkstctrl); in do_bug0039_workaround()
1402 __raw_writel(clkctrl, (*prcm)->cm_memif_clkstctrl); in do_bug0039_workaround()
1438 bypass_dpll((*prcm)->cm_clkmode_dpll_core); in sdram_init()
1440 writel(CM_DLL_CTRL_NO_OVERRIDE, (*prcm)->cm_dll_ctrl); in sdram_init()
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap3/
H A Dclock.c31 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in get_osc_clk_speed()
122 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in dpll3_init_34xx()
234 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in dpll4_init_34xx()
287 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in dpll5_init_34xx()
311 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in mpu_init_34xx()
338 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in iva_init_34xx()
379 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in dpll3_init_36xx()
484 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in dpll4_init_36xx()
527 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in dpll5_init_36xx()
549 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in mpu_init_36xx()
[all …]
H A DMakefile17 obj-y += prcm-regs.o
H A Dboard.c254 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in watchdog_init()
/rk3399_rockchip-uboot/board/ti/omap5_uevm/
H A Devm.c166 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val); in enable_host_clocks()
169 setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, in enable_host_clocks()
173 setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl, in enable_host_clocks()
177 auxclk = readl((*prcm)->scrm_auxclk1); in enable_host_clocks()
180 writel(auxclk, (*prcm)->scrm_auxclk1); in enable_host_clocks()
/rk3399_rockchip-uboot/board/compulab/cm_t54/
H A Dcm_t54.c207 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk); in setup_host_clocks()
209 setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk); in setup_host_clocks()
214 clrbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk); in setup_host_clocks()
215 clrbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk); in setup_host_clocks()
/rk3399_rockchip-uboot/board/htkw/mcx/
H A Dmcx.c127 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in board_video_init()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/sunxi/
H A Dpsci.c161 struct sunxi_prcm_reg *prcm = in sunxi_cpu_set_power() local
164 sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff, in sunxi_cpu_set_power()
/rk3399_rockchip-uboot/board/compulab/common/
H A Domap3_display.c401 struct prcm *prcm = (struct prcm *)PRCM_BASE; in lcd_ctrl_init() local
424 clrsetbits_le32(&prcm->clksel_dss, 0xF, 3); in lcd_ctrl_init()
/rk3399_rockchip-uboot/arch/arm/mach-omap2/am33xx/
H A DMakefile24 obj-y += prcm-regs.o
/rk3399_rockchip-uboot/board/teejet/mt_ventoux/
H A Dmt_ventoux.c305 struct prcm *prcm_base = (struct prcm *)PRCM_BASE; in board_video_init()
/rk3399_rockchip-uboot/drivers/usb/phy/
H A Domap_usb_phy.c198 setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl, in omap_enable_usb2_phy2()
201 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, in omap_enable_usb2_phy2()
/rk3399_rockchip-uboot/board/compulab/cl-som-am57x/
H A Dspl.c209 *prcm = &dra7xx_prcm; in hw_data_init()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Ddm816x.dtsi69 prcm: prcm@48180000 { label
70 compatible = "ti,dm816-prcm";

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