History log of /rk3399_rockchip-uboot/arch/arm/cpu/armv7/sunxi/psci.c (Results 1 – 14 of 14)
Revision Date Author Comments
# ebba9d1d 19-Jun-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-sunxi


# 34748272 07-Jun-2017 Chen-Yu Tsai <wens@csie.org>

sunxi: psci: Move entry address setting to separate function

Currently we set the entry address in the psci_cpu_on function.
However R40 has a different register for this. This resulted in
an #ifdef

sunxi: psci: Move entry address setting to separate function

Currently we set the entry address in the psci_cpu_on function.
However R40 has a different register for this. This resulted in
an #ifdef / #else block in psci_cpu_on, which we avoided having
in the first place.

Move this part into a separate function, defined differently for
the R40 as opposed to the other single cluster platforms.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

show more ...


# 4f66e09b 09-May-2017 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# 6f008a2e 25-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-sunxi


# 0918648d 01-Mar-2017 Chen-Yu Tsai <wens@csie.org>

sunxi: Add PSCI support for R40

The R40's CPU controls are a combination of sun6i and sun7i.

All controls are in the CPUCFG block, and it seems the R40 does not
have a PRCM block. The core reset, p

sunxi: Add PSCI support for R40

The R40's CPU controls are a combination of sun6i and sun7i.

All controls are in the CPUCFG block, and it seems the R40 does not
have a PRCM block. The core reset, power gating and clamp controls
are grouped like sun6i.

Last, the R40 does not have a secure SRAM block.

This patch adds a PSCI implementation for CPU bring-up and hotplug
for the R40.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

show more ...


# d53ecad9 06-Apr-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-sunxi

trini: Disable CONFIG_SPL_USE_ARCH_MEMSET on orangepi_2

Signed-off-by: Tom Rini <trini@konsulko.com>


# e4916e85 16-Feb-2017 Andre Przywara <andre.przywara@arm.com>

ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY

Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the
frequency of the ARM Generic Timer (aka. arch timer).
ARMv7 boards traditi

ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY

Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the
frequency of the ARM Generic Timer (aka. arch timer).
ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same
purpose. It seems useful to unify them.
Since there are less occurences of the latter version, lets convert all
users over to COUNTER_FREQUENCY.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

show more ...


# a78cd861 01-Aug-2016 Tom Rini <trini@konsulko.com>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases i

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

show more ...


# 1f9ef0dc 15-Jul-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of http://git.denx.de/u-boot-sunxi


# 6e6622de 19-Jun-2016 Chen-Yu Tsai <wens@csie.org>

ARM: PSCI: Switch to per-CPU target PC storage in secure data section

Now that we have a secure data section and space to store per-CPU target
PC address, switch to it instead of storing the target

ARM: PSCI: Switch to per-CPU target PC storage in secure data section

Now that we have a secure data section and space to store per-CPU target
PC address, switch to it instead of storing the target PC on the stack.

Also save clobbered r4-r7 registers on the stack and restore them on
return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

show more ...


# afc1f65f 19-Jun-2016 Chen-Yu Tsai <wens@csie.org>

ARM: Move __secure definition to common asm/secure.h

sunxi and i.mx7 both define the __secure modifier to put functions in
the secure section. Move this to a common place.

Signed-off-by: Chen-Yu Ts

ARM: Move __secure definition to common asm/secure.h

sunxi and i.mx7 both define the __secure modifier to put functions in
the secure section. Move this to a common place.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

show more ...


# 28f90357 19-Jun-2016 Chen-Yu Tsai <wens@csie.org>

ARM: PSCI: Remove unused psci_text_end symbol

psci_text_end was used to calculate the PSCI stack address following the
secure monitor text. Now that we have an explicit secure stack section,
this is

ARM: PSCI: Remove unused psci_text_end symbol

psci_text_end was used to calculate the PSCI stack address following the
secure monitor text. Now that we have an explicit secure stack section,
this is no longer used.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

show more ...


# 94a389b2 19-Jun-2016 Chen-Yu Tsai <wens@csie.org>

sunxi: Move remaining PSCI assembly code to C

This patch finishes the rewrite of sunxi specific PSCI parts into C
code.

The assembly-only stack setup code has been factored out into a common
functi

sunxi: Move remaining PSCI assembly code to C

This patch finishes the rewrite of sunxi specific PSCI parts into C
code.

The assembly-only stack setup code has been factored out into a common
function for ARMv7. The GIC setup code can be renamed as psci_arch_init.
And we can use an empty stub function for psci_text_end.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

show more ...


# 4257f5f8 07-Jun-2016 Chen-Yu Tsai <wens@csie.org>

sunxi: Add PSCI implementation in C

To make the PSCI backend more maintainable and easier to port to newer
SoCs, rewrite the current PSCI implementation in C.

Some inline assembly bits are required

sunxi: Add PSCI implementation in C

To make the PSCI backend more maintainable and easier to port to newer
SoCs, rewrite the current PSCI implementation in C.

Some inline assembly bits are required to access coprocessor registers.
PSCI stack setup is the only part left completely in assembly. In theory
this part could be split out of psci_arch_init into a separate common
function, and psci_arch_init could be completely in C.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

show more ...