| #
cf6fc54d |
| 06-Feb-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
UPSTREAM: arm: sunxi: Move spl spi sunxi code to mach-sunxi
This SUNXI variant SPL SPI code doesn't use either SPI or SPL_FLASG subsystems due to size constraints and also placing this code in drive
UPSTREAM: arm: sunxi: Move spl spi sunxi code to mach-sunxi
This SUNXI variant SPL SPI code doesn't use either SPI or SPL_FLASG subsystems due to size constraints and also placing this code in drivers/mtd/spi will unnecessary build SPI_FLASH code(if defined) which never required, hence moved to arch area.
And also renamed the file according to kconfig which resembles proper name.
Change-Id: I0bf18e93d26bc1b80d3dfa7219a2a904ed17085a Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit c2a7a7ef866f2980213fee2a4a0df60fb06db6d0)
show more ...
|
| #
ebba9d1d |
| 19-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
|
| #
f6457ce5 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: Add selective DRAM type and timing
DRAM chip varies, and one code cannot satisfy all DRAMs.
Add options to select a timing set.
Currently only DDR3-1333 (the original set) is added into it.
sunxi: Add selective DRAM type and timing
DRAM chip varies, and one code cannot satisfy all DRAMs.
Add options to select a timing set.
Currently only DDR3-1333 (the original set) is added into it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
show more ...
|
| #
9934aba4 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: makes an invisible option for H3-like DRAM controllers
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free DRAM initial
sunxi: makes an invisible option for H3-like DRAM controllers
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free DRAM initialization code, but can use modified dram_sun8i_h3.c.
Add a invisible option for easier DRAM initialization code reuse.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
show more ...
|
| #
4f66e09b |
| 09-May-2017 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| #
6f008a2e |
| 25-Apr-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi
|
| #
8201188c |
| 01-Dec-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Use H3/A64 DRAM initialization code for R40
The R40 seems to have a variant of the memory controller found in the H3 and A64 SoCs. Adapt the code for use on the R40. The changes are based on
sunxi: Use H3/A64 DRAM initialization code for R40
The R40 seems to have a variant of the memory controller found in the H3 and A64 SoCs. Adapt the code for use on the R40. The changes are based on released DRAM code and comparing register dumps from boot0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
show more ...
|
| #
d53ecad9 |
| 06-Apr-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
trini: Disable CONFIG_SPL_USE_ARCH_MEMSET on orangepi_2
Signed-off-by: Tom Rini <trini@konsulko.com>
|
| #
7b82a229 |
| 16-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architec
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
show more ...
|
| #
0b840433 |
| 10-Jan-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
|
| #
1bc464be |
| 02-Jan-2017 |
Jens Kuske <jenskuske@gmail.com> |
sunxi: A64: use H3 DRAM initialization code for A64 as well
The A64 DRAM controller is very similar to the H3 one, so the code can be reused with some small changes. This refactoring does not change
sunxi: A64: use H3 DRAM initialization code for A64 as well
The A64 DRAM controller is very similar to the H3 one, so the code can be reused with some small changes. This refactoring does not change the code size for the existing H3 part.
[Andre: rework from #ifdefs to using socid parameters in static functions, minor fixes, merging in fixes from Jens]
Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
show more ...
|
| #
48d2fc47 |
| 30-Oct-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'sun9i-a80-spl' of http://git.denx.de/u-boot-sunxi
|
| #
ea1af9f2 |
| 28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: add gtbus-initialisation for sun9i
On sun9i, the GTBUS manages transaction priority and bandwidth for multiple read ports when accessing DRAM. The initialisation mirrors the settings from All
sunxi: add gtbus-initialisation for sun9i
On sun9i, the GTBUS manages transaction priority and bandwidth for multiple read ports when accessing DRAM. The initialisation mirrors the settings from Allwinner's boot0 for now, even though this may not be optimal for all applications (e.g. headless systems might want to give priority to IO modules).
Adding a common callout to gtbus_init() from the SPL clock init with a weakly defined implementation in sunxi/clock.c to fallback to for platforms that don't require this.
[wens@csie.org: Moved gtbus_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| #
297bb9e0 |
| 28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: DRAM initialisation for sun9i
This adds DRAM initialisation code for sun9i, which calculates the appropriate timings based on timing information for the supplied DDR3 bin and the clock speeds
sunxi: DRAM initialisation for sun9i
This adds DRAM initialisation code for sun9i, which calculates the appropriate timings based on timing information for the supplied DDR3 bin and the clock speeds used.
With this DRAM setup, we have verified DDR3 clocks of up to 792MHz (i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration.
[wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: Chen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks] [hdegoede@redhat.com: Fix checkpatch warnings] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| #
dc557e9a |
| 18-Jun-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| #
82f2a144 |
| 25-May-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
|
| #
795857df |
| 02-May-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: power: add AXP809 support
The A80 uses the AXP809 as its primary PMIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goe
sunxi: power: add AXP809 support
The A80 uses the AXP809 as its primary PMIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| #
40345e9e |
| 01-Apr-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
|
| #
d96ebc46 |
| 29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs
The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode.
Unfortunately SPL is not
sunxi: Add support for Allwinner A64 SoCs
The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode.
Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| #
e6e505b9 |
| 29-Mar-2016 |
Alexander Graf <agraf@suse.de> |
sunxi: Move cpu independent code to mach directory
Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AAr
sunxi: Move cpu independent code to mach directory
Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC.
Move all files that are not really tied to armv7 into a new mach-sunxi directory.
Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|