1*e6e505b9SAlexander Graf /* 2*e6e505b9SAlexander Graf * Sunxi A31 Power Management Unit 3*e6e505b9SAlexander Graf * 4*e6e505b9SAlexander Graf * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> 5*e6e505b9SAlexander Graf * http://linux-sunxi.org 6*e6e505b9SAlexander Graf * 7*e6e505b9SAlexander Graf * Based on sun6i sources and earlier U-Boot Allwinner A10 SPL work 8*e6e505b9SAlexander Graf * 9*e6e505b9SAlexander Graf * (C) Copyright 2006-2013 10*e6e505b9SAlexander Graf * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 11*e6e505b9SAlexander Graf * Berg Xing <bergxing@allwinnertech.com> 12*e6e505b9SAlexander Graf * Tom Cubie <tangliang@allwinnertech.com> 13*e6e505b9SAlexander Graf * 14*e6e505b9SAlexander Graf * SPDX-License-Identifier: GPL-2.0+ 15*e6e505b9SAlexander Graf */ 16*e6e505b9SAlexander Graf 17*e6e505b9SAlexander Graf #include <common.h> 18*e6e505b9SAlexander Graf #include <errno.h> 19*e6e505b9SAlexander Graf #include <asm/io.h> 20*e6e505b9SAlexander Graf #include <asm/arch/cpu.h> 21*e6e505b9SAlexander Graf #include <asm/arch/prcm.h> 22*e6e505b9SAlexander Graf #include <asm/arch/sys_proto.h> 23*e6e505b9SAlexander Graf 24*e6e505b9SAlexander Graf /* APB0 clock gate and reset bit offsets are the same. */ prcm_apb0_enable(u32 flags)25*e6e505b9SAlexander Grafvoid prcm_apb0_enable(u32 flags) 26*e6e505b9SAlexander Graf { 27*e6e505b9SAlexander Graf struct sunxi_prcm_reg *prcm = 28*e6e505b9SAlexander Graf (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 29*e6e505b9SAlexander Graf 30*e6e505b9SAlexander Graf /* open the clock for module */ 31*e6e505b9SAlexander Graf setbits_le32(&prcm->apb0_gate, flags); 32*e6e505b9SAlexander Graf 33*e6e505b9SAlexander Graf /* deassert reset for module */ 34*e6e505b9SAlexander Graf setbits_le32(&prcm->apb0_reset, flags); 35*e6e505b9SAlexander Graf } 36*e6e505b9SAlexander Graf prcm_apb0_disable(u32 flags)37*e6e505b9SAlexander Grafvoid prcm_apb0_disable(u32 flags) 38*e6e505b9SAlexander Graf { 39*e6e505b9SAlexander Graf struct sunxi_prcm_reg *prcm = 40*e6e505b9SAlexander Graf (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 41*e6e505b9SAlexander Graf 42*e6e505b9SAlexander Graf /* assert reset for module */ 43*e6e505b9SAlexander Graf clrbits_le32(&prcm->apb0_reset, flags); 44*e6e505b9SAlexander Graf 45*e6e505b9SAlexander Graf /* close the clock for module */ 46*e6e505b9SAlexander Graf clrbits_le32(&prcm->apb0_gate, flags); 47*e6e505b9SAlexander Graf } 48