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Searched refs:outb (Results 1 – 25 of 45) sorted by relevance

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/rk3399_rockchip-uboot/arch/x86/lib/
H A Di8259.c28 outb(0xff, MASTER_PIC + IMR); in i8259_init()
29 outb(0xff, SLAVE_PIC + IMR); in i8259_init()
35 outb(ICW1_SEL | ICW1_EICW4, MASTER_PIC + ICW1); in i8259_init()
36 outb(0x20, MASTER_PIC + ICW2); in i8259_init()
37 outb(IR2, MASTER_PIC + ICW3); in i8259_init()
38 outb(ICW4_PM, MASTER_PIC + ICW4); in i8259_init()
41 outb(OCW2_SEOI | i, MASTER_PIC + OCW2); in i8259_init()
47 outb(ICW1_SEL | ICW1_EICW4, SLAVE_PIC + ICW1); in i8259_init()
48 outb(0x28, SLAVE_PIC + ICW2); in i8259_init()
49 outb(0x02, SLAVE_PIC + ICW3); in i8259_init()
[all …]
H A Di8254.c22 outb(PIT_CMD_CTR1 | PIT_CMD_LOW | PIT_CMD_MODE2, in i8254_init()
24 outb(TIMER1_VALUE, PIT_BASE + PIT_T1); in i8254_init()
31 outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3, in i8254_init()
33 outb(TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2); in i8254_init()
34 outb(TIMER2_VALUE >> 8, PIT_BASE + PIT_T2); in i8254_init()
H A Dearly_cmos.c20 outb(addr, CMOS_IO_PORT); in cmos_read8()
/rk3399_rockchip-uboot/drivers/misc/
H A Dnuvoton_nct6102d.c14 outb(reg, NCT_EFER); in superio_outb()
15 outb(val, NCT_EFDR); in superio_outb()
20 outb(reg, NCT_EFER); in superio_inb()
26 outb(NCT_ENTRY_KEY, NCT_EFER); /* Enter extended function mode */ in superio_enter()
27 outb(NCT_ENTRY_KEY, NCT_EFER); /* Again according to manual */ in superio_enter()
39 outb(NCT_EXIT_KEY, NCT_EFER); /* Leave extended function mode */ in superio_exit()
H A Dsmsc_sio1007.c14 outb(reg, port); in sio1007_read()
21 outb(reg, port); in sio1007_write()
22 outb(val, port + 1); in sio1007_write()
36 outb(0x55, port); in sio1007_enable_serial()
50 outb(0xaa, port); in sio1007_enable_serial()
56 outb(0x55, port); in sio1007_enable_runtime()
65 outb(0xaa, port); in sio1007_enable_runtime()
80 outb(0x55, port); in sio1007_gpio_config()
88 outb(0xaa, port); in sio1007_gpio_config()
125 outb(data, port + reg); in sio1007_gpio_set_value()
H A Dali512x.c45 outb(index, ALI_INDEX); in ali_write()
46 outb(value, ALI_DATA); in ali_write()
52 outb(index, ALI_INDEX);
58 outb(0x51, ALI_INDEX); \
59 outb(0x23, ALI_INDEX)
63 outb(0xbb, ALI_INDEX)
377 outb(reg, ALI_CIO_INDEX); /* select I/O register */ in ali512x_cio_out()
384 outb(data, ALI_CIO_DATA); in ali512x_cio_out()
398 outb(reg, ALI_CIO_INDEX); /* select I/O register */ in ali512x_cio_in()
H A Dwinbond_w83627.c19 outb(WINBOND_ENTRY_KEY, port); in pnp_enter_conf_state()
20 outb(WINBOND_ENTRY_KEY, port); in pnp_enter_conf_state()
28 outb(WINBOND_EXIT_KEY, port); in pnp_exit_conf_state()
H A Dsmsc_lpc47m.c15 outb(0x55, port); in pnp_enter_conf_state()
22 outb(0xaa, port); in pnp_exit_conf_state()
H A Dcros_ec_lpc.c83 outb(*d, args_addr + i); in cros_ec_lpc_command()
88 outb(*d, param_addr + i); in cros_ec_lpc_command()
92 outb(cmd, cmd_addr); in cros_ec_lpc_command()
/rk3399_rockchip-uboot/drivers/i2c/
H A Dintel_i2c.c113 outb(((dev & 0x7f) << 1) | 1, base + SMBXMITADD); in smbus_block_read()
115 outb(offset & 0xff, base + SMBHSTCMD); in smbus_block_read()
117 outb((inb(base + SMBHSTCTL) & (~(0x7) << 2)) | (0x5 << 2), in smbus_block_read()
120 outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT); in smbus_block_read()
123 outb((inb(base + SMBHSTCTL) | SMBHSTCNT_START), base + SMBHSTCTL); in smbus_block_read()
173 outb(((dev & 0x7f) << 1) & ~0x01, base + SMBXMITADD); in smbus_block_write()
175 outb(offset, base + SMBHSTCMD); in smbus_block_write()
177 outb((inb(base + SMBHSTCTL) & (~(0x7) << 2)) | (0x5 << 2), in smbus_block_write()
180 outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT); in smbus_block_write()
183 outb(len, base + SMBHSTDAT0); in smbus_block_write()
[all …]
/rk3399_rockchip-uboot/board/imgtec/malta/
H A Dsuperio.c53 outb(SIOCONF_ENTER_SETUP, SIO_CONF_PORT); in malta_superio_init()
57 outb(sio_config[i].key, SIO_CONF_PORT); in malta_superio_init()
58 outb(sio_config[i].data, SIO_DATA_PORT); in malta_superio_init()
62 outb(SIOCONF_EXIT_SETUP, SIO_CONF_PORT); in malta_superio_init()
/rk3399_rockchip-uboot/drivers/net/
H A Drtl8139.c261 outb(0x00, ioaddr + Config1); in rtl8139_probe()
307 outb(EE_ENB & ~EE_CS, ee_addr); in read_eeprom()
308 outb(EE_ENB, ee_addr); in read_eeprom()
314 outb(EE_ENB | dataval, ee_addr); in read_eeprom()
316 outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); in read_eeprom()
319 outb(EE_ENB, ee_addr); in read_eeprom()
323 outb(EE_ENB | EE_SHIFT_CLK, ee_addr); in read_eeprom()
326 outb(EE_ENB, ee_addr); in read_eeprom()
331 outb(~EE_CS, ee_addr); in read_eeprom()
358 outb(CmdReset, ioaddr + ChipCmd); in rtl_reset()
[all …]
/rk3399_rockchip-uboot/board/renesas/ecovec/
H A Decovec.c28 outb((inb(PGDR) & ~0x0F) | (led & 0x0F), PGDR); in debug_led()
83 outb((inb(PADR) & ~0x02) | 0x02, PADR); in board_init()
89 outb((inb(PBDR) & ~0x10) | 0x10, PBDR); in board_init()
/rk3399_rockchip-uboot/arch/x86/include/asm/
H A Dpnp_def.h39 outb(reg, port); in pnp_write_config()
40 outb(value, port + 1); in pnp_write_config()
47 outb(reg, port); in pnp_read_config()
H A Dpost.h45 outb %al, $POST_PORT
51 outb(code, POST_PORT); in post_code()
/rk3399_rockchip-uboot/arch/x86/cpu/qemu/
H A Ddram.c17 outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT); in dram_init()
19 outb(LOW_RAM_ADDR, CMOS_ADDR_PORT); in dram_init()
/rk3399_rockchip-uboot/drivers/timer/
H A Dtsc_timer.c205 outb((inb(0x61) & ~0x02) | 0x01, 0x61); in quick_pit_calibrate()
216 outb(0xb0, 0x43); in quick_pit_calibrate()
219 outb(0xff, 0x42); in quick_pit_calibrate()
220 outb(0xff, 0x42); in quick_pit_calibrate()
/rk3399_rockchip-uboot/arch/microblaze/include/asm/
H A Dio.h44 #define outb(x, addr) ((void) writeb (x, addr)) macro
53 #define out_8(addr,x ) outb (x,addr)
59 #define outb_p(val, port) outb((val), (port))
98 outb (*p++, port); in io_outsb()
/rk3399_rockchip-uboot/arch/x86/cpu/
H A Dcpu.c100 outb(SYS_RST | RST_CPU, IO_PORT_RESET); in reset_cpu()
107 outb(FULL_RST | SYS_RST | RST_CPU, IO_PORT_RESET); in x86_full_reset()
194 outb(val, POST_PORT); in show_boot_progress()
/rk3399_rockchip-uboot/drivers/pcmcia/
H A Dmarubun_pcmcia.c87 outb(0x00,(CONFIG_SYS_MARUBUN_MW2 + 0x206)); in pcmcia_on()
88 outb(0x42,(CONFIG_SYS_MARUBUN_MW2 + 0x200)); in pcmcia_on()
/rk3399_rockchip-uboot/arch/x86/cpu/intel_common/
H A Dcpu.c107 outb(0x0, IO_PORT_RESET); in cpu_set_flex_ratio_to_tdp_nominal()
108 outb(SYS_RST | RST_CPU, IO_PORT_RESET); in cpu_set_flex_ratio_to_tdp_nominal()
/rk3399_rockchip-uboot/arch/x86/cpu/coreboot/
H A Dcoreboot.c70 outb(0xcb, 0xb2); in board_final_cleanup()
/rk3399_rockchip-uboot/arch/xtensa/include/asm/
H A Dio.h61 #define outb(val, port) writeb((val), (u8 *)((unsigned long)(port))) macro
68 #define outb_p(val, port) outb((val), (port))
/rk3399_rockchip-uboot/test/dm/
H A Dpci.c49 outb(2, io_addr); in dm_test_pci_swapcase()
/rk3399_rockchip-uboot/cmd/
H A Dio.c67 outb((u8) val, addr); in do_io_iow()

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